--- /dev/null
+/** @file\r
+\r
+ Copyright (c) 2022, NVIDIA CORPORATION & AFFILIATES. All rights reserved.<BR>\r
+\r
+ SPDX-License-Identifier: BSD-2-Clause-Patent\r
+**/\r
+\r
+#ifndef AML_CPC_INFO_H_\r
+#define AML_CPC_INFO_H_\r
+\r
+#include <IndustryStandard/Acpi.h>\r
+\r
+#pragma pack(1)\r
+\r
+/** A structure that describes the Cpc information.\r
+\r
+ Continuous Performance Control is described in DSDT/SSDT and associated\r
+ to cpus/clusters in the cpu topology.\r
+\r
+ Unsupported Optional registers should be encoded with NULL resource\r
+ Register {(SystemMemory, 0, 0, 0, 0)}\r
+\r
+ For values that support Integer or Buffer, integer will be used\r
+ if buffer is NULL resource.\r
+ If resource is not NULL then Integer must be 0\r
+\r
+ Cf. ACPI 6.4, s8.4.7.1 _CPC (Continuous Performance Control)\r
+\r
+**/\r
+\r
+typedef struct AmlCpcInfo {\r
+ /// The revision number of the _CPC package format.\r
+ UINT32 Revision;\r
+\r
+ /// Indicates the highest level of performance the processor\r
+ /// is theoretically capable of achieving.\r
+ EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE HighestPerformanceBuffer;\r
+ UINT32 HighestPerformanceInteger;\r
+\r
+ /// Indicates the highest sustained performance level of the processor.\r
+ EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE NominalPerformanceBuffer;\r
+ UINT32 NominalPerformanceInteger;\r
+\r
+ /// Indicates the lowest performance level of the processor with non-linear power savings.\r
+ EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE LowestNonlinearPerformanceBuffer;\r
+ UINT32 LowestNonlinearPerformanceInteger;\r
+\r
+ /// Indicates the lowest performance level of the processor..\r
+ EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE LowestPerformanceBuffer;\r
+ UINT32 LowestPerformanceInteger;\r
+\r
+ /// Guaranteed Performance Register Buffer.\r
+ /// Optional\r
+ EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE GuaranteedPerformanceRegister;\r
+\r
+ /// Desired Performance Register Buffer.\r
+ EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE DesiredPerformanceRegister;\r
+\r
+ /// Minimum Performance Register Buffer.\r
+ /// Optional\r
+ EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE MinimumPerformanceRegister;\r
+\r
+ /// Maximum Performance Register Buffer.\r
+ /// Optional\r
+ EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE MaximumPerformanceRegister;\r
+\r
+ /// Performance Reduction Tolerance Register.\r
+ /// Optional\r
+ EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE PerformanceReductionToleranceRegister;\r
+\r
+ /// Time Window Register.\r
+ /// Optional\r
+ EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE TimeWindowRegister;\r
+\r
+ /// Counter Wraparound Time\r
+ /// Optional\r
+ EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE CounterWraparoundTimeBuffer;\r
+ UINT32 CounterWraparoundTimeInteger;\r
+\r
+ /// Reference Performance Counter Register\r
+ EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE ReferencePerformanceCounterRegister;\r
+\r
+ /// Delivered Performance Counter Register\r
+ EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE DeliveredPerformanceCounterRegister;\r
+\r
+ /// Performance Limited Register\r
+ EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE PerformanceLimitedRegister;\r
+\r
+ /// CPPC EnableRegister\r
+ /// Optional\r
+ EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE CPPCEnableRegister;\r
+\r
+ /// Autonomous Selection Enable\r
+ /// Optional\r
+ EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE AutonomousSelectionEnableBuffer;\r
+ UINT32 AutonomousSelectionEnableInteger;\r
+\r
+ /// AutonomousActivity-WindowRegister\r
+ /// Optional\r
+ EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE AutonomousActivityWindowRegister;\r
+\r
+ /// EnergyPerformance-PreferenceRegister\r
+ /// Optional\r
+ EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE EnergyPerformancePreferenceRegister;\r
+\r
+ /// Reference Performance\r
+ /// Optional\r
+ EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE ReferencePerformanceBuffer;\r
+ UINT32 ReferencePerformanceInteger;\r
+\r
+ /// Lowest Frequency\r
+ /// Optional\r
+ EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE LowestFrequencyBuffer;\r
+ UINT32 LowestFrequencyInteger;\r
+\r
+ /// Nominal Frequency\r
+ /// Optional\r
+ EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE NominalFrequencyBuffer;\r
+ UINT32 NominalFrequencyInteger;\r
+} AML_CPC_INFO;\r
+\r
+#pragma pack()\r
+\r
+#endif //AML_CPC_INFO_H_\r
#ifndef ARM_NAMESPACE_OBJECTS_H_\r
#define ARM_NAMESPACE_OBJECTS_H_\r
\r
+#include <AmlCpcInfo.h>\r
#include <StandardNameSpaceObjects.h>\r
\r
#pragma pack(1)\r
EArmObjPciInterruptMapInfo, ///< 39 - Pci Interrupt Map Info\r
EArmObjRmr, ///< 40 - Reserved Memory Range Node\r
EArmObjMemoryRangeDescriptor, ///< 41 - Memory Range Descriptor\r
+ EArmObjCpcInfo, ///< 42 - Continuous Performance Control Info\r
EArmObjMax\r
} EARM_OBJECT_ID;\r
\r
*/\r
typedef struct CmArmGicCInfo {\r
/// The GIC CPU Interface number.\r
- UINT32 CPUInterfaceNumber;\r
+ UINT32 CPUInterfaceNumber;\r
\r
/** The ACPI Processor UID. This must match the\r
_UID of the CPU Device object information described\r
in the DSDT/SSDT for the CPU.\r
*/\r
- UINT32 AcpiProcessorUid;\r
+ UINT32 AcpiProcessorUid;\r
\r
/** The flags field as described by the GICC structure\r
in the ACPI Specification.\r
*/\r
- UINT32 Flags;\r
+ UINT32 Flags;\r
\r
/** The parking protocol version field as described by\r
the GICC structure in the ACPI Specification.\r
*/\r
- UINT32 ParkingProtocolVersion;\r
+ UINT32 ParkingProtocolVersion;\r
\r
/** The Performance Interrupt field as described by\r
the GICC structure in the ACPI Specification.\r
*/\r
- UINT32 PerformanceInterruptGsiv;\r
+ UINT32 PerformanceInterruptGsiv;\r
\r
/** The CPU Parked address field as described by\r
the GICC structure in the ACPI Specification.\r
*/\r
- UINT64 ParkedAddress;\r
+ UINT64 ParkedAddress;\r
\r
/** The base address for the GIC CPU Interface\r
as described by the GICC structure in the\r
ACPI Specification.\r
*/\r
- UINT64 PhysicalBaseAddress;\r
+ UINT64 PhysicalBaseAddress;\r
\r
/** The base address for GICV interface\r
as described by the GICC structure in the\r
ACPI Specification.\r
*/\r
- UINT64 GICV;\r
+ UINT64 GICV;\r
\r
/** The base address for GICH interface\r
as described by the GICC structure in the\r
ACPI Specification.\r
*/\r
- UINT64 GICH;\r
+ UINT64 GICH;\r
\r
/** The GICV maintenance interrupt\r
as described by the GICC structure in the\r
ACPI Specification.\r
*/\r
- UINT32 VGICMaintenanceInterrupt;\r
+ UINT32 VGICMaintenanceInterrupt;\r
\r
/** The base address for GICR interface\r
as described by the GICC structure in the\r
ACPI Specification.\r
*/\r
- UINT64 GICRBaseAddress;\r
+ UINT64 GICRBaseAddress;\r
\r
/** The MPIDR for the CPU\r
as described by the GICC structure in the\r
ACPI Specification.\r
*/\r
- UINT64 MPIDR;\r
+ UINT64 MPIDR;\r
\r
/** The Processor Power Efficiency class\r
as described by the GICC structure in the\r
ACPI Specification.\r
*/\r
- UINT8 ProcessorPowerEfficiencyClass;\r
+ UINT8 ProcessorPowerEfficiencyClass;\r
\r
/** Statistical Profiling Extension buffer overflow GSIV. Zero if\r
unsupported by this processor. This field was introduced in\r
ACPI 6.3 (MADT revision 5) and is therefore ignored when\r
generating MADT revision 4 or lower.\r
*/\r
- UINT16 SpeOverflowInterrupt;\r
+ UINT16 SpeOverflowInterrupt;\r
\r
/** The proximity domain to which the logical processor belongs.\r
This field is used to populate the GICC affinity structure\r
in the SRAT table.\r
*/\r
- UINT32 ProximityDomain;\r
+ UINT32 ProximityDomain;\r
\r
/** The clock domain to which the logical processor belongs.\r
This field is used to populate the GICC affinity structure\r
in the SRAT table.\r
*/\r
- UINT32 ClockDomain;\r
+ UINT32 ClockDomain;\r
\r
/** The GICC Affinity flags field as described by the GICC Affinity structure\r
in the SRAT table.\r
*/\r
- UINT32 AffinityFlags;\r
+ UINT32 AffinityFlags;\r
+\r
+ /** Optional field: Reference Token for the Cpc info of this processor.\r
+ i.e. a token referencing a CM_ARM_CPC_INFO object.\r
+ */\r
+ CM_OBJECT_TOKEN CpcToken;\r
} CM_ARM_GICC_INFO;\r
\r
/** A structure that describes the\r
UINT64 Length;\r
} CM_ARM_MEMORY_RANGE_DESCRIPTOR;\r
\r
+/** A structure that describes the Cpc information.\r
+\r
+ Continuous Performance Control is described in DSDT/SSDT and associated\r
+ to cpus/clusters in the cpu topology.\r
+\r
+ Unsupported Optional registers should be encoded with NULL resource\r
+ Register {(SystemMemory, 0, 0, 0, 0)}\r
+\r
+ For values that support Integer or Buffer, integer will be used\r
+ if buffer is NULL resource.\r
+ If resource is not NULL then Integer must be 0\r
+\r
+ Cf. ACPI 6.4, s8.4.7.1 _CPC (Continuous Performance Control)\r
+\r
+ ID: EArmObjCpcInfo\r
+*/\r
+typedef AML_CPC_INFO CM_ARM_CPC_INFO;\r
+\r
#pragma pack()\r
\r
#endif // ARM_NAMESPACE_OBJECTS_H_\r
/** A parser for EArmObjGicCInfo.\r
*/\r
STATIC CONST CM_OBJ_PARSER CmArmGicCInfoParser[] = {\r
- { "CPUInterfaceNumber", 4, "0x%x", NULL },\r
- { "AcpiProcessorUid", 4, "0x%x", NULL },\r
- { "Flags", 4, "0x%x", NULL },\r
- { "ParkingProtocolVersion", 4, "0x%x", NULL },\r
- { "PerformanceInterruptGsiv", 4, "0x%x", NULL },\r
- { "ParkedAddress", 8, "0x%llx", NULL },\r
- { "PhysicalBaseAddress", 8, "0x%llx", NULL },\r
- { "GICV", 8, "0x%llx", NULL },\r
- { "GICH", 8, "0x%llx", NULL },\r
- { "VGICMaintenanceInterrupt", 4, "0x%x", NULL },\r
- { "GICRBaseAddress", 8, "0x%llx", NULL },\r
- { "MPIDR", 8, "0x%llx", NULL },\r
- { "ProcessorPowerEfficiencyClass", 1, "0x%x", NULL },\r
- { "SpeOverflowInterrupt", 2, "0x%x", NULL },\r
- { "ProximityDomain", 4, "0x%x", NULL },\r
- { "ClockDomain", 4, "0x%x", NULL },\r
- { "AffinityFlags", 4, "0x%x", NULL }\r
+ { "CPUInterfaceNumber", 4, "0x%x", NULL },\r
+ { "AcpiProcessorUid", 4, "0x%x", NULL },\r
+ { "Flags", 4, "0x%x", NULL },\r
+ { "ParkingProtocolVersion", 4, "0x%x", NULL },\r
+ { "PerformanceInterruptGsiv", 4, "0x%x", NULL },\r
+ { "ParkedAddress", 8, "0x%llx", NULL },\r
+ { "PhysicalBaseAddress", 8, "0x%llx", NULL },\r
+ { "GICV", 8, "0x%llx", NULL },\r
+ { "GICH", 8, "0x%llx", NULL },\r
+ { "VGICMaintenanceInterrupt", 4, "0x%x", NULL },\r
+ { "GICRBaseAddress", 8, "0x%llx", NULL },\r
+ { "MPIDR", 8, "0x%llx", NULL },\r
+ { "ProcessorPowerEfficiencyClass", 1, "0x%x", NULL },\r
+ { "SpeOverflowInterrupt", 2, "0x%x", NULL },\r
+ { "ProximityDomain", 4, "0x%x", NULL },\r
+ { "ClockDomain", 4, "0x%x", NULL },\r
+ { "AffinityFlags", 4, "0x%x", NULL },\r
+ { "CpcToken", sizeof (CM_OBJECT_TOKEN), "0x%p", NULL }\r
};\r
\r
/** A parser for EArmObjGicDInfo.\r
ARRAY_SIZE (CmArmGenericInterruptParser) },\r
};\r
\r
+/** A parser for EArmObjCpcInfo.\r
+*/\r
+STATIC CONST CM_OBJ_PARSER CmArmCpcInfoParser[] = {\r
+ { "Revision", 4, "0x%lx", NULL },\r
+ { "HighestPerformanceBuffer", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),\r
+ NULL, NULL, AcpiGenericAddressParser,\r
+ ARRAY_SIZE (AcpiGenericAddressParser) },\r
+ { "HighestPerformanceInteger", 4, "0x%lx", NULL },\r
+ { "NominalPerformanceBuffer", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),\r
+ NULL, NULL, AcpiGenericAddressParser,\r
+ ARRAY_SIZE (AcpiGenericAddressParser) },\r
+ { "NominalPerformanceInteger", 4, "0x%lx", NULL },\r
+ { "LowestNonlinearPerformanceBuffer", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),\r
+ NULL, NULL, AcpiGenericAddressParser,\r
+ ARRAY_SIZE (AcpiGenericAddressParser) },\r
+ { "LowestNonlinearPerformanceInteger", 4, "0x%lx", NULL },\r
+ { "LowestPerformanceBuffer", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),\r
+ NULL, NULL, AcpiGenericAddressParser,\r
+ ARRAY_SIZE (AcpiGenericAddressParser) },\r
+ { "LowestPerformanceInteger", 4, "0x%lx", NULL },\r
+ { "GuaranteedPerformanceRegister", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),\r
+ NULL, NULL, AcpiGenericAddressParser,\r
+ ARRAY_SIZE (AcpiGenericAddressParser) },\r
+ { "DesiredPerformanceRegister", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),\r
+ NULL, NULL, AcpiGenericAddressParser,\r
+ ARRAY_SIZE (AcpiGenericAddressParser) },\r
+ { "MinimumPerformanceRegister", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),\r
+ NULL, NULL, AcpiGenericAddressParser,\r
+ ARRAY_SIZE (AcpiGenericAddressParser) },\r
+ { "MaximumPerformanceRegister", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),\r
+ NULL, NULL, AcpiGenericAddressParser,\r
+ ARRAY_SIZE (AcpiGenericAddressParser) },\r
+ { "PerformanceReductionToleranceRegister", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),\r
+ NULL, NULL, AcpiGenericAddressParser,\r
+ ARRAY_SIZE (AcpiGenericAddressParser) },\r
+ { "TimeWindowRegister", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),\r
+ NULL, NULL, AcpiGenericAddressParser,\r
+ ARRAY_SIZE (AcpiGenericAddressParser) },\r
+ { "CounterWraparoundTimeBuffer", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),\r
+ NULL, NULL, AcpiGenericAddressParser,\r
+ ARRAY_SIZE (AcpiGenericAddressParser) },\r
+ { "CounterWraparoundTimeInteger", 4, "0x%lx", NULL },\r
+ { "ReferencePerformanceCounterRegister", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),\r
+ NULL, NULL, AcpiGenericAddressParser,\r
+ ARRAY_SIZE (AcpiGenericAddressParser) },\r
+ { "DeliveredPerformanceCounterRegister", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),\r
+ NULL, NULL, AcpiGenericAddressParser,\r
+ ARRAY_SIZE (AcpiGenericAddressParser) },\r
+ { "PerformanceLimitedRegister", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),\r
+ NULL, NULL, AcpiGenericAddressParser,\r
+ ARRAY_SIZE (AcpiGenericAddressParser) },\r
+ { "CPPCEnableRegister", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),\r
+ NULL, NULL, AcpiGenericAddressParser,\r
+ ARRAY_SIZE (AcpiGenericAddressParser) },\r
+ { "AutonomousSelectionEnableBuffer", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),\r
+ NULL, NULL, AcpiGenericAddressParser,\r
+ ARRAY_SIZE (AcpiGenericAddressParser) },\r
+ { "AutonomousSelectionEnableInteger", 4, "0x%lx", NULL },\r
+ { "AutonomousActivityWindowRegister", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),\r
+ NULL, NULL, AcpiGenericAddressParser,\r
+ ARRAY_SIZE (AcpiGenericAddressParser) },\r
+ { "EnergyPerformancePreferenceRegister", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),\r
+ NULL, NULL, AcpiGenericAddressParser,\r
+ ARRAY_SIZE (AcpiGenericAddressParser) },\r
+ { "ReferencePerformanceBuffer", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),\r
+ NULL, NULL, AcpiGenericAddressParser,\r
+ ARRAY_SIZE (AcpiGenericAddressParser) },\r
+ { "ReferencePerformanceInteger", 4, "0x%lx", NULL },\r
+ { "LowestFrequencyBuffer", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),\r
+ NULL, NULL, AcpiGenericAddressParser,\r
+ ARRAY_SIZE (AcpiGenericAddressParser) },\r
+ { "LowestFrequencyInteger", 4, "0x%lx", NULL },\r
+ { "NominalFrequencyBuffer", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),\r
+ NULL, NULL, AcpiGenericAddressParser,\r
+ ARRAY_SIZE (AcpiGenericAddressParser) },\r
+ { "NominalFrequencyInteger", 4, "0x%lx", NULL },\r
+};\r
+\r
/** A parser for Arm namespace objects.\r
*/\r
STATIC CONST CM_OBJ_PARSER_ARRAY ArmNamespaceObjectParser[] = {\r
ARRAY_SIZE (CmArmPciAddressMapInfoParser) },\r
{ "EArmObjPciInterruptMapInfo", CmPciInterruptMapInfoParser,\r
ARRAY_SIZE (CmPciInterruptMapInfoParser) },\r
+ { "EArmObjCpcInfo", CmArmCpcInfoParser,\r
+ ARRAY_SIZE (CmArmCpcInfoParser) },\r
{ "EArmObjMax", NULL, 0 },\r
};\r
\r