MdePkg/Cpuid.h: Define new element in CPUID Leaf(07h) data structure.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3309

Define new element(Hybird) in CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS
(07h) data structure.

Signed-off-by: Jason Lou <yun.lou@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed: Ray Ni <ray.ni@intel.com>

diff --git a/MdePkg/Include/Register/Intel/Cpuid.h b/MdePkg/Include/Register/Intel/Cpuid.h
index 19af99b6afa7921daec01600994bee4b216ebe25..6f77e174c115bd08bb9508f286b8c3e55a18dcee 100644 (file)
--- a/MdePkg/Include/Register/Intel/Cpuid.h
+++ b/MdePkg/Include/Register/Intel/Cpuid.h
@@ -6,7 +6,7 @@
   If a register returned is a single 32-bit value, then a data structure is\r
   not provided for that register.\r
 \r
-  Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2015 - 2021, Intel Corporation. All rights reserved.<BR>\r
   SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
   @par Specification Reference:\r
@@ -1550,9 +1550,17 @@ typedef union {
     ///\r
     UINT32  AVX512_4FMAPS:1;\r
     ///\r
-    /// [Bit 25:4] Reserved.\r
+    /// [Bit 14:4] Reserved.\r
     ///\r
-    UINT32  Reserved2:22;\r
+    UINT32  Reserved4:11;\r
+    ///\r
+    /// [Bit 15] Hybrid. If 1, the processor is identified as a hybrid part.\r
+    ///\r
+    UINT32  Hybrid:1;\r
+    ///\r
+    /// [Bit 25:16] Reserved.\r
+    ///\r
+    UINT32  Reserved5:10;\r
     ///\r
     /// [Bit 26] Enumerates support for indirect branch restricted speculation\r
     /// (IBRS) and the indirect branch pre-dictor barrier (IBPB). Processors\r