BaseTools/GenFw: remove ARM and RVCT references from ELF64 code

ARM and RVCT apply to 32-bit code only, so remove any references
to them (including the workaround for the linker) from the 64-bit
version of ElfConvert.c

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18539 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/BaseTools/Source/C/GenFw/Elf64Convert.c b/BaseTools/Source/C/GenFw/Elf64Convert.c
index a3f1f5d3d4c7bdbbc91a394e97a36f88166fd45c..90d80a22daf2708310b7b3e0ea07159fd62c460f 100644 (file)
--- a/BaseTools/Source/C/GenFw/Elf64Convert.c
+++ b/BaseTools/Source/C/GenFw/Elf64Convert.c
@@ -334,12 +334,8 @@ ScanSections64 (
         if ((shdr->sh_addr & (shdr->sh_addralign - 1)) == 0) {\r
           // if the section address is aligned we must align PE/COFF\r
           mCoffOffset = (UINT32) ((mCoffOffset + shdr->sh_addralign - 1) & ~(shdr->sh_addralign - 1));\r
-        } else if ((shdr->sh_addr % shdr->sh_addralign) != (mCoffOffset % shdr->sh_addralign)) {\r
-          // ARM RVCT tools have behavior outside of the ELF specification to try\r
-          // and make images smaller.  If sh_addr is not aligned to sh_addralign\r
-          // then the section needs to preserve sh_addr MOD sh_addralign.\r
-          // Normally doing nothing here works great.\r
-          Error (NULL, 0, 3000, "Invalid", "Unsupported section alignment.");\r
+        } else {\r
+          Error (NULL, 0, 3000, "Invalid", "Section address not aligned to its own alignment.");\r
         }\r
       }\r
 \r
@@ -369,10 +365,7 @@ ScanSections64 (
   }\r
 \r
   mDebugOffset = DebugRvaAlign(mCoffOffset);\r
-\r
-  if (mEhdr->e_machine != EM_ARM) {\r
-    mCoffOffset = CoffAlign(mCoffOffset);\r
-  }\r
+  mCoffOffset = CoffAlign(mCoffOffset);\r
 \r
   if (SectionCount > 1 && mOutImageType == FW_EFI_IMAGE) {\r
     Warning (NULL, 0, 0, NULL, "Mulitple sections in %s are merged into 1 text section. Source level debug might not work correctly.", mInImageName);\r
@@ -392,12 +385,8 @@ ScanSections64 (
         if ((shdr->sh_addr & (shdr->sh_addralign - 1)) == 0) {\r
           // if the section address is aligned we must align PE/COFF\r
           mCoffOffset = (UINT32) ((mCoffOffset + shdr->sh_addralign - 1) & ~(shdr->sh_addralign - 1));\r
-        } else if ((shdr->sh_addr % shdr->sh_addralign) != (mCoffOffset % shdr->sh_addralign)) {\r
-          // ARM RVCT tools have behavior outside of the ELF specification to try\r
-          // and make images smaller.  If sh_addr is not aligned to sh_addralign\r
-          // then the section needs to preserve sh_addr MOD sh_addralign.\r
-          // Normally doing nothing here works great.\r
-          Error (NULL, 0, 3000, "Invalid", "Unsupported section alignment.");\r
+        } else {\r
+          Error (NULL, 0, 3000, "Invalid", "Section address not aligned to its own alignment.");\r
         }\r
       }\r
 \r
@@ -448,12 +437,8 @@ ScanSections64 (
         if ((shdr->sh_addr & (shdr->sh_addralign - 1)) == 0) {\r
           // if the section address is aligned we must align PE/COFF\r
           mCoffOffset = (UINT32) ((mCoffOffset + shdr->sh_addralign - 1) & ~(shdr->sh_addralign - 1));\r
-        } else if ((shdr->sh_addr % shdr->sh_addralign) != (mCoffOffset % shdr->sh_addralign)) {\r
-          // ARM RVCT tools have behavior outside of the ELF specification to try\r
-          // and make images smaller.  If sh_addr is not aligned to sh_addralign\r
-          // then the section needs to preserve sh_addr MOD sh_addralign.\r
-          // Normally doing nothing here works great.\r
-          Error (NULL, 0, 3000, "Invalid", "Unsupported section alignment.");\r
+        } else {\r
+          Error (NULL, 0, 3000, "Invalid", "Section address not aligned to its own alignment.");\r
         }\r
       }\r
       if (shdr->sh_size != 0) {\r