UefiCpuPkg/ExceptionLib: Add CET support.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1521

Add information dump for Control Protection exception.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yao Jiewen <jiewen.yao@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>

diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.c
index 0576144a97dfa5ac2c9055d97df6e364d84d61a2..ca210d1de206cca229d1a4e6e9f0d373c52332e5 100644 (file)
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.c
@@ -1,7 +1,7 @@
 /** @file\r
   CPU Exception Handler Library common functions.\r
 \r
-  Copyright (c) 2012 - 2018, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2012 - 2019, Intel Corporation. All rights reserved.<BR>\r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
@@ -20,7 +20,7 @@
 //\r
 // 1 means an error code will be pushed, otherwise 0\r
 //\r
-CONST UINT32 mErrorCodeFlag = 0x00027d00;\r
+CONST UINT32 mErrorCodeFlag = 0x00227d00;\r
 \r
 //\r
 // Define the maximum message length\r
@@ -49,7 +49,8 @@ CONST CHAR8 *mExceptionNameStr[] = {
   "#AC - Alignment Check",\r
   "#MC - Machine-Check",\r
   "#XM - SIMD floating-point",\r
-  "#VE - Virtualization"\r
+  "#VE - Virtualization",\r
+  "#CP - Control Protection"\r
 };\r
 \r
 #define EXCEPTION_KNOWN_NAME_NUM  (sizeof (mExceptionNameStr) / sizeof (CHAR8 *))\r

diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h b/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h
index 83e55ab828362fc40876c2ac9b8381f15e989422..edf46cb60d40be491fe1b78baa684ee24b052153 100644 (file)
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h
@@ -1,7 +1,7 @@
 /** @file\r
   Common header file for CPU Exception Handler Library.\r
 \r
-  Copyright (c) 2012 - 2018, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2012 - 2019, Intel Corporation. All rights reserved.<BR>\r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
@@ -39,6 +39,7 @@
 #define IA32_PF_EC_RSVD             BIT3\r
 #define IA32_PF_EC_ID               BIT4\r
 #define IA32_PF_EC_PK               BIT5\r
+#define IA32_PF_EC_SS               BIT6\r
 #define IA32_PF_EC_SGX              BIT15\r
 \r
 #include "ArchInterruptDefs.h"\r

diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c
index 531258610aa9b651b86ce9b0ecc7a2ef529f2526..f3d993af75f0f07e91df9cda7afb634169f96703 100644 (file)
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c
@@ -1,7 +1,7 @@
 /** @file\r
   IA32 CPU Exception Handler functons.\r
 \r
-  Copyright (c) 2012 - 2018, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2012 - 2019, Intel Corporation. All rights reserved.<BR>\r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
@@ -326,13 +326,14 @@ DumpCpuContext (
       );\r
     if (ExceptionType == EXCEPT_IA32_PAGE_FAULT) {\r
       InternalPrintMessage (\r
-        "  I:%x R:%x U:%x W:%x P:%x PK:%x S:%x",\r
+        "  I:%x R:%x U:%x W:%x P:%x PK:%x SS:%x SGX:%x",\r
         (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_ID)   != 0,\r
         (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_RSVD) != 0,\r
         (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_US)   != 0,\r
         (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_WR)   != 0,\r
         (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_P)    != 0,\r
         (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_PK)   != 0,\r
+        (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_SS)   != 0,\r
         (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_SGX)  != 0\r
         );\r
     }\r

diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c
index d7e883d19aade8840eda2a54720826f7754c2b06..0183239e598fd65031603b94dd2b2d22973d0b69 100644 (file)
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c
@@ -1,7 +1,7 @@
 /** @file\r
   x64 CPU Exception Handler.\r
 \r
-  Copyright (c) 2012 - 2018, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2012 - 2019, Intel Corporation. All rights reserved.<BR>\r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
@@ -299,13 +299,14 @@ DumpCpuContext (
       );\r
     if (ExceptionType == EXCEPT_IA32_PAGE_FAULT) {\r
       InternalPrintMessage (\r
-        "  I:%x R:%x U:%x W:%x P:%x PK:%x S:%x",\r
+        "  I:%x R:%x U:%x W:%x P:%x PK:%x SS:%x SGX:%x",\r
         (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_ID)   != 0,\r
         (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_RSVD) != 0,\r
         (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_US)   != 0,\r
         (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_WR)   != 0,\r
         (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_P)    != 0,\r
         (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_PK)   != 0,\r
+        (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_SS)   != 0,\r
         (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_SGX)  != 0\r
         );\r
     }\r