ArmPkg/ArmGicLib: Add ArmGicSetInterruptPriority() helper function

According to ARM IHI 0069F, section 11.9.18 GICD_IPRIORITYR<n>,
Interrupt Priority Registers, n = 0 - 254, when affinity routing is
enabled for the Security state of an interrupt, GICR_IPRIORITYR<n>
is used instead of GICD_IPRIORITYR<n> where n = 0 to 7 (that is, for
SGIs and PPIs).

As setting interrupt priority for SGIs and PPIs are handled using
difference registers depends on the mode, this patch instroduces
ArmGicSetInterruptPriority() helper function to handle the discrepancy.

Cc: Leif Lindholm <leif@nuviainc.com>
Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com>
Reviewed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com>

diff --git a/ArmPkg/Drivers/ArmGic/ArmGicLib.c b/ArmPkg/Drivers/ArmGic/ArmGicLib.c
index 001e6b1431048bd1d1f3c6cc483d395abcb36d50..8ef32b33a154ff3df9d86ae30df4ab21cc806b32 100644 (file)
--- a/ArmPkg/Drivers/ArmGic/ArmGicLib.c
+++ b/ArmPkg/Drivers/ArmGic/ArmGicLib.c
@@ -199,6 +199,50 @@ ArmGicEndOfInterrupt (
   }\r
 }\r
 \r
+VOID\r
+EFIAPI\r
+ArmGicSetInterruptPriority (\r
+  IN UINTN                  GicDistributorBase,\r
+  IN UINTN                  GicRedistributorBase,\r
+  IN UINTN                  Source,\r
+  IN UINTN                  Priority\r
+  )\r
+{\r
+  UINT32                RegOffset;\r
+  UINTN                 RegShift;\r
+  ARM_GIC_ARCH_REVISION Revision;\r
+  UINTN                 GicCpuRedistributorBase;\r
+\r
+  // Calculate register offset and bit position\r
+  RegOffset = Source / 4;\r
+  RegShift = (Source % 4) * 8;\r
+\r
+  Revision = ArmGicGetSupportedArchRevision ();\r
+  if ((Revision == ARM_GIC_ARCH_REVISION_2) ||\r
+      FeaturePcdGet (PcdArmGicV3WithV2Legacy) ||\r
+      SourceIsSpi (Source)) {\r
+    MmioAndThenOr32 (\r
+      GicDistributorBase + ARM_GIC_ICDIPR + (4 * RegOffset),\r
+      ~(0xff << RegShift),\r
+      Priority << RegShift\r
+      );\r
+  } else {\r
+    GicCpuRedistributorBase = GicGetCpuRedistributorBase (\r
+                                GicRedistributorBase,\r
+                                Revision\r
+                                );\r
+    if (GicCpuRedistributorBase == 0) {\r
+      return;\r
+    }\r
+\r
+    MmioAndThenOr32 (\r
+      GicCpuRedistributorBase + ARM_GIC_ICDIPR + (4 * RegOffset),\r
+      ~(0xff << RegShift),\r
+      Priority << RegShift\r
+      );\r
+  }\r
+}\r
+\r
 VOID\r
 EFIAPI\r
 ArmGicEnableInterrupt (\r

diff --git a/ArmPkg/Include/Library/ArmGicLib.h b/ArmPkg/Include/Library/ArmGicLib.h
index 55093189638b446039bd41e22aa53b70ec75de30..7bcfc001115b9fd82bbf262bbc893c74cc813b81 100644 (file)
--- a/ArmPkg/Include/Library/ArmGicLib.h
+++ b/ArmPkg/Include/Library/ArmGicLib.h
@@ -208,6 +208,15 @@ ArmGicSetPriorityMask (
   IN  INTN          PriorityMask\r
   );\r
 \r
+VOID\r
+EFIAPI\r
+ArmGicSetInterruptPriority (\r
+  IN UINTN                  GicDistributorBase,\r
+  IN UINTN                  GicRedistributorBase,\r
+  IN UINTN                  Source,\r
+  IN UINTN                  Priority\r
+  );\r
+\r
 VOID\r
 EFIAPI\r
 ArmGicEnableInterrupt (\r