--- /dev/null
+/** @file\r
+ Processor or Compiler specific defines and types for LoongArch\r
+\r
+ Copyright (c) 2022, Loongson Technology Corporation Limited. All rights reserved.<BR>\r
+\r
+ SPDX-License-Identifier: BSD-2-Clause-Patent\r
+\r
+**/\r
+#ifndef PROCESSOR_BIND_H_\r
+#define PROCESSOR_BIND_H_\r
+\r
+//\r
+// Define the processor type so other code can make processor based choices\r
+//\r
+#define MDE_CPU_LOONGARCH64\r
+\r
+#define EFIAPI\r
+\r
+//\r
+// Make sure we are using the correct packing rules per EFI specification\r
+//\r
+#ifndef __GNUC__\r
+#pragma pack()\r
+#endif\r
+\r
+//\r
+// Use ANSI C 2000 stdint.h integer width declarations\r
+//\r
+#include <stdint.h>\r
+typedef uint8_t BOOLEAN;\r
+typedef int8_t INT8;\r
+typedef uint8_t UINT8;\r
+typedef int16_t INT16;\r
+typedef uint16_t UINT16;\r
+typedef int32_t INT32;\r
+typedef uint32_t UINT32;\r
+typedef int64_t INT64;\r
+typedef uint64_t UINT64;\r
+typedef char CHAR8;\r
+typedef uint16_t CHAR16;\r
+\r
+//\r
+// Unsigned value of native width. (4 bytes on supported 32-bit processor instructions,\r
+// 8 bytes on supported 64-bit processor instructions)\r
+//\r
+typedef UINT64 UINTN;\r
+\r
+//\r
+// Signed value of native width. (4 bytes on supported 32-bit processor instructions,\r
+// 8 bytes on supported 64-bit processor instructions)\r
+//\r
+typedef INT64 INTN;\r
+\r
+//\r
+// Processor specific defines\r
+//\r
+\r
+//\r
+// A value of native width with the highest bit set.\r
+//\r
+#define MAX_BIT 0x8000000000000000ULL\r
+//\r
+// A value of native width with the two highest bits set.\r
+//\r
+#define MAX_2_BITS 0xC000000000000000ULL\r
+\r
+#if defined (__GNUC__)\r
+//\r
+// For GNU assembly code, .global or .globl can declare global symbols.\r
+// Define this macro to unify the usage.\r
+//\r
+#define ASM_GLOBAL .globl\r
+#endif\r
+\r
+//\r
+// The stack alignment required for LoongArch\r
+//\r
+#define CPU_STACK_ALIGNMENT 16\r
+\r
+#endif\r