]> git.proxmox.com Git - mirror_edk2.git/commitdiff
ArmVirtualizationPkg/PciHostBridgeDxe: translate addresses for IO
authorLaszlo Ersek <lersek@redhat.com>
Mon, 23 Feb 2015 16:03:16 +0000 (16:03 +0000)
committerlersek <lersek@Edk2>
Mon, 23 Feb 2015 16:03:16 +0000 (16:03 +0000)
Unlike the one in PcAtChipsetPkg, our PciHostBridgeDxe module must handle
address space translation. IO addresses expressed in the respective
aperture are mapped to a different base in CPU address space.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16899 6f19259b-4bc3-4df7-8a09-765794883524

ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridge.h
ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciRootBridgeIo.c

index 6e9bd84c478127a84470f1667619cbd655c258b3..cbceca4bcf49c399204b94339b526039e4197442 100644 (file)
@@ -457,6 +457,7 @@ typedef struct {
   UINT64                 BusLimit;     \r
   UINT64                 MemLimit;    \r
   UINT64                 IoLimit;     \r
+  UINT64                 IoTranslation;\r
 \r
   EFI_DEVICE_PATH_PROTOCOL                *DevicePath;\r
   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL         Io;\r
index 7c35e85c63fd7495b435441ddca94f305492c4ab..85048b2f7417fd399552bb83cf3e47f3a7750dd8 100644 (file)
@@ -640,11 +640,13 @@ RootBridgeConstructor (
   PrivateData = DRIVER_INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS (Protocol);\r
 \r
   //\r
-  // The host to pci bridge, the host memory and io addresses are\r
-  // direct mapped to pci addresses, so no need translate, set bases to 0.\r
+  // The host to PCI bridge. The host memory addresses are direct mapped to PCI\r
+  // addresses, so there's no need to translate them. IO addresses need\r
+  // translation however.\r
   //\r
-  PrivateData->MemBase = ResAperture->MemBase;\r
-  PrivateData->IoBase  = ResAperture->IoBase;\r
+  PrivateData->MemBase       = ResAperture->MemBase;\r
+  PrivateData->IoBase        = ResAperture->IoBase;\r
+  PrivateData->IoTranslation = ResAperture->IoTranslation;\r
 \r
   //\r
   // The host bridge only supports 32bit addressing for memory\r
@@ -978,6 +980,7 @@ RootBridgeIoIoRW (
   )\r
 {\r
   EFI_STATUS                             Status;\r
+  PCI_ROOT_BRIDGE_INSTANCE               *PrivateData;\r
   UINT8                                  InStride;\r
   UINT8                                  OutStride;\r
   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH  OperationWidth;\r
@@ -988,6 +991,15 @@ RootBridgeIoIoRW (
     return Status;\r
   }\r
 \r
+  PrivateData = DRIVER_INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS (This);\r
+  //\r
+  // The addition below is performed in UINT64 modular arithmetic, in\r
+  // accordance with the definition of PcdPciIoTranslation in\r
+  // "ArmPlatformPkg.dec". Meaning, the addition below may in fact *decrease*\r
+  // Address, implementing a negative offset translation.\r
+  //\r
+  Address += PrivateData->IoTranslation;\r
+\r
   InStride = mInStride[Width];\r
   OutStride = mOutStride[Width];\r
   OperationWidth = (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) (Width & 0x03);\r