+++ /dev/null
-/** @file\r
- This driver will report some MMIO/IO resources to dxe core, extract smbios and acpi \r
- tables from coreboot and install.\r
- \r
- Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
- This program and the accompanying materials\r
- are licensed and made available under the terms and conditions of the BSD License\r
- which accompanies this distribution. The full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php.\r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-#include "CbSupportDxe.h"\r
-\r
-UINTN mPmCtrlReg = 0;\r
-/**\r
- Reserve MMIO/IO resource in GCD\r
-\r
- @param IsMMIO Flag of whether it is mmio resource or io resource.\r
- @param GcdType Type of the space.\r
- @param BaseAddress Base address of the space.\r
- @param Length Length of the space.\r
- @param Alignment Align with 2^Alignment\r
- @param ImageHandle Handle for the image of this driver.\r
-\r
- @retval EFI_SUCCESS Reserve successful\r
-**/\r
-EFI_STATUS\r
-CbReserveResourceInGcd (\r
- IN BOOLEAN IsMMIO,\r
- IN UINTN GcdType,\r
- IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
- IN UINT64 Length,\r
- IN UINTN Alignment,\r
- IN EFI_HANDLE ImageHandle\r
- )\r
-{\r
- EFI_STATUS Status;\r
-\r
- if (IsMMIO) {\r
- Status = gDS->AddMemorySpace (\r
- GcdType,\r
- BaseAddress,\r
- Length,\r
- EFI_MEMORY_UC\r
- );\r
- if (EFI_ERROR (Status)) {\r
- DEBUG ((\r
- EFI_D_ERROR,\r
- "Failed to add memory space :0x%x 0x%x\n",\r
- BaseAddress,\r
- Length\r
- ));\r
- }\r
- ASSERT_EFI_ERROR (Status);\r
- Status = gDS->AllocateMemorySpace (\r
- EfiGcdAllocateAddress,\r
- GcdType,\r
- Alignment,\r
- Length,\r
- &BaseAddress,\r
- ImageHandle,\r
- NULL\r
- );\r
- ASSERT_EFI_ERROR (Status);\r
- } else {\r
- Status = gDS->AddIoSpace (\r
- GcdType,\r
- BaseAddress,\r
- Length\r
- );\r
- ASSERT_EFI_ERROR (Status);\r
- Status = gDS->AllocateIoSpace (\r
- EfiGcdAllocateAddress,\r
- GcdType,\r
- Alignment,\r
- Length,\r
- &BaseAddress,\r
- ImageHandle,\r
- NULL\r
- );\r
- ASSERT_EFI_ERROR (Status);\r
- }\r
- return Status;\r
-}\r
-\r
-/**\r
- Notification function of EVT_GROUP_READY_TO_BOOT event group.\r
-\r
- This is a notification function registered on EVT_GROUP_READY_TO_BOOT event group.\r
- When the Boot Manager is about to load and execute a boot option, it reclaims variable\r
- storage if free size is below the threshold.\r
-\r
- @param Event Event whose notification function is being invoked.\r
- @param Context Pointer to the notification function's context.\r
-\r
-**/\r
-VOID\r
-OnReadyToBoot (\r
- EFI_EVENT Event,\r
- VOID *Context\r
- )\r
-{ \r
- //\r
- // Enable SCI\r
- //\r
- IoOr16 (mPmCtrlReg, BIT0);\r
- \r
- DEBUG ((EFI_D_ERROR, "Enable SCI bit at 0x%x before boot\n", mPmCtrlReg)); \r
-}\r
-\r
-/**\r
- Main entry for the Coreboot Support DXE module.\r
- \r
- @param[in] ImageHandle The firmware allocated handle for the EFI image.\r
- @param[in] SystemTable A pointer to the EFI System Table.\r
- \r
- @retval EFI_SUCCESS The entry point is executed successfully.\r
- @retval other Some error occurs when executing this entry point.\r
-\r
-**/\r
-EFI_STATUS\r
-CbDxeEntryPoint (\r
- IN EFI_HANDLE ImageHandle,\r
- IN EFI_SYSTEM_TABLE *SystemTable\r
- )\r
-{ \r
- EFI_STATUS Status;\r
- EFI_EVENT ReadyToBootEvent;\r
- EFI_HOB_GUID_TYPE *GuidHob;\r
- SYSTEM_TABLE_INFO *pSystemTableInfo;\r
- ACPI_BOARD_INFO *pAcpiBoardInfo;\r
- \r
- Status = EFI_SUCCESS;\r
- //\r
- // Report MMIO/IO Resources\r
- //\r
- Status = CbReserveResourceInGcd (TRUE, EfiGcdMemoryTypeMemoryMappedIo, 0xFEE00000, SIZE_1MB, 0, SystemTable); // LAPIC \r
- ASSERT_EFI_ERROR (Status);\r
- \r
- Status = CbReserveResourceInGcd (TRUE, EfiGcdMemoryTypeMemoryMappedIo, 0xFEC00000, SIZE_4KB, 0, SystemTable); // IOAPIC \r
- ASSERT_EFI_ERROR (Status);\r
- \r
- Status = CbReserveResourceInGcd (TRUE, EfiGcdMemoryTypeMemoryMappedIo, 0xFED00000, SIZE_1KB, 0, SystemTable); // HPET \r
- ASSERT_EFI_ERROR (Status);\r
- \r
- //\r
- // Find the system table information guid hob\r
- //\r
- GuidHob = GetFirstGuidHob (&gUefiSystemTableInfoGuid);\r
- ASSERT (GuidHob != NULL);\r
- pSystemTableInfo = (SYSTEM_TABLE_INFO *)GET_GUID_HOB_DATA (GuidHob);\r
- \r
- //\r
- // Install Acpi Table\r
- //\r
- if (pSystemTableInfo->AcpiTableBase != 0 && pSystemTableInfo->AcpiTableSize != 0) { \r
- DEBUG ((EFI_D_ERROR, "Install Acpi Table at 0x%x, length 0x%x\n", (UINTN)pSystemTableInfo->AcpiTableBase, pSystemTableInfo->AcpiTableSize)); \r
- Status = gBS->InstallConfigurationTable (&gEfiAcpiTableGuid, (VOID *)(UINTN)pSystemTableInfo->AcpiTableBase);\r
- ASSERT_EFI_ERROR (Status);\r
- }\r
- \r
- //\r
- // Install Smbios Table\r
- //\r
- if (pSystemTableInfo->SmbiosTableBase != 0 && pSystemTableInfo->SmbiosTableSize != 0) { \r
- DEBUG ((EFI_D_ERROR, "Install Smbios Table at 0x%x, length 0x%x\n", (UINTN)pSystemTableInfo->SmbiosTableBase, pSystemTableInfo->SmbiosTableSize)); \r
- Status = gBS->InstallConfigurationTable (&gEfiSmbiosTableGuid, (VOID *)(UINTN)pSystemTableInfo->SmbiosTableBase);\r
- ASSERT_EFI_ERROR (Status);\r
- }\r
- \r
- //\r
- // Find the acpi board information guid hob\r
- //\r
- GuidHob = GetFirstGuidHob (&gUefiAcpiBoardInfoGuid);\r
- ASSERT (GuidHob != NULL);\r
- pAcpiBoardInfo = (ACPI_BOARD_INFO *)GET_GUID_HOB_DATA (GuidHob); \r
- \r
- mPmCtrlReg = (UINTN)pAcpiBoardInfo->PmCtrlRegBase;\r
- DEBUG ((EFI_D_ERROR, "PmCtrlReg at 0x%x\n", mPmCtrlReg)); \r
- \r
- //\r
- // Register callback on the ready to boot event \r
- // in order to enable SCI\r
- // \r
- ReadyToBootEvent = NULL;\r
- Status = EfiCreateEventReadyToBootEx (\r
- TPL_CALLBACK,\r
- OnReadyToBoot,\r
- NULL,\r
- &ReadyToBootEvent\r
- );\r
- ASSERT_EFI_ERROR (Status);\r
- \r
- return EFI_SUCCESS;\r
-}\r
-\r
+++ /dev/null
-/** @file\r
- The header file of Coreboot Support DXE.\r
-\r
-Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
-This program and the accompanying materials\r
-are licensed and made available under the terms and conditions of the BSD License\r
-which accompanies this distribution. The full text of the license may be found at\r
-http://opensource.org/licenses/bsd-license.php\r
-\r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-#ifndef __DXE_COREBOOT_SUPPORT_H__\r
-#define __DXE_COREBOOT_SUPPORT_H__\r
-\r
-#include <PiDxe.h>\r
-\r
-#include <Library/UefiDriverEntryPoint.h>\r
-#include <Library/UefiBootServicesTableLib.h>\r
-#include <Library/DxeServicesTableLib.h>\r
-#include <Library/DebugLib.h>\r
-#include <Library/BaseMemoryLib.h>\r
-#include <Library/UefiLib.h>\r
-#include <Library/IoLib.h>\r
-#include <Library/HobLib.h>\r
-\r
-#include <Guid/Acpi.h>\r
-#include <Guid/SmBios.h>\r
-#include <Guid/SystemTableInfoGuid.h>\r
-#include <Guid/AcpiBoardInfoGuid.h>\r
-\r
-#include <IndustryStandard/Acpi.h>\r
-\r
-#endif\r
+++ /dev/null
-## @file\r
-# Coreboot Support DXE Module\r
-#\r
-# Report some MMIO/IO resources to dxe core, extract smbios and acpi tables from coreboot and install.\r
-#\r
-# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
-#\r
-# This program and the accompanying materials\r
-# are licensed and made available under the terms and conditions of the BSD License\r
-# which accompanies this distribution. The full text of the license may be found at\r
-# http://opensource.org/licenses/bsd-license.php.\r
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-#\r
-##\r
-\r
-[Defines]\r
- INF_VERSION = 0x00010005\r
- BASE_NAME = CbSupportDxe\r
- FILE_GUID = C68DAA4E-7AB5-41e8-A91D-5954421053F3\r
- MODULE_TYPE = DXE_DRIVER\r
- VERSION_STRING = 1.0\r
- ENTRY_POINT = CbDxeEntryPoint\r
-\r
-#\r
-# The following information is for reference only and not required by the build tools.\r
-#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
-#\r
-\r
-[Sources]\r
- CbSupportDxe.c\r
- CbSupportDxe.h\r
-\r
-[Packages]\r
- MdePkg/MdePkg.dec\r
- MdeModulePkg/MdeModulePkg.dec\r
- IntelFrameworkPkg/IntelFrameworkPkg.dec\r
- IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec\r
- CorebootModulePkg/CorebootModulePkg.dec\r
-\r
-[LibraryClasses]\r
- UefiDriverEntryPoint\r
- UefiBootServicesTableLib\r
- DxeServicesTableLib\r
- DebugLib\r
- BaseMemoryLib\r
- UefiLib\r
- IoLib\r
- HobLib\r
-\r
-[Guids] \r
- gEfiAcpiTableGuid\r
- gEfiSmbiosTableGuid\r
- gUefiSystemTableInfoGuid\r
- gUefiAcpiBoardInfoGuid\r
-\r
-[Depex]\r
- TRUE\r
+++ /dev/null
-/** @file\r
- This PEIM will parse coreboot table in memory and report resource information into pei core. \r
- This file contains the main entrypoint of the PEIM.\r
- \r
-Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
-This program and the accompanying materials\r
-are licensed and made available under the terms and conditions of the BSD License\r
-which accompanies this distribution. The full text of the license may be found at\r
-http://opensource.org/licenses/bsd-license.php\r
-\r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-#include "CbSupportPei.h"\r
-\r
-EFI_MEMORY_TYPE_INFORMATION mDefaultMemoryTypeInformation[] = {\r
- { EfiACPIReclaimMemory, 0x008 }, \r
- { EfiACPIMemoryNVS, 0x004 }, \r
- { EfiReservedMemoryType, 0x004 }, \r
- { EfiRuntimeServicesData, 0x080 },\r
- { EfiRuntimeServicesCode, 0x080 },\r
- { EfiMaxMemoryType, 0 }\r
-};\r
-\r
-EFI_PEI_PPI_DESCRIPTOR mPpiBootMode[] = {\r
- {\r
- EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,\r
- &gEfiPeiMasterBootModePpiGuid,\r
- NULL\r
- }\r
-};\r
-\r
-/**\r
- Create memory mapped io resource hob. \r
- \r
- @param MmioBase Base address of the memory mapped io range\r
- @param MmioSize Length of the memory mapped io range\r
- \r
-**/\r
-VOID\r
-BuildMemoryMappedIoRangeHob (\r
- EFI_PHYSICAL_ADDRESS MmioBase,\r
- UINT64 MmioSize\r
- )\r
-{\r
- BuildResourceDescriptorHob (\r
- EFI_RESOURCE_MEMORY_MAPPED_IO,\r
- (EFI_RESOURCE_ATTRIBUTE_PRESENT |\r
- EFI_RESOURCE_ATTRIBUTE_INITIALIZED |\r
- EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |\r
- EFI_RESOURCE_ATTRIBUTE_TESTED),\r
- MmioBase,\r
- MmioSize\r
- );\r
- \r
- BuildMemoryAllocationHob (\r
- MmioBase,\r
- MmioSize,\r
- EfiMemoryMappedIO\r
- ); \r
-}\r
-\r
-/**\r
- Check the integrity of firmware volume header\r
-\r
- @param[in] FwVolHeader A pointer to a firmware volume header\r
-\r
- @retval TRUE The firmware volume is consistent\r
- @retval FALSE The firmware volume has corrupted.\r
-\r
-**/\r
-STATIC\r
-BOOLEAN\r
-IsFvHeaderValid (\r
- IN EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader\r
- )\r
-{\r
- UINT16 Checksum;\r
- \r
- // Skip nv storage fv\r
- if (CompareMem (&FwVolHeader->FileSystemGuid, &gEfiFirmwareFileSystem2Guid, sizeof(EFI_GUID)) != 0 ) {\r
- return FALSE;\r
- }\r
- \r
- if ( (FwVolHeader->Revision != EFI_FVH_REVISION) ||\r
- (FwVolHeader->Signature != EFI_FVH_SIGNATURE) ||\r
- (FwVolHeader->FvLength == ((UINTN) -1)) ||\r
- ((FwVolHeader->HeaderLength & 0x01 ) !=0) ) {\r
- return FALSE;\r
- }\r
- \r
- Checksum = CalculateCheckSum16 ((UINT16 *) FwVolHeader, FwVolHeader->HeaderLength);\r
- if (Checksum != 0) {\r
- DEBUG (( DEBUG_ERROR,\r
- "ERROR - Invalid Firmware Volume Header Checksum, change 0x%04x to 0x%04x\r\n",\r
- FwVolHeader->Checksum,\r
- (UINT16)( Checksum + FwVolHeader->Checksum )));\r
- return FALSE;\r
- }\r
-\r
- return TRUE; \r
-}\r
-\r
-/**\r
- Install FvInfo PPI and create fv hobs for remained fvs\r
- \r
-**/\r
-VOID\r
-CbPeiReportRemainedFvs (\r
- VOID\r
- )\r
-{\r
- UINT8* TempPtr;\r
- UINT8* EndPtr;\r
- \r
- TempPtr = (UINT8* )(UINTN) PcdGet32 (PcdPayloadFdMemBase);\r
- EndPtr = (UINT8* )(UINTN) (PcdGet32 (PcdPayloadFdMemBase) + PcdGet32 (PcdPayloadFdMemSize));\r
- \r
- for (;TempPtr < EndPtr;) {\r
- if (IsFvHeaderValid ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)) {\r
- if (TempPtr != (UINT8* )(UINTN) PcdGet32 (PcdPayloadFdMemBase)) {\r
- // Skip the PEI FV\r
- DEBUG((EFI_D_ERROR, "Found one valid fv : 0x%x.\n", TempPtr, ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)->FvLength)); \r
- \r
- PeiServicesInstallFvInfoPpi (\r
- NULL,\r
- (VOID *) (UINTN) TempPtr,\r
- (UINT32) (UINTN) ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)->FvLength,\r
- NULL,\r
- NULL\r
- );\r
- BuildFvHob ((EFI_PHYSICAL_ADDRESS)(UINTN) TempPtr, ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)->FvLength); \r
- } \r
- }\r
- TempPtr += ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)->FvLength; \r
- } \r
-}\r
-\r
-/**\r
- This is the entrypoint of PEIM\r
- \r
- @param FileHandle Handle of the file being invoked.\r
- @param PeiServices Describes the list of possible PEI Services.\r
-\r
- @retval EFI_SUCCESS if it completed successfully. \r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-CbPeiEntryPoint (\r
- IN EFI_PEI_FILE_HANDLE FileHandle,\r
- IN CONST EFI_PEI_SERVICES **PeiServices\r
- )\r
-{\r
- EFI_STATUS Status;\r
- UINT64 LowMemorySize, HighMemorySize;\r
- UINT64 PeiMemSize = SIZE_64MB; // 64 MB\r
- EFI_PHYSICAL_ADDRESS PeiMemBase = 0;\r
- UINT32 RegEax;\r
- UINT8 PhysicalAddressBits;\r
- VOID* pCbHeader;\r
- VOID* pAcpiTable;\r
- UINT32 AcpiTableSize;\r
- VOID* pSmbiosTable;\r
- UINT32 SmbiosTableSize;\r
- SYSTEM_TABLE_INFO* pSystemTableInfo;\r
- FRAME_BUFFER_INFO FbInfo;\r
- FRAME_BUFFER_INFO* pFbInfo;\r
- ACPI_BOARD_INFO* pAcpiBoardInfo;\r
- UINTN PmCtrlRegBase, PmTimerRegBase, ResetRegAddress, ResetValue;\r
- \r
- LowMemorySize = 0;\r
- HighMemorySize = 0;\r
- \r
- Status = CbParseMemoryInfo (&LowMemorySize, &HighMemorySize);\r
- if (EFI_ERROR(Status)) \r
- return Status;\r
- \r
- DEBUG((EFI_D_ERROR, "LowMemorySize: 0x%x.\n", LowMemorySize));\r
- DEBUG((EFI_D_ERROR, "HighMemorySize: 0x%x.\n", HighMemorySize));\r
- \r
- ASSERT (LowMemorySize > 0);\r
- \r
- BuildResourceDescriptorHob ( \r
- EFI_RESOURCE_SYSTEM_MEMORY,\r
- (\r
- EFI_RESOURCE_ATTRIBUTE_PRESENT |\r
- EFI_RESOURCE_ATTRIBUTE_INITIALIZED |\r
- EFI_RESOURCE_ATTRIBUTE_TESTED |\r
- EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |\r
- EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |\r
- EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |\r
- EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE\r
- ),\r
- (EFI_PHYSICAL_ADDRESS)(0),\r
- (UINT64)(0xA0000)\r
- );\r
- \r
- \r
- BuildResourceDescriptorHob ( \r
- EFI_RESOURCE_MEMORY_RESERVED,\r
- (\r
- EFI_RESOURCE_ATTRIBUTE_PRESENT |\r
- EFI_RESOURCE_ATTRIBUTE_INITIALIZED |\r
- EFI_RESOURCE_ATTRIBUTE_TESTED |\r
- EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |\r
- EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |\r
- EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |\r
- EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE\r
- ),\r
- (EFI_PHYSICAL_ADDRESS)(0xA0000),\r
- (UINT64)(0x60000)\r
- );\r
- \r
- BuildResourceDescriptorHob (\r
- EFI_RESOURCE_SYSTEM_MEMORY,\r
- (\r
- EFI_RESOURCE_ATTRIBUTE_PRESENT |\r
- EFI_RESOURCE_ATTRIBUTE_INITIALIZED |\r
- EFI_RESOURCE_ATTRIBUTE_TESTED |\r
- EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |\r
- EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |\r
- EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |\r
- EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE\r
- ),\r
- (EFI_PHYSICAL_ADDRESS)(0x100000),\r
- (UINT64) (LowMemorySize - 0x100000)\r
- );\r
- \r
- if (HighMemorySize > 0) {\r
- BuildResourceDescriptorHob (\r
- EFI_RESOURCE_SYSTEM_MEMORY,\r
- (\r
- EFI_RESOURCE_ATTRIBUTE_PRESENT |\r
- EFI_RESOURCE_ATTRIBUTE_INITIALIZED |\r
- EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |\r
- EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |\r
- EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |\r
- EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE\r
- ),\r
- (EFI_PHYSICAL_ADDRESS)(0x100000000),\r
- HighMemorySize\r
- ); \r
- } \r
- \r
- //\r
- // Should be 64k aligned\r
- //\r
- PeiMemBase = (LowMemorySize - PeiMemSize) & (~(BASE_64KB - 1));\r
- \r
- DEBUG((EFI_D_ERROR, "PeiMemBase: 0x%x.\n", PeiMemBase));\r
- DEBUG((EFI_D_ERROR, "PeiMemSize: 0x%x.\n", PeiMemSize)); \r
- \r
- Status = PeiServicesInstallPeiMemory (\r
- PeiMemBase, \r
- PeiMemSize\r
- );\r
- ASSERT_EFI_ERROR (Status); \r
- \r
- //\r
- // Set cache on the physical memory\r
- // \r
- MtrrSetMemoryAttribute (BASE_1MB, LowMemorySize - BASE_1MB, CacheWriteBack);\r
- MtrrSetMemoryAttribute (0, 0xA0000, CacheWriteBack);\r
- \r
- //\r
- // Create Memory Type Information HOB\r
- //\r
- BuildGuidDataHob (\r
- &gEfiMemoryTypeInformationGuid,\r
- mDefaultMemoryTypeInformation,\r
- sizeof(mDefaultMemoryTypeInformation)\r
- );\r
- \r
- //\r
- // Create Fv hob\r
- //\r
- CbPeiReportRemainedFvs (); \r
- \r
- BuildMemoryAllocationHob (\r
- PcdGet32 (PcdPayloadFdMemBase),\r
- PcdGet32 (PcdPayloadFdMemSize),\r
- EfiBootServicesData\r
- );\r
- \r
- //\r
- // Build CPU memory space and IO space hob\r
- //\r
- AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);\r
- if (RegEax >= 0x80000008) {\r
- AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL); \r
- PhysicalAddressBits = (UINT8) RegEax;\r
- } else {\r
- PhysicalAddressBits = 36;\r
- }\r
- //\r
- // Create a CPU hand-off information\r
- // \r
- BuildCpuHob (PhysicalAddressBits, 16);\r
- \r
- //\r
- // Report Local APIC range\r
- //\r
- BuildMemoryMappedIoRangeHob (0xFEC80000, SIZE_512KB);\r
- \r
- //\r
- // Boot mode\r
- //\r
- Status = PeiServicesSetBootMode (BOOT_WITH_FULL_CONFIGURATION);\r
- ASSERT_EFI_ERROR (Status);\r
- \r
- Status = PeiServicesInstallPpi (mPpiBootMode);\r
- ASSERT_EFI_ERROR (Status);\r
- \r
- //\r
- // Set pcd to save the upper coreboot header in case the dxecore will\r
- // erase 0~4k memory\r
- //\r
- pCbHeader = NULL;\r
- if ((CbParseGetCbHeader (1, &pCbHeader) == RETURN_SUCCESS) \r
- && ((UINTN)pCbHeader > BASE_4KB)) {\r
- DEBUG((EFI_D_ERROR, "Actual Coreboot header: 0x%x.\n", (UINTN)pCbHeader)); \r
- PcdSet32 (PcdCbHeaderPointer, (UINT32)(UINTN)pCbHeader);\r
- }\r
- \r
- //\r
- // Create guid hob for system tables like acpi table and smbios table\r
- //\r
- pAcpiTable = NULL;\r
- AcpiTableSize = 0;\r
- pSmbiosTable = NULL;\r
- SmbiosTableSize = 0;\r
- Status = CbParseAcpiTable (&pAcpiTable, &AcpiTableSize);\r
- if (EFI_ERROR (Status)) {\r
- // ACPI table is oblidgible \r
- DEBUG ((EFI_D_ERROR, "Failed to find the required acpi table\n"));\r
- ASSERT (FALSE);\r
- }\r
- CbParseSmbiosTable (&pSmbiosTable, &SmbiosTableSize);\r
- \r
- pSystemTableInfo = NULL;\r
- pSystemTableInfo = BuildGuidHob (&gUefiSystemTableInfoGuid, sizeof (SYSTEM_TABLE_INFO));\r
- ASSERT (pSystemTableInfo != NULL);\r
- pSystemTableInfo->AcpiTableBase = (UINT64) (UINTN)pAcpiTable;\r
- pSystemTableInfo->AcpiTableSize = AcpiTableSize; \r
- pSystemTableInfo->SmbiosTableBase = (UINT64) (UINTN)pSmbiosTable;\r
- pSystemTableInfo->SmbiosTableSize = SmbiosTableSize;\r
- DEBUG ((EFI_D_ERROR, "Detected Acpi Table at 0x%x, length 0x%x\n", (UINTN)pSystemTableInfo->AcpiTableBase, pSystemTableInfo->AcpiTableSize)); \r
- DEBUG ((EFI_D_ERROR, "Detected Smbios Table at 0x%x, length 0x%x\n", (UINTN)pSystemTableInfo->SmbiosTableBase, pSystemTableInfo->SmbiosTableSize)); \r
- DEBUG ((EFI_D_ERROR, "Create system table info guid hob\n"));\r
- \r
- //\r
- // Create guid hob for acpi board information\r
- // \r
- Status = CbParseFadtInfo (&PmCtrlRegBase, &PmTimerRegBase, &ResetRegAddress, &ResetValue);\r
- ASSERT_EFI_ERROR (Status);\r
- pAcpiBoardInfo = NULL;\r
- pAcpiBoardInfo = BuildGuidHob (&gUefiAcpiBoardInfoGuid, sizeof (ACPI_BOARD_INFO));\r
- ASSERT (pAcpiBoardInfo != NULL);\r
- pAcpiBoardInfo->PmCtrlRegBase = (UINT64)PmCtrlRegBase;\r
- pAcpiBoardInfo->PmTimerRegBase = (UINT64)PmTimerRegBase;\r
- pAcpiBoardInfo->ResetRegAddress = (UINT64)ResetRegAddress;\r
- pAcpiBoardInfo->ResetValue = (UINT8)ResetValue; \r
- DEBUG ((EFI_D_ERROR, "Create acpi board info guid hob\n"));\r
- \r
- //\r
- // Create guid hob for frame buffer information\r
- //\r
- ZeroMem (&FbInfo, sizeof (FRAME_BUFFER_INFO)); \r
- Status = CbParseFbInfo (&FbInfo);\r
- if (!EFI_ERROR (Status)) {\r
- pFbInfo = BuildGuidHob (&gUefiFrameBufferInfoGuid, sizeof (FRAME_BUFFER_INFO));\r
- ASSERT (pSystemTableInfo != NULL);\r
- CopyMem (pFbInfo, &FbInfo, sizeof (FRAME_BUFFER_INFO)); \r
- DEBUG ((EFI_D_ERROR, "Create frame buffer info guid hob\n")); \r
- }\r
- \r
- return EFI_SUCCESS;\r
-}\r
-\r
+++ /dev/null
-/** @file\r
- The header file of Coreboot Support PEIM.\r
-\r
-Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
-This program and the accompanying materials\r
-are licensed and made available under the terms and conditions of the BSD License\r
-which accompanies this distribution. The full text of the license may be found at\r
-http://opensource.org/licenses/bsd-license.php\r
-\r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-\r
-#ifndef __PEI_COREBOOT_SUPPORT_H__\r
-#define __PEI_COREBOOT_SUPPORT_H__\r
-\r
-#include <PiPei.h>\r
-\r
-#include <Library/PeimEntryPoint.h>\r
-#include <Library/PeiServicesLib.h>\r
-#include <Library/BaseLib.h>\r
-#include <Library/DebugLib.h>\r
-#include <Library/BaseMemoryLib.h>\r
-#include <Library/HobLib.h>\r
-#include <Library/PcdLib.h>\r
-#include <Library/CbParseLib.h>\r
-#include <Library/MtrrLib.h>\r
-\r
-#include <Guid/SmramMemoryReserve.h>\r
-#include <Guid/MemoryTypeInformation.h>\r
-#include <Guid/FirmwareFileSystem2.h>\r
-#include <Guid/FrameBufferInfoGuid.h>\r
-#include <Guid/SystemTableInfoGuid.h>\r
-#include <Guid/AcpiBoardInfoGuid.h>\r
-\r
-#include <Ppi/MasterBootMode.h>\r
-\r
-#endif\r
+++ /dev/null
-## @file\r
-# Coreboot Support PEI Module\r
-#\r
-# Parses coreboot table in memory and report resource information into pei core. It will install\r
-# the memory as required.\r
-#\r
-# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
-#\r
-# This program and the accompanying materials\r
-# are licensed and made available under the terms and conditions of the BSD License\r
-# which accompanies this distribution. The full text of the license may be found at\r
-# http://opensource.org/licenses/bsd-license.php.\r
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-#\r
-##\r
-\r
-[Defines]\r
- INF_VERSION = 0x00010005\r
- BASE_NAME = CbSupportPeim\r
- FILE_GUID = 352C6AF8-315B-4bd6-B04F-31D4ED1EBE57\r
- MODULE_TYPE = PEIM\r
- VERSION_STRING = 1.0\r
- ENTRY_POINT = CbPeiEntryPoint\r
-\r
-#\r
-# The following information is for reference only and not required by the build tools.\r
-#\r
-# VALID_ARCHITECTURES = IA32 X64\r
-#\r
-\r
-[Sources]\r
- CbSupportPei.c\r
- CbSupportPei.h\r
-\r
-[Packages]\r
- MdePkg/MdePkg.dec\r
- MdeModulePkg/MdeModulePkg.dec\r
- IntelFrameworkPkg/IntelFrameworkPkg.dec\r
- IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec\r
- CorebootModulePkg/CorebootModulePkg.dec\r
- UefiCpuPkg/UefiCpuPkg.dec\r
-\r
-[LibraryClasses]\r
- PeimEntryPoint\r
- PeiServicesLib\r
- BaseLib\r
- BaseMemoryLib\r
- DebugLib\r
- HobLib\r
- PcdLib\r
- CbParseLib\r
- MtrrLib\r
-\r
-[Guids]\r
- gEfiSmmPeiSmramMemoryReserveGuid\r
- gEfiMemoryTypeInformationGuid\r
- gEfiFirmwareFileSystem2Guid\r
- gUefiSystemTableInfoGuid\r
- gUefiFrameBufferInfoGuid\r
- gUefiAcpiBoardInfoGuid\r
-\r
-[Ppis]\r
- gEfiPeiMasterBootModePpiGuid \r
-\r
-[Pcd]\r
- gUefiCorebootModulePkgTokenSpaceGuid.PcdPayloadFdMemBase\r
- gUefiCorebootModulePkgTokenSpaceGuid.PcdPayloadFdMemSize\r
- gUefiCorebootModulePkgTokenSpaceGuid.PcdCbHeaderPointer \r
- \r
-[Depex]\r
- TRUE
\ No newline at end of file
+++ /dev/null
-## @file\r
-# Coreboot Support Package\r
-#\r
-# Provides drivers and definitions to support coreboot in EDKII bios. \r
-#\r
-# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
-# This program and the accompanying materials are licensed and made available under \r
-# the terms and conditions of the BSD License that accompanies this distribution. \r
-# The full text of the license may be found at\r
-# http://opensource.org/licenses/bsd-license.php. \r
-# \r
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
-#\r
-##\r
-\r
-[Defines]\r
- DEC_SPECIFICATION = 0x00010005\r
- PACKAGE_NAME = CorebootModulePkg\r
- PACKAGE_GUID = DE1750CE-FEE7-4dd1-8E9C-B7B8BAEBCF4F\r
- PACKAGE_VERSION = 0.1\r
- \r
-[Includes]\r
- Include\r
- \r
-[LibraryClasses]\r
- CbParseLib|Include/Library/CbParseLib.h\r
- \r
-[Guids]\r
- #\r
- ## Defines the token space for the Coreboot Module Package PCDs.\r
- #\r
- gUefiCorebootModulePkgTokenSpaceGuid = {0xe6ff49a0, 0x15df, 0x48fd, {0x9a, 0xcf, 0xd7, 0xdc, 0x27, 0x1b, 0x39, 0xd5}}\r
- gUefiSystemTableInfoGuid = {0x16c8a6d0, 0xfe8a, 0x4082, {0xa2, 0x8, 0xcf, 0x89, 0xc4, 0x29, 0x4, 0x33}}\r
- gUefiFrameBufferInfoGuid = {0xdc2cd8bd, 0x402c, 0x4dc4, {0x9b, 0xe0, 0xc, 0x43, 0x2b, 0x7, 0xfa, 0x34}}\r
- gUefiAcpiBoardInfoGuid = {0xad3d31b, 0xb3d8, 0x4506, {0xae, 0x71, 0x2e, 0xf1, 0x10, 0x6, 0xd9, 0xf}}\r
-\r
-\r
-[Ppis]\r
-\r
-[Protocols]\r
-\r
-\r
-################################################################################\r
-#\r
-# PCD Declarations section - list of all PCDs Declared by this Package\r
-# Only this package should be providing the\r
-# declaration, other packages should not.\r
-#\r
-################################################################################\r
-[PcdsFixedAtBuild, PcdsPatchableInModule]\r
-## Indicates the base address of the payload binary in memory\r
-gUefiCorebootModulePkgTokenSpaceGuid.PcdPayloadFdMemBase|0|UINT32|0x10000001\r
-## Provides the size of the payload binary in memory\r
-gUefiCorebootModulePkgTokenSpaceGuid.PcdPayloadFdMemSize|0|UINT32|0x10000002\r
-\r
-[PcdsDynamicEx]\r
-gUefiCorebootModulePkgTokenSpaceGuid.PcdCbHeaderPointer|0|UINT32|0x10000003\r
- \r
+++ /dev/null
-/** @file\r
- Coreboot PEI module include file.\r
-\r
- Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
- This program and the accompanying materials\r
- are licensed and made available under the terms and conditions of the BSD License\r
- which accompanies this distribution. The full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php\r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-/*\r
- * This file is part of the libpayload project.\r
- *\r
- * Copyright (C) 2008 Advanced Micro Devices, Inc.\r
- *\r
- * Redistribution and use in source and binary forms, with or without\r
- * modification, are permitted provided that the following conditions\r
- * are met:\r
- * 1. Redistributions of source code must retain the above copyright\r
- * notice, this list of conditions and the following disclaimer.\r
- * 2. Redistributions in binary form must reproduce the above copyright\r
- * notice, this list of conditions and the following disclaimer in the\r
- * documentation and/or other materials provided with the distribution.\r
- * 3. The name of the author may not be used to endorse or promote products\r
- * derived from this software without specific prior written permission.\r
- *\r
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND\r
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE\r
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
- * SUCH DAMAGE.\r
- */\r
-\r
-\r
-#ifndef _COREBOOT_PEI_H_INCLUDED_\r
-#define _COREBOOT_PEI_H_INCLUDED_\r
-\r
-#pragma warning( disable : 4200 )\r
-\r
-#define DYN_CBMEM_ALIGN_SIZE (4096)\r
-\r
-struct cbmem_entry {\r
- UINT32 magic;\r
- UINT32 start;\r
- UINT32 size;\r
- UINT32 id;\r
-};\r
-\r
-struct cbmem_root {\r
- UINT32 max_entries;\r
- UINT32 num_entries;\r
- UINT32 locked;\r
- UINT32 size;\r
- struct cbmem_entry entries[0];\r
-};\r
-\r
-struct cbuint64 {\r
- UINT32 lo;\r
- UINT32 hi;\r
-};\r
-\r
-#define CB_HEADER_SIGNATURE 0x4F49424C\r
-\r
-struct cb_header {\r
- UINT32 signature;\r
- UINT32 header_bytes;\r
- UINT32 header_checksum;\r
- UINT32 table_bytes;\r
- UINT32 table_checksum;\r
- UINT32 table_entries;\r
-};\r
-\r
-struct cb_record {\r
- UINT32 tag;\r
- UINT32 size;\r
-};\r
-\r
-#define CB_TAG_UNUSED 0x0000\r
-#define CB_TAG_MEMORY 0x0001\r
-\r
-struct cb_memory_range {\r
- struct cbuint64 start;\r
- struct cbuint64 size;\r
- UINT32 type;\r
-};\r
-\r
-#define CB_MEM_RAM 1\r
-#define CB_MEM_RESERVED 2\r
-#define CB_MEM_ACPI 3\r
-#define CB_MEM_NVS 4\r
-#define CB_MEM_UNUSABLE 5\r
-#define CB_MEM_VENDOR_RSVD 6\r
-#define CB_MEM_TABLE 16\r
-\r
-struct cb_memory {\r
- UINT32 tag;\r
- UINT32 size;\r
- struct cb_memory_range map[0];\r
-};\r
-\r
-#define CB_TAG_MAINBOARD 0x0003\r
-\r
-struct cb_mainboard {\r
- UINT32 tag;\r
- UINT32 size;\r
- UINT8 vendor_idx;\r
- UINT8 part_number_idx;\r
- UINT8 strings[0];\r
-};\r
-#define CB_TAG_VERSION 0x0004\r
-#define CB_TAG_EXTRA_VERSION 0x0005\r
-#define CB_TAG_BUILD 0x0006\r
-#define CB_TAG_COMPILE_TIME 0x0007\r
-#define CB_TAG_COMPILE_BY 0x0008\r
-#define CB_TAG_COMPILE_HOST 0x0009\r
-#define CB_TAG_COMPILE_DOMAIN 0x000a\r
-#define CB_TAG_COMPILER 0x000b\r
-#define CB_TAG_LINKER 0x000c\r
-#define CB_TAG_ASSEMBLER 0x000d\r
-\r
-struct cb_string {\r
- UINT32 tag;\r
- UINT32 size;\r
- UINT8 string[0];\r
-};\r
-\r
-#define CB_TAG_SERIAL 0x000f\r
-\r
-struct cb_serial {\r
- UINT32 tag;\r
- UINT32 size;\r
-#define CB_SERIAL_TYPE_IO_MAPPED 1\r
-#define CB_SERIAL_TYPE_MEMORY_MAPPED 2\r
- UINT32 type;\r
- UINT32 baseaddr;\r
- UINT32 baud;\r
-};\r
-\r
-#define CB_TAG_CONSOLE 0x00010\r
-\r
-struct cb_console {\r
- UINT32 tag;\r
- UINT32 size;\r
- UINT16 type;\r
-};\r
-\r
-#define CB_TAG_CONSOLE_SERIAL8250 0\r
-#define CB_TAG_CONSOLE_VGA 1 // OBSOLETE\r
-#define CB_TAG_CONSOLE_BTEXT 2 // OBSOLETE\r
-#define CB_TAG_CONSOLE_LOGBUF 3\r
-#define CB_TAG_CONSOLE_SROM 4 // OBSOLETE\r
-#define CB_TAG_CONSOLE_EHCI 5\r
-\r
-#define CB_TAG_FORWARD 0x00011\r
-\r
-struct cb_forward {\r
- UINT32 tag;\r
- UINT32 size;\r
- UINT64 forward;\r
-};\r
-\r
-#define CB_TAG_FRAMEBUFFER 0x0012\r
-struct cb_framebuffer {\r
- UINT32 tag;\r
- UINT32 size;\r
-\r
- UINT64 physical_address;\r
- UINT32 x_resolution;\r
- UINT32 y_resolution;\r
- UINT32 bytes_per_line;\r
- UINT8 bits_per_pixel;\r
- UINT8 red_mask_pos;\r
- UINT8 red_mask_size;\r
- UINT8 green_mask_pos;\r
- UINT8 green_mask_size;\r
- UINT8 blue_mask_pos;\r
- UINT8 blue_mask_size;\r
- UINT8 reserved_mask_pos;\r
- UINT8 reserved_mask_size;\r
-};\r
-\r
-#define CB_TAG_VDAT 0x0015\r
-struct cb_vdat {\r
- UINT32 tag;\r
- UINT32 size; /* size of the entire entry */\r
- UINT64 vdat_addr;\r
- UINT32 vdat_size;\r
-};\r
-\r
-#define CB_TAG_TIMESTAMPS 0x0016\r
-#define CB_TAG_CBMEM_CONSOLE 0x0017\r
-#define CB_TAG_MRC_CACHE 0x0018\r
-struct cb_cbmem_tab {\r
- UINT32 tag;\r
- UINT32 size;\r
- UINT64 cbmem_tab;\r
-};\r
-\r
-/* Helpful macros */\r
-\r
-#define MEM_RANGE_COUNT(_rec) \\r
- (((_rec)->size - sizeof(*(_rec))) / sizeof((_rec)->map[0]))\r
-\r
-#define MEM_RANGE_PTR(_rec, _idx) \\r
- (void *)(((UINT8 *) (_rec)) + sizeof(*(_rec)) \\r
- + (sizeof((_rec)->map[0]) * (_idx)))\r
-\r
-\r
-#endif // _COREBOOT_PEI_H_INCLUDED_\r
+++ /dev/null
-/** @file\r
- This file defines the hob structure for board related information from acpi table\r
- \r
- Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
- This program and the accompanying materials\r
- are licensed and made available under the terms and conditions of the BSD License\r
- which accompanies this distribution. The full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php.\r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-#ifndef __ACPI_BOARD_INFO_GUID_H__\r
-#define __ACPI_BOARD_INFO_GUID_H__\r
-\r
-///\r
-/// Board information GUID\r
-///\r
-extern EFI_GUID gUefiAcpiBoardInfoGuid;\r
-\r
-typedef struct { \r
- UINT64 PmCtrlRegBase;\r
- UINT64 PmTimerRegBase;\r
- UINT64 ResetRegAddress;\r
- UINT8 ResetValue; \r
-} ACPI_BOARD_INFO;\r
- \r
-#endif\r
+++ /dev/null
-/** @file\r
- This file defines the hob structure for frame buffer device.\r
- \r
- Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
- This program and the accompanying materials\r
- are licensed and made available under the terms and conditions of the BSD License\r
- which accompanies this distribution. The full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php.\r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-#ifndef __FRAME_BUFFER_INFO_GUID_H__\r
-#define __FRAME_BUFFER_INFO_GUID_H__\r
-\r
-///\r
-/// Frame Buffer Information GUID\r
-///\r
-extern EFI_GUID gUefiFrameBufferInfoGuid;\r
-\r
-typedef struct {\r
- UINT8 Position; // Position of the color\r
- UINT8 Mask; // The number of bits expressed as a mask\r
-} COLOR_PLACEMENT;\r
-\r
-typedef struct { \r
- UINT64 LinearFrameBuffer; \r
- UINT32 HorizontalResolution;\r
- UINT32 VerticalResolution;\r
- UINT32 BitsPerPixel;\r
- UINT16 BytesPerScanLine;\r
- COLOR_PLACEMENT Red;\r
- COLOR_PLACEMENT Green;\r
- COLOR_PLACEMENT Blue;\r
- COLOR_PLACEMENT Reserved;\r
-} FRAME_BUFFER_INFO; \r
- \r
-#endif\r
+++ /dev/null
-/** @file\r
- This file defines the hob structure for system tables like ACPI, SMBIOS tables.\r
- \r
- Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
- This program and the accompanying materials\r
- are licensed and made available under the terms and conditions of the BSD License\r
- which accompanies this distribution. The full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php.\r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-#ifndef __SYSTEM_TABLE_INFO_GUID_H__\r
-#define __SYSTEM_TABLE_INFO_GUID_H__\r
-\r
-///\r
-/// System Table Information GUID\r
-///\r
-extern EFI_GUID gUefiSystemTableInfoGuid;\r
-\r
-typedef struct { \r
- UINT64 AcpiTableBase;\r
- UINT32 AcpiTableSize; \r
- UINT64 SmbiosTableBase; \r
- UINT32 SmbiosTableSize; \r
-} SYSTEM_TABLE_INFO; \r
- \r
-#endif\r
+++ /dev/null
-/** @file\r
- This library will parse the coreboot table in memory and extract those required\r
- information.\r
-\r
- Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
- This program and the accompanying materials\r
- are licensed and made available under the terms and conditions of the BSD License\r
- which accompanies this distribution. The full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php\r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-#include <Guid/FrameBufferInfoGuid.h>\r
-\r
-/**\r
- Acquire the memory information from the coreboot table in memory.\r
-\r
- @param pLowMemorySize Pointer to the variable of low memory size\r
- @param pHighMemorySize Pointer to the variable of high memory size\r
-\r
- @retval RETURN_SUCCESS Successfully find out the memory information.\r
- @retval RETURN_INVALID_PARAMETER Invalid input parameters.\r
- @retval RETURN_NOT_FOUND Failed to find the memory information.\r
-\r
-**/\r
-RETURN_STATUS\r
-CbParseMemoryInfo (\r
- IN UINT64* pLowMemorySize,\r
- IN UINT64* pHighMemorySize\r
- );\r
- \r
-/**\r
- Acquire the coreboot memory table with the given table id\r
-\r
- @param TableId Table id to be searched\r
- @param pMemTable Pointer to the base address of the memory table\r
- @param pMemTableSize Pointer to the size of the memory table\r
-\r
- @retval RETURN_SUCCESS Successfully find out the memory table.\r
- @retval RETURN_INVALID_PARAMETER Invalid input parameters.\r
- @retval RETURN_NOT_FOUND Failed to find the memory table.\r
-\r
-**/\r
-RETURN_STATUS\r
-CbParseCbMemTable (\r
- IN UINT32 TableId, \r
- IN VOID** pMemTable,\r
- IN UINT32* pMemTableSize\r
- );\r
- \r
-/**\r
- Acquire the acpi table from coreboot\r
-\r
- @param pMemTable Pointer to the base address of the memory table\r
- @param pMemTableSize Pointer to the size of the memory table\r
-\r
- @retval RETURN_SUCCESS Successfully find out the memory table.\r
- @retval RETURN_INVALID_PARAMETER Invalid input parameters.\r
- @retval RETURN_NOT_FOUND Failed to find the memory table.\r
-\r
-**/\r
-RETURN_STATUS\r
-CbParseAcpiTable (\r
- IN VOID** pMemTable,\r
- IN UINT32* pMemTableSize\r
- );\r
- \r
-/**\r
- Acquire the smbios table from coreboot\r
-\r
- @param pMemTable Pointer to the base address of the memory table\r
- @param pMemTableSize Pointer to the size of the memory table\r
-\r
- @retval RETURN_SUCCESS Successfully find out the memory table.\r
- @retval RETURN_INVALID_PARAMETER Invalid input parameters.\r
- @retval RETURN_NOT_FOUND Failed to find the memory table.\r
-\r
-**/\r
-RETURN_STATUS\r
-CbParseSmbiosTable (\r
- IN VOID** pMemTable,\r
- IN UINT32* pMemTableSize\r
- );\r
- \r
-/**\r
- Find the required fadt information\r
-\r
- @param pPmCtrlReg Pointer to the address of power management control register\r
- @param pPmTimerReg Pointer to the address of power management timer register\r
- @param pResetReg Pointer to the address of system reset register\r
- @param pResetValue Pointer to the value to be writen to the system reset register\r
-\r
- @retval RETURN_SUCCESS Successfully find out all the required fadt information.\r
- @retval RETURN_NOT_FOUND Failed to find the fadt table.\r
-\r
-**/\r
-RETURN_STATUS\r
-CbParseFadtInfo (\r
- IN UINTN* pPmCtrlReg,\r
- IN UINTN* pPmTimerReg,\r
- IN UINTN* pResetReg,\r
- IN UINTN* pResetValue\r
- );\r
- \r
-/**\r
- Find the serial port information\r
-\r
- @param pRegBase Pointer to the base address of serial port registers\r
- @param pRegAccessType Pointer to the access type of serial port registers\r
- @param pBaudrate Pointer to the serial port baudrate\r
-\r
- @retval RETURN_SUCCESS Successfully find the serial port information.\r
- @retval RETURN_NOT_FOUND Failed to find the serial port information .\r
-\r
-**/\r
-RETURN_STATUS\r
-CbParseSerialInfo (\r
- IN UINT32* pRegBase,\r
- IN UINT32* pRegAccessType,\r
- IN UINT32* pBaudrate\r
- );\r
-\r
-/**\r
- Search for the coreboot table header\r
-\r
- @param Level Level of the search depth\r
- @param HeaderPtr Pointer to the pointer of coreboot table header\r
-\r
- @retval RETURN_SUCCESS Successfully find the coreboot table header .\r
- @retval RETURN_NOT_FOUND Failed to find the coreboot table header .\r
-\r
-**/\r
-RETURN_STATUS\r
-CbParseGetCbHeader (\r
- IN UINTN Level,\r
- IN VOID** HeaderPtr\r
- );\r
- \r
-/**\r
- Find the video frame buffer information\r
-\r
- @param pFbInfo Pointer to the FRAME_BUFFER_INFO structure\r
-\r
- @retval RETURN_SUCCESS Successfully find the video frame buffer information.\r
- @retval RETURN_NOT_FOUND Failed to find the video frame buffer information .\r
-\r
-**/\r
-RETURN_STATUS\r
-CbParseFbInfo (\r
- IN FRAME_BUFFER_INFO* pFbInfo\r
- );\r
-\r
+++ /dev/null
-/** @file\r
- This library will parse the coreboot table in memory and extract those required\r
- information.\r
-\r
- Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
- This program and the accompanying materials\r
- are licensed and made available under the terms and conditions of the BSD License\r
- which accompanies this distribution. The full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php\r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-#include <Uefi/UefiBaseType.h>\r
-#include <Library/BaseLib.h>\r
-#include <Library/BaseMemoryLib.h>\r
-#include <Library/DebugLib.h>\r
-#include <Library/PcdLib.h>\r
-#include <Library/CbParseLib.h>\r
-\r
-#include <IndustryStandard/Acpi.h>\r
-\r
-#include "Coreboot.h"\r
-\r
-/* Helpful inlines */\r
-\r
-static UINT64 cb_unpack64(struct cbuint64 val)\r
-{\r
- return (((UINT64) val.hi) << 32) | val.lo;\r
-}\r
-\r
-static const char *cb_mb_vendor_string(const struct cb_mainboard *cbm)\r
-{\r
- return (char *)(cbm->strings + cbm->vendor_idx);\r
-}\r
-\r
-static const char *cb_mb_part_string(const struct cb_mainboard *cbm)\r
-{\r
- return (char *)(cbm->strings + cbm->part_number_idx);\r
-}\r
-\r
-UINT16\r
-CbCheckSum16 (\r
- IN UINT16 *Buffer,\r
- IN UINTN Length\r
- )\r
-{\r
- UINT32 Sum, TmpValue;\r
- UINTN Idx;\r
- UINT8 *TmpPtr;\r
- \r
- Sum = 0;\r
- TmpPtr = (UINT8 *)Buffer;\r
- for(Idx = 0; Idx < Length; Idx++) {\r
- TmpValue = TmpPtr[Idx];\r
- if (Idx % 2 == 1) {\r
- TmpValue <<= 8;\r
- }\r
- \r
- Sum += TmpValue;\r
- \r
- // Wrap\r
- if (Sum >= 0x10000) {\r
- Sum = (Sum + (Sum >> 16)) & 0xFFFF;\r
- }\r
- }\r
- \r
- return (UINT16)((~Sum) & 0xFFFF); \r
-}\r
-\r
-VOID *\r
-FindCbTag (\r
- IN VOID *Start,\r
- IN UINT32 Tag\r
- )\r
-{\r
- struct cb_header *Header;\r
- struct cb_record *Record;\r
- UINT8 *TmpPtr; \r
- UINT8 *TagPtr; \r
- UINTN Idx; \r
- UINT16 CheckSum;\r
- \r
- Header = NULL;\r
- TmpPtr = (UINT8 *)Start;\r
- for (Idx = 0; Idx < 4096; Idx += 16, TmpPtr += 16) {\r
- Header = (struct cb_header *)TmpPtr;\r
- if (Header->signature == CB_HEADER_SIGNATURE) {\r
- break;\r
- }\r
- }\r
- \r
- if (Idx >= 4096)\r
- return NULL;\r
- \r
- if (Header == NULL || !Header->table_bytes)\r
- return NULL;\r
- \r
- //\r
- // Check the checksum of the coreboot table header\r
- //\r
- CheckSum = CbCheckSum16 ((UINT16 *)Header, sizeof (*Header));\r
- if (CheckSum != 0) {\r
- DEBUG ((EFI_D_ERROR, "Invalid coreboot table header checksum\n"));\r
- return NULL;\r
- } \r
- \r
- CheckSum = CbCheckSum16 ((UINT16 *)(TmpPtr + sizeof (*Header)), Header->table_bytes);\r
- if (CheckSum != Header->table_checksum) {\r
- DEBUG ((EFI_D_ERROR, "Incorrect checksum of all the coreboot table entries\n"));\r
- return NULL;\r
- }\r
- \r
- TagPtr = NULL;\r
- TmpPtr += Header->header_bytes;\r
- for (Idx = 0; Idx < Header->table_entries; Idx++) {\r
- Record = (struct cb_record *)TmpPtr; \r
- if (Record->tag == CB_TAG_FORWARD) {\r
- TmpPtr = (VOID *)(UINTN)((struct cb_forward *)(UINTN)Record)->forward;\r
- if (Tag == CB_TAG_FORWARD)\r
- return TmpPtr;\r
- else \r
- return FindCbTag (TmpPtr, Tag);\r
- } \r
- if (Record->tag == Tag) {\r
- TagPtr = TmpPtr;\r
- break;\r
- }\r
- TmpPtr += Record->size; \r
- }\r
- \r
- return TagPtr;\r
-}\r
-\r
-RETURN_STATUS\r
-FindCbMemTable ( \r
- struct cbmem_root *root,\r
- IN UINT32 TableId, \r
- IN VOID** pMemTable,\r
- IN UINT32* pMemTableSize\r
-)\r
-{ \r
- UINTN Idx;\r
- \r
- if ((!root) || (!pMemTable))\r
- return RETURN_INVALID_PARAMETER;\r
- \r
- for (Idx = 0; Idx < root->num_entries; Idx++) {\r
- if (root->entries[Idx].id == TableId) {\r
- *pMemTable = (VOID *) (UINTN)root->entries[Idx].start;\r
- if (pMemTableSize)\r
- *pMemTableSize = root->entries[Idx].size;\r
- \r
- DEBUG ((EFI_D_ERROR, "Find CbMemTable Id 0x%x, base 0x%x, size 0x%x\n", TableId, *pMemTable, *pMemTableSize));\r
- return RETURN_SUCCESS;\r
- }\r
- }\r
- \r
- return RETURN_NOT_FOUND; \r
-}\r
-\r
-\r
-/**\r
- Acquire the memory information from the coreboot table in memory.\r
-\r
- @param pLowMemorySize Pointer to the variable of low memory size\r
- @param pHighMemorySize Pointer to the variable of high memory size\r
-\r
- @retval RETURN_SUCCESS Successfully find out the memory information.\r
- @retval RETURN_INVALID_PARAMETER Invalid input parameters.\r
- @retval RETURN_NOT_FOUND Failed to find the memory information.\r
-\r
-**/\r
-RETURN_STATUS\r
-CbParseMemoryInfo (\r
- IN UINT64* pLowMemorySize,\r
- IN UINT64* pHighMemorySize\r
- )\r
-{\r
- struct cb_memory* rec;\r
- struct cb_memory_range* Range;\r
- UINT64 Start;\r
- UINT64 Size;\r
- UINTN Index;\r
- \r
- if ((!pLowMemorySize) || (!pHighMemorySize))\r
- return RETURN_INVALID_PARAMETER;\r
- \r
- //\r
- // Get the coreboot memory table\r
- //\r
- rec = (struct cb_memory *)FindCbTag (0, CB_TAG_MEMORY);\r
- if (!rec) \r
- rec = (struct cb_memory *)FindCbTag ((VOID *)(UINTN)PcdGet32 (PcdCbHeaderPointer), CB_TAG_MEMORY);\r
- \r
- if (!rec) \r
- return RETURN_NOT_FOUND;\r
- \r
- *pLowMemorySize = 0;\r
- *pHighMemorySize = 0;\r
- \r
- for (Index = 0; Index < MEM_RANGE_COUNT(rec); Index++) {\r
- Range = MEM_RANGE_PTR(rec, Index); \r
- Start = cb_unpack64(Range->start);\r
- Size = cb_unpack64(Range->size);\r
- DEBUG ((EFI_D_ERROR, "%d. %016lx - %016lx [%02x]\n",\r
- Index, Start, Start + Size - 1, Range->type));\r
- \r
- if (Range->type != CB_MEM_RAM) {\r
- continue;\r
- }\r
- \r
- if (Start + Size < 0x100000000ULL) {\r
- *pLowMemorySize = Start + Size;\r
- } else { \r
- *pHighMemorySize = Start + Size - 0x100000000ULL;\r
- }\r
- }\r
- \r
- DEBUG ((EFI_D_ERROR, "Low memory 0x%x, High Memory 0x%x\n", *pLowMemorySize, *pHighMemorySize));\r
- \r
- return RETURN_SUCCESS; \r
-}\r
-\r
-\r
-/**\r
- Acquire the coreboot memory table with the given table id\r
-\r
- @param TableId Table id to be searched\r
- @param pMemTable Pointer to the base address of the memory table\r
- @param pMemTableSize Pointer to the size of the memory table\r
-\r
- @retval RETURN_SUCCESS Successfully find out the memory table.\r
- @retval RETURN_INVALID_PARAMETER Invalid input parameters.\r
- @retval RETURN_NOT_FOUND Failed to find the memory table.\r
-\r
-**/\r
-RETURN_STATUS\r
-CbParseCbMemTable (\r
- IN UINT32 TableId, \r
- IN VOID** pMemTable,\r
- IN UINT32* pMemTableSize\r
- )\r
-{\r
- struct cb_memory* rec;\r
- struct cb_memory_range* Range;\r
- UINT64 Start;\r
- UINT64 Size;\r
- UINTN Index;\r
- \r
- if (!pMemTable)\r
- return RETURN_INVALID_PARAMETER;\r
- \r
- *pMemTable = NULL;\r
- \r
- //\r
- // Get the coreboot memory table\r
- //\r
- rec = (struct cb_memory *)FindCbTag (0, CB_TAG_MEMORY);\r
- if (!rec)\r
- rec = (struct cb_memory *)FindCbTag ((VOID *)(UINTN)PcdGet32 (PcdCbHeaderPointer), CB_TAG_MEMORY);\r
- \r
- if (!rec)\r
- return RETURN_NOT_FOUND;\r
- \r
- for (Index = 0; Index < MEM_RANGE_COUNT(rec); Index++) {\r
- Range = MEM_RANGE_PTR(rec, Index); \r
- Start = cb_unpack64(Range->start);\r
- Size = cb_unpack64(Range->size);\r
- \r
- if ((Range->type == CB_MEM_TABLE) && (Start > 0x1000)) {\r
- if (FindCbMemTable ((struct cbmem_root *)(UINTN)(Start + Size - DYN_CBMEM_ALIGN_SIZE), TableId, pMemTable, pMemTableSize) == RETURN_SUCCESS)\r
- return RETURN_SUCCESS;\r
- }\r
- }\r
- \r
- return RETURN_NOT_FOUND;\r
-}\r
-\r
-\r
-/**\r
- Acquire the acpi table from coreboot\r
-\r
- @param pMemTable Pointer to the base address of the memory table\r
- @param pMemTableSize Pointer to the size of the memory table\r
-\r
- @retval RETURN_SUCCESS Successfully find out the memory table.\r
- @retval RETURN_INVALID_PARAMETER Invalid input parameters.\r
- @retval RETURN_NOT_FOUND Failed to find the memory table.\r
-\r
-**/\r
-RETURN_STATUS\r
-CbParseAcpiTable (\r
- IN VOID** pMemTable,\r
- IN UINT32* pMemTableSize\r
- )\r
-{\r
- return CbParseCbMemTable (SIGNATURE_32 ('I', 'P', 'C', 'A'), pMemTable, pMemTableSize); \r
-}\r
-\r
-/**\r
- Acquire the smbios table from coreboot\r
-\r
- @param pMemTable Pointer to the base address of the memory table\r
- @param pMemTableSize Pointer to the size of the memory table\r
-\r
- @retval RETURN_SUCCESS Successfully find out the memory table.\r
- @retval RETURN_INVALID_PARAMETER Invalid input parameters.\r
- @retval RETURN_NOT_FOUND Failed to find the memory table.\r
-\r
-**/\r
-RETURN_STATUS\r
-CbParseSmbiosTable (\r
- IN VOID** pMemTable,\r
- IN UINT32* pMemTableSize\r
- )\r
-{\r
- return CbParseCbMemTable (SIGNATURE_32 ('T', 'B', 'M', 'S'), pMemTable, pMemTableSize); \r
-}\r
-\r
-/**\r
- Find the required fadt information\r
-\r
- @param pPmCtrlReg Pointer to the address of power management control register\r
- @param pPmTimerReg Pointer to the address of power management timer register\r
- @param pResetReg Pointer to the address of system reset register\r
- @param pResetValue Pointer to the value to be writen to the system reset register\r
-\r
- @retval RETURN_SUCCESS Successfully find out all the required fadt information.\r
- @retval RETURN_NOT_FOUND Failed to find the fadt table.\r
-\r
-**/\r
-RETURN_STATUS\r
-CbParseFadtInfo (\r
- IN UINTN* pPmCtrlReg,\r
- IN UINTN* pPmTimerReg,\r
- IN UINTN* pResetReg,\r
- IN UINTN* pResetValue\r
- )\r
-{\r
- EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER* Rsdp;\r
- EFI_ACPI_DESCRIPTION_HEADER* Rsdt;\r
- UINT32* Entry32;\r
- UINTN Entry32Num;\r
- EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE* Fadt;\r
- EFI_ACPI_DESCRIPTION_HEADER* Xsdt; \r
- UINT64* Entry64;\r
- UINTN Entry64Num;\r
- UINTN Idx;\r
- RETURN_STATUS Status;\r
- \r
- Rsdp = NULL;\r
- Status = RETURN_SUCCESS;\r
- \r
- Status = CbParseAcpiTable (&Rsdp, NULL);\r
- if (RETURN_ERROR(Status))\r
- return Status;\r
- \r
- if (!Rsdp)\r
- return RETURN_NOT_FOUND;\r
- \r
- DEBUG ((EFI_D_ERROR, "Find Rsdp at 0x%x\n", Rsdp));\r
- DEBUG ((EFI_D_ERROR, "Find Rsdt 0x%x, Xsdt 0x%x\n", Rsdp->RsdtAddress, Rsdp->XsdtAddress));\r
- \r
- //\r
- // Search Rsdt First\r
- //\r
- Rsdt = (EFI_ACPI_DESCRIPTION_HEADER *)(UINTN)(Rsdp->RsdtAddress); \r
- if (Rsdt != NULL) {\r
- Entry32 = (UINT32 *)(Rsdt + 1);\r
- Entry32Num = (Rsdt->Length - sizeof(EFI_ACPI_DESCRIPTION_HEADER)) >> 2;\r
- for (Idx = 0; Idx < Entry32Num; Idx++) {\r
- if (*(UINT32 *)(UINTN)(Entry32[Idx]) == EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE) {\r
- Fadt = (EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE *)(UINTN)(Entry32[Idx]); \r
- if (pPmCtrlReg)\r
- *pPmCtrlReg = Fadt->Pm1aCntBlk; \r
- DEBUG ((EFI_D_ERROR, "PmCtrl Reg 0x%x\n", Fadt->Pm1aCntBlk));\r
- \r
- if (pPmTimerReg) \r
- *pPmTimerReg = Fadt->PmTmrBlk; \r
- DEBUG ((EFI_D_ERROR, "PmTimer Reg 0x%x\n", Fadt->PmTmrBlk));\r
- \r
- if (pResetReg) \r
- *pResetReg = (UINTN)Fadt->ResetReg.Address; \r
- DEBUG ((EFI_D_ERROR, "Reset Reg 0x%x\n", Fadt->ResetReg.Address));\r
- \r
- if (pResetValue) \r
- *pResetValue = Fadt->ResetValue;\r
- DEBUG ((EFI_D_ERROR, "Reset Value 0x%x\n", Fadt->ResetValue));\r
- \r
- return RETURN_SUCCESS; \r
- }\r
- }\r
- }\r
- \r
- //\r
- // Search Xsdt Second\r
- //\r
- Xsdt = (EFI_ACPI_DESCRIPTION_HEADER *)(UINTN)(Rsdp->XsdtAddress); \r
- if (Xsdt != NULL) {\r
- Entry64 = (UINT64 *)(Xsdt + 1);\r
- Entry64Num = (Xsdt->Length - sizeof(EFI_ACPI_DESCRIPTION_HEADER)) >> 3;\r
- for (Idx = 0; Idx < Entry64Num; Idx++) {\r
- if (*(UINT32 *)(UINTN)(Entry64[Idx]) == EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE) {\r
- Fadt = (EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE *)(UINTN)(Entry64[Idx]); \r
- if (pPmCtrlReg)\r
- *pPmCtrlReg = Fadt->Pm1aCntBlk; \r
- DEBUG ((EFI_D_ERROR, "PmCtrl Reg 0x%x\n", Fadt->Pm1aCntBlk));\r
- \r
- if (pPmTimerReg) \r
- *pPmTimerReg = Fadt->PmTmrBlk; \r
- DEBUG ((EFI_D_ERROR, "PmTimer Reg 0x%x\n", Fadt->PmTmrBlk));\r
- \r
- if (pResetReg) \r
- *pResetReg = (UINTN)Fadt->ResetReg.Address; \r
- DEBUG ((EFI_D_ERROR, "Reset Reg 0x%x\n", Fadt->ResetReg.Address));\r
- \r
- if (pResetValue) \r
- *pResetValue = Fadt->ResetValue;\r
- DEBUG ((EFI_D_ERROR, "Reset Value 0x%x\n", Fadt->ResetValue));\r
- \r
- return RETURN_SUCCESS; \r
- }\r
- }\r
- } \r
- \r
- return RETURN_NOT_FOUND;\r
-}\r
-\r
-/**\r
- Find the serial port information\r
-\r
- @param pRegBase Pointer to the base address of serial port registers\r
- @param pRegAccessType Pointer to the access type of serial port registers\r
- @param pBaudrate Pointer to the serial port baudrate\r
-\r
- @retval RETURN_SUCCESS Successfully find the serial port information.\r
- @retval RETURN_NOT_FOUND Failed to find the serial port information .\r
-\r
-**/\r
-RETURN_STATUS\r
-CbParseSerialInfo (\r
- IN UINT32* pRegBase,\r
- IN UINT32* pRegAccessType,\r
- IN UINT32* pBaudrate\r
- )\r
-{\r
- struct cb_serial* CbSerial;\r
- \r
- CbSerial = FindCbTag (0, CB_TAG_SERIAL);\r
- if (!CbSerial)\r
- CbSerial = FindCbTag ((VOID *)(UINTN)PcdGet32 (PcdCbHeaderPointer), CB_TAG_SERIAL);\r
- \r
- if (!CbSerial)\r
- return RETURN_NOT_FOUND;\r
- \r
- if (pRegBase)\r
- *pRegBase = CbSerial->baseaddr;\r
- \r
- if (pRegAccessType)\r
- *pRegAccessType = CbSerial->type;\r
- \r
- if (pBaudrate)\r
- *pBaudrate = CbSerial->baud;\r
- \r
- return RETURN_SUCCESS;\r
-}\r
-\r
-/**\r
- Search for the coreboot table header\r
-\r
- @param Level Level of the search depth\r
- @param HeaderPtr Pointer to the pointer of coreboot table header\r
-\r
- @retval RETURN_SUCCESS Successfully find the coreboot table header .\r
- @retval RETURN_NOT_FOUND Failed to find the coreboot table header .\r
-\r
-**/\r
-RETURN_STATUS\r
-CbParseGetCbHeader (\r
- IN UINTN Level,\r
- IN VOID** HeaderPtr\r
- )\r
-{\r
- UINTN Index;\r
- VOID* TempPtr;\r
- \r
- if (!HeaderPtr)\r
- return RETURN_NOT_FOUND;\r
- \r
- TempPtr = NULL; \r
- for (Index = 0; Index < Level; Index++) {\r
- TempPtr = FindCbTag (TempPtr, CB_TAG_FORWARD);\r
- if (!TempPtr)\r
- break; \r
- }\r
- \r
- if ((Index >= Level) && (TempPtr != NULL)) {\r
- *HeaderPtr = TempPtr;\r
- return RETURN_SUCCESS;\r
- }\r
- \r
- return RETURN_NOT_FOUND;\r
-}\r
-\r
-/**\r
- Find the video frame buffer information\r
-\r
- @param pFbInfo Pointer to the FRAME_BUFFER_INFO structure\r
-\r
- @retval RETURN_SUCCESS Successfully find the video frame buffer information.\r
- @retval RETURN_NOT_FOUND Failed to find the video frame buffer information .\r
-\r
-**/\r
-RETURN_STATUS\r
-CbParseFbInfo (\r
- IN FRAME_BUFFER_INFO* pFbInfo\r
- )\r
-{\r
- struct cb_framebuffer* CbFbRec;\r
- \r
- if (!pFbInfo)\r
- return RETURN_INVALID_PARAMETER;\r
- \r
- CbFbRec = FindCbTag (0, CB_TAG_FRAMEBUFFER);\r
- if (!CbFbRec)\r
- CbFbRec = FindCbTag ((VOID *)(UINTN)PcdGet32 (PcdCbHeaderPointer), CB_TAG_FRAMEBUFFER);\r
- \r
- if (!CbFbRec)\r
- return RETURN_NOT_FOUND;\r
- \r
- DEBUG ((EFI_D_ERROR, "Found coreboot video frame buffer information\n"));\r
- DEBUG ((EFI_D_ERROR, "physical_address: 0x%x\n", CbFbRec->physical_address));\r
- DEBUG ((EFI_D_ERROR, "x_resolution: 0x%x\n", CbFbRec->x_resolution));\r
- DEBUG ((EFI_D_ERROR, "y_resolution: 0x%x\n", CbFbRec->y_resolution));\r
- DEBUG ((EFI_D_ERROR, "bits_per_pixel: 0x%x\n", CbFbRec->bits_per_pixel));\r
- DEBUG ((EFI_D_ERROR, "bytes_per_line: 0x%x\n", CbFbRec->bytes_per_line));\r
- \r
- DEBUG ((EFI_D_ERROR, "red_mask_size: 0x%x\n", CbFbRec->red_mask_size));\r
- DEBUG ((EFI_D_ERROR, "red_mask_pos: 0x%x\n", CbFbRec->red_mask_pos));\r
- DEBUG ((EFI_D_ERROR, "green_mask_size: 0x%x\n", CbFbRec->green_mask_size));\r
- DEBUG ((EFI_D_ERROR, "green_mask_pos: 0x%x\n", CbFbRec->green_mask_pos));\r
- DEBUG ((EFI_D_ERROR, "blue_mask_size: 0x%x\n", CbFbRec->blue_mask_size));\r
- DEBUG ((EFI_D_ERROR, "blue_mask_pos: 0x%x\n", CbFbRec->blue_mask_pos));\r
- DEBUG ((EFI_D_ERROR, "reserved_mask_size: 0x%x\n", CbFbRec->reserved_mask_size));\r
- DEBUG ((EFI_D_ERROR, "reserved_mask_pos: 0x%x\n", CbFbRec->reserved_mask_pos));\r
- \r
- pFbInfo->LinearFrameBuffer = CbFbRec->physical_address; \r
- pFbInfo->HorizontalResolution = CbFbRec->x_resolution;\r
- pFbInfo->VerticalResolution = CbFbRec->y_resolution;\r
- pFbInfo->BitsPerPixel = CbFbRec->bits_per_pixel;\r
- pFbInfo->BytesPerScanLine = (UINT16)CbFbRec->bytes_per_line;\r
- pFbInfo->Red.Mask = (1 << CbFbRec->red_mask_size) - 1;\r
- pFbInfo->Red.Position = CbFbRec->red_mask_pos;\r
- pFbInfo->Green.Mask = (1 << CbFbRec->green_mask_size) - 1;\r
- pFbInfo->Green.Position = CbFbRec->green_mask_pos;\r
- pFbInfo->Blue.Mask = (1 << CbFbRec->blue_mask_size) - 1;\r
- pFbInfo->Blue.Position = CbFbRec->blue_mask_pos;\r
- pFbInfo->Reserved.Mask = (1 << CbFbRec->reserved_mask_size) - 1;\r
- pFbInfo->Reserved.Position = CbFbRec->reserved_mask_pos; \r
- \r
- return RETURN_SUCCESS;\r
-}\r
-\r
-\r
+++ /dev/null
-## @file\r
-# Coreboot Table Parse Library.\r
-#\r
-# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
-# This program and the accompanying materials\r
-# are licensed and made available under the terms and conditions of the BSD License\r
-# which accompanies this distribution. The full text of the license may be found at\r
-# http://opensource.org/licenses/bsd-license.php\r
-#\r
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-# \r
-##\r
-\r
-[Defines]\r
- INF_VERSION = 0x00010005\r
- BASE_NAME = CbParseLib\r
- FILE_GUID = 49EDFC9E-5945-4386-9C0B-C9B60CD45BB1\r
- MODULE_TYPE = BASE\r
- VERSION_STRING = 1.0\r
- LIBRARY_CLASS = CbParseLib\r
-\r
-#\r
-# The following information is for reference only and not required by the build tools.\r
-#\r
-# VALID_ARCHITECTURES = IA32 X64\r
-#\r
-\r
-[Sources]\r
- CbParseLib.c\r
-\r
-[Packages]\r
- MdePkg/MdePkg.dec\r
- MdeModulePkg/MdeModulePkg.dec\r
- CorebootModulePkg/CorebootModulePkg.dec \r
-\r
-[LibraryClasses]\r
- BaseLib\r
- BaseMemoryLib\r
- DebugLib\r\r
- PcdLib\r
-\r
-[Pcd] \r
- gUefiCorebootModulePkgTokenSpaceGuid.PcdCbHeaderPointer
\ No newline at end of file
+++ /dev/null
-/** @file\r
- Locate the entry point for the PEI Core\r
-\r
-Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>\r
-This program and the accompanying materials\r
-are licensed and made available under the terms and conditions of the BSD License\r
-which accompanies this distribution. The full text of the license may be found at\r
-http://opensource.org/licenses/bsd-license.php\r
-\r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-#include <PiPei.h>\r
-#include <Library/BaseLib.h>\r
-#include <Library/PeCoffGetEntryPointLib.h>\r
-\r
-#include "SecMain.h"\r
-\r
-/**\r
- Find core image base.\r
- \r
- @param BootFirmwareVolumePtr Point to the boot firmware volume.\r
- @param SecCoreImageBase The base address of the SEC core image.\r
- @param PeiCoreImageBase The base address of the PEI core image.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-FindImageBase (\r
- IN EFI_FIRMWARE_VOLUME_HEADER *BootFirmwareVolumePtr,\r
- OUT EFI_PHYSICAL_ADDRESS *SecCoreImageBase,\r
- OUT EFI_PHYSICAL_ADDRESS *PeiCoreImageBase\r
- )\r
-{\r
- EFI_PHYSICAL_ADDRESS CurrentAddress;\r
- EFI_PHYSICAL_ADDRESS EndOfFirmwareVolume;\r
- EFI_FFS_FILE_HEADER *File;\r
- UINT32 Size;\r
- EFI_PHYSICAL_ADDRESS EndOfFile;\r
- EFI_COMMON_SECTION_HEADER *Section;\r
- EFI_PHYSICAL_ADDRESS EndOfSection;\r
-\r
- *SecCoreImageBase = 0;\r
- *PeiCoreImageBase = 0;\r
-\r
- CurrentAddress = (EFI_PHYSICAL_ADDRESS)(UINTN) BootFirmwareVolumePtr;\r
- EndOfFirmwareVolume = CurrentAddress + BootFirmwareVolumePtr->FvLength;\r
-\r
- //\r
- // Loop through the FFS files in the Boot Firmware Volume\r
- //\r
- for (EndOfFile = CurrentAddress + BootFirmwareVolumePtr->HeaderLength; ; ) {\r
-\r
- CurrentAddress = (EndOfFile + 7) & 0xfffffffffffffff8ULL;\r
- if (CurrentAddress > EndOfFirmwareVolume) {\r
- return EFI_NOT_FOUND;\r
- }\r
-\r
- File = (EFI_FFS_FILE_HEADER*)(UINTN) CurrentAddress;\r
- if (IS_FFS_FILE2 (File)) {\r
- Size = FFS_FILE2_SIZE (File);\r
- if (Size <= 0x00FFFFFF) {\r
- return EFI_NOT_FOUND;\r
- }\r
- } else {\r
- Size = FFS_FILE_SIZE (File);\r
- if (Size < sizeof (EFI_FFS_FILE_HEADER)) {\r
- return EFI_NOT_FOUND;\r
- }\r
- }\r
-\r
- EndOfFile = CurrentAddress + Size;\r
- if (EndOfFile > EndOfFirmwareVolume) {\r
- return EFI_NOT_FOUND;\r
- }\r
-\r
- //\r
- // Look for SEC Core / PEI Core files\r
- //\r
- if (File->Type != EFI_FV_FILETYPE_SECURITY_CORE &&\r
- File->Type != EFI_FV_FILETYPE_PEI_CORE) {\r
- continue;\r
- }\r
-\r
- //\r
- // Loop through the FFS file sections within the FFS file\r
- //\r
- if (IS_FFS_FILE2 (File)) {\r
- EndOfSection = (EFI_PHYSICAL_ADDRESS) (UINTN) ((UINT8 *) File + sizeof (EFI_FFS_FILE_HEADER2));\r
- } else {\r
- EndOfSection = (EFI_PHYSICAL_ADDRESS) (UINTN) ((UINT8 *) File + sizeof (EFI_FFS_FILE_HEADER));\r
- }\r
- for (;;) {\r
- CurrentAddress = (EndOfSection + 3) & 0xfffffffffffffffcULL;\r
- Section = (EFI_COMMON_SECTION_HEADER*)(UINTN) CurrentAddress;\r
-\r
- if (IS_SECTION2 (Section)) {\r
- Size = SECTION2_SIZE (Section);\r
- if (Size <= 0x00FFFFFF) {\r
- return EFI_NOT_FOUND;\r
- }\r
- } else {\r
- Size = SECTION_SIZE (Section);\r
- if (Size < sizeof (EFI_COMMON_SECTION_HEADER)) {\r
- return EFI_NOT_FOUND;\r
- }\r
- }\r
-\r
- EndOfSection = CurrentAddress + Size;\r
- if (EndOfSection > EndOfFile) {\r
- return EFI_NOT_FOUND;\r
- }\r
-\r
- //\r
- // Look for executable sections\r
- //\r
- if (Section->Type == EFI_SECTION_PE32 || Section->Type == EFI_SECTION_TE) {\r
- if (File->Type == EFI_FV_FILETYPE_SECURITY_CORE) {\r
- if (IS_SECTION2 (Section)) {\r
- *SecCoreImageBase = (PHYSICAL_ADDRESS) (UINTN) ((UINT8 *) Section + sizeof (EFI_COMMON_SECTION_HEADER2));\r
- } else {\r
- *SecCoreImageBase = (PHYSICAL_ADDRESS) (UINTN) ((UINT8 *) Section + sizeof (EFI_COMMON_SECTION_HEADER));\r
- }\r
- } else {\r
- if (IS_SECTION2 (Section)) {\r
- *PeiCoreImageBase = (PHYSICAL_ADDRESS) (UINTN) ((UINT8 *) Section + sizeof (EFI_COMMON_SECTION_HEADER2));\r
- } else {\r
- *PeiCoreImageBase = (PHYSICAL_ADDRESS) (UINTN) ((UINT8 *) Section + sizeof (EFI_COMMON_SECTION_HEADER));\r
- }\r
- }\r
- break;\r
- }\r
- }\r
-\r
- //\r
- // Both SEC Core and PEI Core images found\r
- //\r
- if (*SecCoreImageBase != 0 && *PeiCoreImageBase != 0) {\r
- return EFI_SUCCESS;\r
- }\r
- }\r
-}\r
-\r
-/**\r
- Find and return Pei Core entry point.\r
-\r
- It also find SEC and PEI Core file debug inforamtion. It will report them if\r
- remote debug is enabled.\r
- \r
- @param BootFirmwareVolumePtr Point to the boot firmware volume.\r
- @param PeiCoreEntryPoint The entry point of the PEI core.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-FindAndReportEntryPoints (\r
- IN EFI_FIRMWARE_VOLUME_HEADER *BootFirmwareVolumePtr,\r
- OUT EFI_PEI_CORE_ENTRY_POINT *PeiCoreEntryPoint\r
- )\r
-{\r
- EFI_STATUS Status;\r
- EFI_PHYSICAL_ADDRESS SecCoreImageBase;\r
- EFI_PHYSICAL_ADDRESS PeiCoreImageBase;\r
- PE_COFF_LOADER_IMAGE_CONTEXT ImageContext;\r
-\r
- //\r
- // Find SEC Core and PEI Core image base\r
- //\r
- Status = FindImageBase (BootFirmwareVolumePtr, &SecCoreImageBase, &PeiCoreImageBase);\r
- ASSERT_EFI_ERROR (Status);\r
-\r
- ZeroMem ((VOID *) &ImageContext, sizeof (PE_COFF_LOADER_IMAGE_CONTEXT));\r
- //\r
- // Report SEC Core debug information when remote debug is enabled\r
- //\r
- ImageContext.ImageAddress = SecCoreImageBase;\r
- ImageContext.PdbPointer = PeCoffLoaderGetPdbPointer ((VOID*) (UINTN) ImageContext.ImageAddress);\r
- PeCoffLoaderRelocateImageExtraAction (&ImageContext);\r
-\r
- //\r
- // Report PEI Core debug information when remote debug is enabled\r
- //\r
- ImageContext.ImageAddress = PeiCoreImageBase;\r
- ImageContext.PdbPointer = PeCoffLoaderGetPdbPointer ((VOID*) (UINTN) ImageContext.ImageAddress);\r
- PeCoffLoaderRelocateImageExtraAction (&ImageContext);\r
-\r
- //\r
- // Find PEI Core entry point\r
- //\r
- Status = PeCoffLoaderGetEntryPoint ((VOID *) (UINTN) PeiCoreImageBase, (VOID**) PeiCoreEntryPoint);\r
- if (EFI_ERROR (Status)) {\r
- *PeiCoreEntryPoint = 0;\r
- }\r
-\r
- return;\r
-}\r
-\r
+++ /dev/null
-#------------------------------------------------------------------------------\r
-#\r
-# Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>\r
-# This program and the accompanying materials\r
-# are licensed and made available under the terms and conditions of the BSD License\r
-# which accompanies this distribution. The full text of the license may be found at\r
-# http://opensource.org/licenses/bsd-license.php.\r
-#\r
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-#\r
-# Module Name:\r
-#\r
-# SecEntry.S\r
-#\r
-# Abstract:\r
-#\r
-# This is the code that begins in protected mode.\r
-# It will transfer the control to pei core.\r
-#\r
-#------------------------------------------------------------------------------\r
-\r
-ASM_GLOBAL ASM_PFX(SecStartup)\r
-\r
-# Pcds\r
-ASM_GLOBAL ASM_PFX(PcdGet32 (PcdPayloadFdMemBase))\r
-\r
-#\r
-# SecCore Entry Point\r
-#\r
-# Processor is in flat protected mode\r
-#\r
-# @param[in] EAX Initial value of the EAX register (BIST: Built-in Self Test)\r
-# @param[in] DI 'BP': boot-strap processor, or 'AP': application processor\r
-# @param[in] EBP Pointer to the start of the Boot Firmware Volume\r
-#\r
-# @return None This routine does not return\r
-#\r
-ASM_GLOBAL ASM_PFX(_ModuleEntryPoint)\r
-ASM_PFX(_ModuleEntryPoint):\r
- #\r
- # Disable all the interrupts\r
- #\r
- cli\r
- \r
- #\r
- # Construct the temporary memory at 0x80000, length 0x10000\r
- #\r
- movl ($BASE_512KB + $SIZE_64KB), %esp\r
-\r
- #\r
- # Pass BFV into the PEI Core\r
- #\r
- pushl ASM_PFX(PcdGet32 (PcdPayloadFdMemBase))\r
- \r
- #\r
- # Pass stack base into the PEI Core\r
- #\r
- pushl $BASE_512KB\r
-\r
- #\r
- # Pass stack size into the PEI Core\r
- #\r
- pushl $SIZE_64KB\r
-\r
- #\r
- # Pass Control into the PEI Core\r
- #\r
- call SecStartup\r
- \r
- #\r
- # Never return to here\r
- #\r
- jmp .\r
+++ /dev/null
-;------------------------------------------------------------------------------\r
-;\r
-; Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>\r
-; This program and the accompanying materials\r
-; are licensed and made available under the terms and conditions of the BSD License\r
-; which accompanies this distribution. The full text of the license may be found at\r
-; http://opensource.org/licenses/bsd-license.php.\r
-;\r
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-;\r
-; Module Name:\r
-;\r
-; SecEntry.asm\r
-;\r
-; Abstract:\r
-;\r
-; This is the code that begins in protected mode.\r
-; It will transfer the control to pei core.\r
-;\r
-;------------------------------------------------------------------------------\r
-#include <Base.h>\r
-\r
-.686p\r
-.xmm\r
-.model small, c\r
-\r
-EXTRN SecStartup:NEAR\r
-\r
-; Pcds\r
-EXTRN PcdGet32 (PcdPayloadFdMemBase):DWORD\r
-\r
- .code\r
-\r
-;\r
-; SecCore Entry Point\r
-;\r
-; Processor is in flat protected mode\r
-;\r
-; @param[in] EAX Initial value of the EAX register (BIST: Built-in Self Test)\r
-; @param[in] DI 'BP': boot-strap processor, or 'AP': application processor\r
-; @param[in] EBP Pointer to the start of the Boot Firmware Volume\r
-;\r
-; @return None This routine does not return\r
-;\r
-\r
-_ModuleEntryPoint PROC PUBLIC \r
- ;\r
- ; Disable all the interrupts\r
- ; \r
- cli\r
- ;\r
- ; Construct the temporary memory at 0x80000, length 0x10000\r
- ;\r
- mov esp, (BASE_512KB + SIZE_64KB)\r
- \r
- ;\r
- ; Pass BFV into the PEI Core\r
- ;\r
- push PcdGet32 (PcdPayloadFdMemBase)\r
-\r
- ;\r
- ; Pass stack base into the PEI Core\r
- ;\r
- push BASE_512KB\r
-\r
- ;\r
- ; Pass stack size into the PEI Core\r
- ;\r
- push SIZE_64KB\r
-\r
- ;\r
- ; Pass Control into the PEI Core\r
- ;\r
- call SecStartup\r
-_ModuleEntryPoint ENDP\r
-\r
-END\r
+++ /dev/null
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Abstract:
-#
-# Switch the stack from temporary memory to permenent memory.
-#
-#------------------------------------------------------------------------------
-
-
-#------------------------------------------------------------------------------
-# VOID
-# EFIAPI
-# SecSwitchStack (
-# UINT32 TemporaryMemoryBase,
-# UINT32 PermenentMemoryBase
-# )#
-#------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX (SecSwitchStack)
-ASM_PFX(SecSwitchStack):
- #
- # Save standard registers so they can be used to change stack
- #
- pushl %eax
- pushl %ebx
- pushl %ecx
- pushl %edx
-
- #
- # !!CAUTION!! this function address's is pushed into stack after
- # migration of whole temporary memory, so need save it to permenent
- # memory at first!
- #
- movl 20(%esp), %ebx # Save the first parameter
- movl 24(%esp), %ecx # Save the second parameter
-
- #
- # Save this function's return address into permenent memory at first.
- # Then, Fixup the esp point to permenent memory
- #
- movl %esp, %eax
- subl %ebx, %eax
- addl %ecx, %eax
- movl 0(%esp), %edx # copy pushed register's value to permenent memory
- movl %edx, 0(%eax)
- movl 4(%esp), %edx
- movl %edx, 4(%eax)
- movl 8(%esp), %edx
- movl %edx, 8(%eax)
- movl 12(%esp), %edx
- movl %edx, 12(%eax)
- movl 16(%esp), %edx # Update this function's return address into permenent memory
- movl %edx, 16(%eax)
- movl %eax, %esp # From now, esp is pointed to permenent memory
-
- #
- # Fixup the ebp point to permenent memory
- #
- movl %ebp, %eax
- subl %ebx, %eax
- addl %ecx, %eax
- movl %eax, %ebp # From now, ebp is pointed to permenent memory
-
- popl %edx
- popl %ecx
- popl %ebx
- popl %eax
- ret
-
-
+++ /dev/null
-;------------------------------------------------------------------------------\r
-;\r
-; Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>\r
-; This program and the accompanying materials\r
-; are licensed and made available under the terms and conditions of the BSD License\r
-; which accompanies this distribution. The full text of the license may be found at\r
-; http://opensource.org/licenses/bsd-license.php.\r
-;\r
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-;\r
-; Abstract:\r
-;\r
-; Switch the stack from temporary memory to permenent memory.\r
-;\r
-;------------------------------------------------------------------------------\r
-\r
- .586p\r
- .model flat,C\r
- .code\r
- \r
-;------------------------------------------------------------------------------\r
-; VOID\r
-; EFIAPI\r
-; SecSwitchStack (\r
-; UINT32 TemporaryMemoryBase,\r
-; UINT32 PermenentMemoryBase\r
-; );\r
-;------------------------------------------------------------------------------ \r
-SecSwitchStack PROC\r
- ;\r
- ; Save three register: eax, ebx, ecx\r
- ;\r
- push eax\r
- push ebx\r
- push ecx\r
- push edx\r
- \r
- ;\r
- ; !!CAUTION!! this function address's is pushed into stack after\r
- ; migration of whole temporary memory, so need save it to permenent\r
- ; memory at first!\r
- ;\r
- \r
- mov ebx, [esp + 20] ; Save the first parameter\r
- mov ecx, [esp + 24] ; Save the second parameter\r
- \r
- ;\r
- ; Save this function's return address into permenent memory at first.\r
- ; Then, Fixup the esp point to permenent memory\r
- ;\r
- mov eax, esp\r
- sub eax, ebx\r
- add eax, ecx\r
- mov edx, dword ptr [esp] ; copy pushed register's value to permenent memory\r
- mov dword ptr [eax], edx \r
- mov edx, dword ptr [esp + 4]\r
- mov dword ptr [eax + 4], edx \r
- mov edx, dword ptr [esp + 8]\r
- mov dword ptr [eax + 8], edx \r
- mov edx, dword ptr [esp + 12]\r
- mov dword ptr [eax + 12], edx \r
- mov edx, dword ptr [esp + 16] ; Update this function's return address into permenent memory\r
- mov dword ptr [eax + 16], edx \r
- mov esp, eax ; From now, esp is pointed to permenent memory\r
- \r
- ;\r
- ; Fixup the ebp point to permenent memory\r
- ;\r
- mov eax, ebp\r
- sub eax, ebx\r
- add eax, ecx\r
- mov ebp, eax ; From now, ebp is pointed to permenent memory\r
- \r
- pop edx\r
- pop ecx\r
- pop ebx\r
- pop eax\r
- ret\r
-SecSwitchStack ENDP\r
-\r
- END\r
+++ /dev/null
-## @file\r
-# This is the first module taking control from the coreboot.\r
-#\r
-# Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>\r
-#\r
-# This program and the accompanying materials\r
-# are licensed and made available under the terms and conditions of the BSD License\r
-# which accompanies this distribution. The full text of the license may be found at\r
-# http://opensource.org/licenses/bsd-license.php.\r
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-#\r
-#\r
-##\r
-\r
-[Defines]\r
- INF_VERSION = 0x00010005\r
- BASE_NAME = SecCore\r
- FILE_GUID = BA7BE337-6CFB-4dbb-B26C-21EC2FC16073\r
- MODULE_TYPE = SEC\r
- VERSION_STRING = 1.0\r
-\r
-\r
-#\r
-# The following information is for reference only and not required by the build tools.\r
-#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
-#\r
-\r
-[Sources]\r
- SecMain.c\r
- SecMain.h\r
- FindPeiCore.c\r
-\r
-[Sources.IA32]\r
- Ia32/Stack.asm | MSFT\r
- Ia32/Stack.S | GCC\r
- Ia32/SecEntry.asm | MSFT\r
- Ia32/SecEntry.S | GCC\r
-\r
-[Packages]\r
- MdePkg/MdePkg.dec\r
- MdeModulePkg/MdeModulePkg.dec\r
- UefiCpuPkg/UefiCpuPkg.dec\r
- CorebootModulePkg/CorebootModulePkg.dec\r
-\r
-[LibraryClasses]\r
- BaseMemoryLib\r
- DebugLib\r
- BaseLib\r
- PcdLib\r
- DebugAgentLib\r
- UefiCpuLib\r
- PeCoffGetEntryPointLib\r
- PeCoffExtraActionLib\r
-\r
-[Ppis]\r
- gEfiSecPlatformInformationPpiGuid # PPI ALWAYS_PRODUCED\r
- gEfiTemporaryRamSupportPpiGuid # PPI ALWAYS_PRODUCED\r
-\r
-[Pcd]\r
- gUefiCorebootModulePkgTokenSpaceGuid.PcdPayloadFdMemBase\r
- gUefiCorebootModulePkgTokenSpaceGuid.PcdPayloadFdMemSize\r
-\r
+++ /dev/null
-/** @file\r
- C funtions in SEC\r
-\r
-Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>\r
-This program and the accompanying materials\r
-are licensed and made available under the terms and conditions of the BSD License\r
-which accompanies this distribution. The full text of the license may be found at\r
-http://opensource.org/licenses/bsd-license.php\r
-\r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-\r
-#include "SecMain.h"\r
-\r
-EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI gSecTemporaryRamSupportPpi = {\r
- SecTemporaryRamSupport\r
-};\r
-\r
-EFI_PEI_PPI_DESCRIPTOR mPeiSecPlatformInformationPpi[] = {\r
- {\r
- (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
- &gEfiTemporaryRamSupportPpiGuid,\r
- &gSecTemporaryRamSupportPpi\r
- }\r
-};\r
-\r
-//\r
-// These are IDT entries pointing to 10:FFFFFFE4h.\r
-//\r
-UINT64 mIdtEntryTemplate = 0xffff8e000010ffe4ULL;\r
-\r
-/**\r
- Caller provided function to be invoked at the end of InitializeDebugAgent().\r
-\r
- Entry point to the C language phase of SEC. After the SEC assembly\r
- code has initialized some temporary memory and set up the stack,\r
- the control is transferred to this function.\r
-\r
- @param[in] Context The first input parameter of InitializeDebugAgent().\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-SecStartupPhase2(\r
- IN VOID *Context\r
- );\r
-\r
-\r
-/**\r
-\r
- Entry point to the C language phase of SEC. After the SEC assembly\r
- code has initialized some temporary memory and set up the stack,\r
- the control is transferred to this function.\r
-\r
-\r
- @param SizeOfRam Size of the temporary memory available for use.\r
- @param TempRamBase Base address of tempory ram\r
- @param BootFirmwareVolume Base address of the Boot Firmware Volume.\r
-**/\r
-VOID\r
-EFIAPI\r
-SecStartup (\r
- IN UINT32 SizeOfRam,\r
- IN UINT32 TempRamBase,\r
- IN VOID *BootFirmwareVolume\r
- )\r
-{\r
- EFI_SEC_PEI_HAND_OFF SecCoreData;\r
- IA32_DESCRIPTOR IdtDescriptor;\r
- SEC_IDT_TABLE IdtTableInStack;\r
- UINT32 Index;\r
- UINT32 PeiStackSize;\r
-\r
- PeiStackSize = (SizeOfRam >> 1);\r
-\r
- ASSERT (PeiStackSize < SizeOfRam);\r
-\r
- //\r
- // Process all libraries constructor function linked to SecCore.\r
- //\r
- ProcessLibraryConstructorList ();\r
-\r
- //\r
- // Initialize floating point operating environment\r
- // to be compliant with UEFI spec.\r
- //\r
- InitializeFloatingPointUnits ();\r
-\r
-\r
- // |-------------------|---->\r
- // |Idt Table |\r
- // |-------------------|\r
- // |PeiService Pointer | PeiStackSize\r
- // |-------------------|\r
- // | |\r
- // | Stack |\r
- // |-------------------|---->\r
- // | |\r
- // | |\r
- // | Heap | PeiTemporayRamSize\r
- // | |\r
- // | |\r
- // |-------------------|----> TempRamBase\r
-\r
- IdtTableInStack.PeiService = 0;\r
- for (Index = 0; Index < SEC_IDT_ENTRY_COUNT; Index ++) {\r
- CopyMem ((VOID*)&IdtTableInStack.IdtTable[Index], (VOID*)&mIdtEntryTemplate, sizeof (UINT64));\r
- }\r
-\r
- IdtDescriptor.Base = (UINTN) &IdtTableInStack.IdtTable;\r
- IdtDescriptor.Limit = (UINT16)(sizeof (IdtTableInStack.IdtTable) - 1);\r
-\r
- AsmWriteIdtr (&IdtDescriptor);\r
-\r
- //\r
- // Update the base address and length of Pei temporary memory\r
- //\r
- SecCoreData.DataSize = (UINT16) sizeof (EFI_SEC_PEI_HAND_OFF);\r
- SecCoreData.BootFirmwareVolumeBase = BootFirmwareVolume;\r
- SecCoreData.BootFirmwareVolumeSize = (UINTN)(0x100000000ULL - (UINTN) BootFirmwareVolume);\r
- SecCoreData.TemporaryRamBase = (VOID*)(UINTN) TempRamBase;\r
- SecCoreData.TemporaryRamSize = SizeOfRam;\r
- SecCoreData.PeiTemporaryRamBase = SecCoreData.TemporaryRamBase;\r
- SecCoreData.PeiTemporaryRamSize = SizeOfRam - PeiStackSize;\r
- SecCoreData.StackBase = (VOID*)(UINTN)(TempRamBase + SecCoreData.PeiTemporaryRamSize);\r
- SecCoreData.StackSize = PeiStackSize;\r
-\r
- //\r
- // Initialize Debug Agent to support source level debug in SEC/PEI phases before memory ready.\r
- //\r
- InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, &SecCoreData, SecStartupPhase2);\r
-\r
-}\r
-\r
-/**\r
- Caller provided function to be invoked at the end of InitializeDebugAgent().\r
-\r
- Entry point to the C language phase of SEC. After the SEC assembly\r
- code has initialized some temporary memory and set up the stack,\r
- the control is transferred to this function.\r
-\r
- @param[in] Context The first input parameter of InitializeDebugAgent().\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-SecStartupPhase2(\r
- IN VOID *Context\r
- )\r
-{\r
- EFI_SEC_PEI_HAND_OFF *SecCoreData;\r
- EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint;\r
-\r
- SecCoreData = (EFI_SEC_PEI_HAND_OFF *) Context;\r
- //\r
- // Find Pei Core entry point. It will report SEC and Pei Core debug information if remote debug\r
- // is enabled.\r
- //\r
- FindAndReportEntryPoints ((EFI_FIRMWARE_VOLUME_HEADER *) SecCoreData->BootFirmwareVolumeBase, &PeiCoreEntryPoint);\r
- if (PeiCoreEntryPoint == NULL)\r
- {\r
- CpuDeadLoop ();\r
- }\r
-\r
- //\r
- // Transfer the control to the PEI core\r
- //\r
- ASSERT (PeiCoreEntryPoint != NULL);\r
- (*PeiCoreEntryPoint) (SecCoreData, (EFI_PEI_PPI_DESCRIPTOR *)&mPeiSecPlatformInformationPpi);\r
-\r
- //\r
- // Should not come here.\r
- //\r
- return ;\r
-}\r
-\r
-/**\r
- This service of the TEMPORARY_RAM_SUPPORT_PPI that migrates temporary RAM into\r
- permanent memory.\r
-\r
- @param PeiServices Pointer to the PEI Services Table.\r
- @param TemporaryMemoryBase Source Address in temporary memory from which the SEC or PEIM will copy the\r
- Temporary RAM contents.\r
- @param PermanentMemoryBase Destination Address in permanent memory into which the SEC or PEIM will copy the\r
- Temporary RAM contents.\r
- @param CopySize Amount of memory to migrate from temporary to permanent memory.\r
-\r
- @retval EFI_SUCCESS The data was successfully returned.\r
- @retval EFI_INVALID_PARAMETER PermanentMemoryBase + CopySize > TemporaryMemoryBase when\r
- TemporaryMemoryBase > PermanentMemoryBase.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-SecTemporaryRamSupport (\r
- IN CONST EFI_PEI_SERVICES **PeiServices,\r
- IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,\r
- IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,\r
- IN UINTN CopySize\r
- )\r
-{\r
- IA32_DESCRIPTOR IdtDescriptor;\r
- VOID* OldHeap;\r
- VOID* NewHeap;\r
- VOID* OldStack;\r
- VOID* NewStack;\r
- DEBUG_AGENT_CONTEXT_POSTMEM_SEC DebugAgentContext;\r
- BOOLEAN OldStatus;\r
- UINTN PeiStackSize;\r
-\r
- PeiStackSize = (CopySize >> 1);\r
-\r
- ASSERT (PeiStackSize < CopySize);\r
-\r
- //\r
- // |-------------------|---->\r
- // | Stack | PeiStackSize\r
- // |-------------------|---->\r
- // | Heap | PeiTemporayRamSize\r
- // |-------------------|----> TempRamBase\r
- //\r
- // |-------------------|---->\r
- // | Heap | PeiTemporayRamSize\r
- // |-------------------|---->\r
- // | Stack | PeiStackSize\r
- // |-------------------|----> PermanentMemoryBase\r
- //\r
-\r
- OldHeap = (VOID*)(UINTN)TemporaryMemoryBase;\r
- NewHeap = (VOID*)((UINTN)PermanentMemoryBase + PeiStackSize);\r
- \r
- OldStack = (VOID*)((UINTN)TemporaryMemoryBase + CopySize - PeiStackSize);\r
- NewStack = (VOID*)(UINTN)PermanentMemoryBase;\r
-\r
- DebugAgentContext.HeapMigrateOffset = (UINTN)NewHeap - (UINTN)OldHeap;\r
- DebugAgentContext.StackMigrateOffset = (UINTN)NewStack - (UINTN)OldStack;\r
- \r
- OldStatus = SaveAndSetDebugTimerInterrupt (FALSE);\r
- //\r
- // Initialize Debug Agent to support source level debug in PEI phase after memory ready.\r
- // It will build HOB and fix up the pointer in IDT table.\r
- //\r
- InitializeDebugAgent (DEBUG_AGENT_INIT_POSTMEM_SEC, (VOID *) &DebugAgentContext, NULL);\r
-\r
- //\r
- // Migrate Heap\r
- //\r
- CopyMem (NewHeap, OldHeap, CopySize - PeiStackSize);\r
-\r
- //\r
- // Migrate Stack\r
- //\r
- CopyMem (NewStack, OldStack, PeiStackSize);\r
-\r
-\r
- //\r
- // We need *not* fix the return address because currently,\r
- // The PeiCore is executed in flash.\r
- //\r
-\r
- //\r
- // Rebase IDT table in permanent memory\r
- //\r
- AsmReadIdtr (&IdtDescriptor);\r
- IdtDescriptor.Base = IdtDescriptor.Base - (UINTN)OldStack + (UINTN)NewStack;\r
-\r
- AsmWriteIdtr (&IdtDescriptor);\r
-\r
-\r
- //\r
- // Program MTRR\r
- //\r
-\r
- //\r
- // SecSwitchStack function must be invoked after the memory migration\r
- // immediatly, also we need fixup the stack change caused by new call into\r
- // permenent memory.\r
- //\r
- SecSwitchStack (\r
- (UINT32) (UINTN) OldStack,\r
- (UINT32) (UINTN) NewStack\r
- );\r
-\r
- SaveAndSetDebugTimerInterrupt (OldStatus);\r
- \r
- return EFI_SUCCESS;\r
-}\r
-\r
+++ /dev/null
-/** @file\r
- Master header file for SecCore.\r
-\r
-Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>\r
-This program and the accompanying materials\r
-are licensed and made available under the terms and conditions of the BSD License\r
-which accompanies this distribution. The full text of the license may be found at\r
-http://opensource.org/licenses/bsd-license.php\r
-\r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-#ifndef _SEC_CORE_H_\r
-#define _SEC_CORE_H_\r
-\r
-\r
-#include <PiPei.h>\r
-\r
-#include <Ppi/SecPlatformInformation.h>\r
-#include <Ppi/TemporaryRamSupport.h>\r
-\r
-#include <Library/BaseLib.h>\r
-#include <Library/DebugLib.h>\r
-#include <Library/PcdLib.h>\r
-#include <Library/BaseMemoryLib.h>\r
-#include <Library/UefiCpuLib.h>\r
-#include <Library/PeCoffGetEntryPointLib.h>\r
-#include <Library/PeCoffExtraActionLib.h>\r
-#include <Library/DebugAgentLib.h>\r
-\r
-\r
-#define SEC_IDT_ENTRY_COUNT 34\r
-\r
-typedef struct _SEC_IDT_TABLE {\r
- //\r
- // Reserved 8 bytes preceding IDT to store EFI_PEI_SERVICES**, since IDT base\r
- // address should be 8-byte alignment.\r
- // Note: For IA32, only the 4 bytes immediately preceding IDT is used to store\r
- // EFI_PEI_SERVICES**\r
- //\r
- UINT64 PeiService; \r
- UINT64 IdtTable[SEC_IDT_ENTRY_COUNT];\r
-} SEC_IDT_TABLE;\r
-\r
-/**\r
- Switch the stack in the temporary memory to the one in the permanent memory.\r
-\r
- This function must be invoked after the memory migration immediately. The relative\r
- position of the stack in the temporary and permanent memory is same.\r
-\r
- @param TemporaryMemoryBase Base address of the temporary memory.\r
- @param PermenentMemoryBase Base address of the permanent memory.\r
-**/\r
-VOID\r
-EFIAPI\r
-SecSwitchStack (\r
- UINT32 TemporaryMemoryBase,\r
- UINT32 PermenentMemoryBase\r
- );\r
-\r
-/**\r
- This service of the TEMPORARY_RAM_SUPPORT_PPI that migrates temporary RAM into\r
- permanent memory.\r
-\r
- @param PeiServices Pointer to the PEI Services Table.\r
- @param TemporaryMemoryBase Source Address in temporary memory from which the SEC or PEIM will copy the\r
- Temporary RAM contents.\r
- @param PermanentMemoryBase Destination Address in permanent memory into which the SEC or PEIM will copy the\r
- Temporary RAM contents.\r
- @param CopySize Amount of memory to migrate from temporary to permanent memory.\r
-\r
- @retval EFI_SUCCESS The data was successfully returned.\r
- @retval EFI_INVALID_PARAMETER PermanentMemoryBase + CopySize > TemporaryMemoryBase when\r
- TemporaryMemoryBase > PermanentMemoryBase.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-SecTemporaryRamSupport (\r
- IN CONST EFI_PEI_SERVICES **PeiServices,\r
- IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,\r
- IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,\r
- IN UINTN CopySize\r
- );\r
-\r
-/**\r
- Entry point to the C language phase of SEC. After the SEC assembly\r
- code has initialized some temporary memory and set up the stack,\r
- the control is transferred to this function.\r
-\r
- @param SizeOfRam Size of the temporary memory available for use.\r
- @param TempRamBase Base address of tempory ram\r
- @param BootFirmwareVolume Base address of the Boot Firmware Volume.\r
-**/\r
-VOID\r
-EFIAPI\r
-SecStartup (\r
- IN UINT32 SizeOfRam,\r
- IN UINT32 TempRamBase,\r
- IN VOID *BootFirmwareVolume\r
- );\r
-\r
-/**\r
- Find and return Pei Core entry point.\r
-\r
- It also find SEC and PEI Core file debug inforamtion. It will report them if\r
- remote debug is enabled.\r
-\r
- @param BootFirmwareVolumePtr Point to the boot firmware volume.\r
- @param PeiCoreEntryPoint Point to the PEI core entry point.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-FindAndReportEntryPoints (\r
- IN EFI_FIRMWARE_VOLUME_HEADER *BootFirmwareVolumePtr,\r
- OUT EFI_PEI_CORE_ENTRY_POINT *PeiCoreEntryPoint\r
- );\r
-\r
-/**\r
- Autogenerated function that calls the library constructors for all of the module's\r
- dependent libraries. This function must be called by the SEC Core once a stack has\r
- been established.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-ProcessLibraryConstructorList (\r
- VOID\r
- );\r
- \r
-#endif\r
projects / mirror_edk2.git / commitdiff