\r
if (Base10Exponent >= 6) {\r
FreqMhz = ProcessorFrequency;\r
- for (Index = 0; Index < (UINTN) (Base10Exponent - 6); Index++) {\r
+ for (Index = 0; Index < (UINT32) Base10Exponent - 6; Index++) {\r
FreqMhz *= 10;\r
}\r
} else {\r
\r
The EHCI register operation routines.\r
\r
-Copyright (c) 2007 - 2012, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2007 - 2017, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
Ehc->PciIo,\r
EfiPciIoWidthUint32,\r
Ehc->DebugPortBarNum,\r
- (UINT64) (Ehc->DebugPortOffset + Offset),\r
+ Ehc->DebugPortOffset + Offset,\r
1,\r
&Data\r
);\r
Ehc->PciIo,\r
EfiPciIoWidthUint32,\r
EHC_BAR_INDEX,\r
- (UINT64) (Ehc->CapLen + Offset),\r
+ Ehc->CapLen + Offset,\r
1,\r
&Data\r
);\r
Ehc->PciIo,\r
EfiPciIoWidthUint32,\r
EHC_BAR_INDEX,\r
- (UINT64) (Ehc->CapLen + Offset),\r
+ Ehc->CapLen + Offset,\r
1,\r
&Data\r
);\r
This PPI can be consumed by PEIM which produce gEfiPeiDeviceRecoveryModulePpiGuid\r
for Atapi CD ROM device.\r
\r
-Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions\r
//\r
// Pata & Sata, Primary & Secondary channel, Master & Slave device\r
//\r
- DevicePosition = (UINTN) (Index1 * 2 + Index2);\r
+ DevicePosition = Index1 * 2 + Index2;\r
\r
if (DiscoverAtapiDevice (AtapiBlkIoDev, DevicePosition, &MediaInfo, &MediaInfo2)) {\r
//\r
return EFI_NOT_FOUND;\r
}\r
\r
- PciIoDevice->RomSize = (UINT64) ((~AllOnes) + 1);\r
+ PciIoDevice->RomSize = (~AllOnes) + 1;\r
return EFI_SUCCESS;\r
}\r
\r
\r
The XHCI register operation routines.\r
\r
-Copyright (c) 2011 - 2016, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2011 - 2017, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
Xhc->PciIo,\r
EfiPciIoWidthUint32,\r
XHC_BAR_INDEX,\r
- (UINT64) (Xhc->CapLength + Offset),\r
+ Xhc->CapLength + Offset,\r
1,\r
&Data\r
);\r
Xhc->PciIo,\r
EfiPciIoWidthUint32,\r
XHC_BAR_INDEX,\r
- (UINT64) (Xhc->CapLength + Offset),\r
+ Xhc->CapLength + Offset,\r
1,\r
&Data\r
);\r
Xhc->PciIo,\r
EfiPciIoWidthUint16,\r
XHC_BAR_INDEX,\r
- (UINT64) (Xhc->CapLength + Offset),\r
+ Xhc->CapLength + Offset,\r
1,\r
&Data\r
);\r
Xhc->PciIo,\r
EfiPciIoWidthUint32,\r
XHC_BAR_INDEX,\r
- (UINT64) (Xhc->DBOff + Offset),\r
+ Xhc->DBOff + Offset,\r
1,\r
&Data\r
);\r
Xhc->PciIo,\r
EfiPciIoWidthUint32,\r
XHC_BAR_INDEX,\r
- (UINT64) (Xhc->DBOff + Offset),\r
+ Xhc->DBOff + Offset,\r
1,\r
&Data\r
);\r
Xhc->PciIo,\r
EfiPciIoWidthUint32,\r
XHC_BAR_INDEX,\r
- (UINT64) (Xhc->RTSOff + Offset),\r
+ Xhc->RTSOff + Offset,\r
1,\r
&Data\r
);\r
Xhc->PciIo,\r
EfiPciIoWidthUint32,\r
XHC_BAR_INDEX,\r
- (UINT64) (Xhc->RTSOff + Offset),\r
+ Xhc->RTSOff + Offset,\r
1,\r
&Data\r
);\r
Xhc->PciIo,\r
EfiPciIoWidthUint32,\r
XHC_BAR_INDEX,\r
- (UINT64) (Xhc->ExtCapRegBase + Offset),\r
+ Xhc->ExtCapRegBase + Offset,\r
1,\r
&Data\r
);\r
Xhc->PciIo,\r
EfiPciIoWidthUint32,\r
XHC_BAR_INDEX,\r
- (UINT64) (Xhc->ExtCapRegBase + Offset),\r
+ Xhc->ExtCapRegBase + Offset,\r
1,\r
&Data\r
);\r
/** @file\r
\r
- Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
Trd->UcdBaU = (UINT32)RShiftU64 ((UINT64)(UINTN)QueryReqUpiu, 32);\r
if (Opcode == UtpQueryFuncOpcodeWrDesc) {\r
Trd->RuL = (UINT16)DivU64x32 ((UINT64)ROUNDUP8 (sizeof (UTP_QUERY_RESP_UPIU)), sizeof (UINT32));\r
- Trd->RuO = (UINT16)DivU64x32 ((UINT64)(ROUNDUP8 (sizeof (UTP_QUERY_REQ_UPIU)) + ROUNDUP8 (DataSize)), sizeof (UINT32));\r
+ Trd->RuO = (UINT16)DivU64x32 ((UINT64)ROUNDUP8 (sizeof (UTP_QUERY_REQ_UPIU)) + ROUNDUP8 (DataSize), sizeof (UINT32));\r
} else {\r
- Trd->RuL = (UINT16)DivU64x32 ((UINT64)(ROUNDUP8 (sizeof (UTP_QUERY_RESP_UPIU)) + ROUNDUP8 (DataSize)), sizeof (UINT32));\r
+ Trd->RuL = (UINT16)DivU64x32 ((UINT64)ROUNDUP8 (sizeof (UTP_QUERY_RESP_UPIU)) + ROUNDUP8 (DataSize), sizeof (UINT32));\r
Trd->RuO = (UINT16)DivU64x32 ((UINT64)ROUNDUP8 (sizeof (UTP_QUERY_REQ_UPIU)), sizeof (UINT32));\r
}\r
\r
UfsPassThruDxe driver is used to produce EFI_EXT_SCSI_PASS_THRU protocol interface\r
for upper layer application to execute UFS-supported SCSI cmds.\r
\r
- Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
Trd->UcdBaU = (UINT32)RShiftU64 ((UINT64)CmdDescPhyAddr, 32);\r
if (Opcode == UtpQueryFuncOpcodeWrDesc) {\r
Trd->RuL = (UINT16)DivU64x32 ((UINT64)ROUNDUP8 (sizeof (UTP_QUERY_RESP_UPIU)), sizeof (UINT32));\r
- Trd->RuO = (UINT16)DivU64x32 ((UINT64)(ROUNDUP8 (sizeof (UTP_QUERY_REQ_UPIU)) + ROUNDUP8 (DataSize)), sizeof (UINT32));\r
+ Trd->RuO = (UINT16)DivU64x32 ((UINT64)ROUNDUP8 (sizeof (UTP_QUERY_REQ_UPIU)) + ROUNDUP8 (DataSize), sizeof (UINT32));\r
} else {\r
- Trd->RuL = (UINT16)DivU64x32 ((UINT64)(ROUNDUP8 (sizeof (UTP_QUERY_RESP_UPIU)) + ROUNDUP8 (DataSize)), sizeof (UINT32));\r
+ Trd->RuL = (UINT16)DivU64x32 ((UINT64)ROUNDUP8 (sizeof (UTP_QUERY_RESP_UPIU)) + ROUNDUP8 (DataSize), sizeof (UINT32));\r
Trd->RuO = (UINT16)DivU64x32 ((UINT64)ROUNDUP8 (sizeof (UTP_QUERY_REQ_UPIU)), sizeof (UINT32));\r
}\r
\r
//\r
// Test if the memory is avalaible or not.\r
// \r
- BaseOffsetPageNumber = (UINTN)EFI_SIZE_TO_PAGES((UINT32)(ImageBase - DxeCodeBase));\r
- TopOffsetPageNumber = (UINTN)EFI_SIZE_TO_PAGES((UINT32)(ImageBase + ImageSize - DxeCodeBase));\r
+ BaseOffsetPageNumber = EFI_SIZE_TO_PAGES((UINT32)(ImageBase - DxeCodeBase));\r
+ TopOffsetPageNumber = EFI_SIZE_TO_PAGES((UINT32)(ImageBase + ImageSize - DxeCodeBase));\r
for (Index = BaseOffsetPageNumber; Index < TopOffsetPageNumber; Index ++) {\r
if ((mDxeCodeMemoryRangeUsageBitMap[Index / 64] & LShiftU64(1, (Index % 64))) != 0) {\r
//\r
//\r
Handle = (IMAGE_FILE_HANDLE*)ImageContext->Handle;\r
ImgHdr = (EFI_IMAGE_OPTIONAL_HEADER_UNION *)((CHAR8* )Handle->Source + ImageContext->PeCoffHeaderOffset);\r
- SectionHeaderOffset = (UINTN)(\r
- ImageContext->PeCoffHeaderOffset +\r
- sizeof (UINT32) +\r
- sizeof (EFI_IMAGE_FILE_HEADER) +\r
- ImgHdr->Pe32.FileHeader.SizeOfOptionalHeader\r
- );\r
+ SectionHeaderOffset = ImageContext->PeCoffHeaderOffset +\r
+ sizeof (UINT32) +\r
+ sizeof (EFI_IMAGE_FILE_HEADER) +\r
+ ImgHdr->Pe32.FileHeader.SizeOfOptionalHeader;\r
NumberOfSections = ImgHdr->Pe32.FileHeader.NumberOfSections;\r
\r
//\r
Support functions for managing debug image info table when loading and unloading\r
images.\r
\r
-Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
Status = CoreFreePages (Memory, UnalignedPages);\r
ASSERT_EFI_ERROR (Status);\r
}\r
- Memory = (EFI_PHYSICAL_ADDRESS)(AlignedMemory + EFI_PAGES_TO_SIZE (Pages));\r
+ Memory = AlignedMemory + EFI_PAGES_TO_SIZE (Pages);\r
UnalignedPages = RealPages - Pages - UnalignedPages;\r
if (UnalignedPages > 0) {\r
//\r
/** @file\r
Pei Core Load Image Support\r
\r
-Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
SectionHeaderOffset = sizeof (EFI_TE_IMAGE_HEADER);\r
NumberOfSections = ImgHdr->Te.NumberOfSections;\r
} else {\r
- SectionHeaderOffset = (UINTN)(\r
- ImageContext->PeCoffHeaderOffset +\r
- sizeof (UINT32) +\r
- sizeof (EFI_IMAGE_FILE_HEADER) +\r
- ImgHdr->Pe32.FileHeader.SizeOfOptionalHeader\r
- );\r
+ SectionHeaderOffset = ImageContext->PeCoffHeaderOffset +\r
+ sizeof (UINT32) +\r
+ sizeof (EFI_IMAGE_FILE_HEADER) +\r
+ ImgHdr->Pe32.FileHeader.SizeOfOptionalHeader;\r
NumberOfSections = ImgHdr->Pe32.FileHeader.NumberOfSections;\r
}\r
//\r
Depex - Dependency Expresion.\r
\r
Copyright (c) 2014, Hewlett-Packard Development Company, L.P.\r
- Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials are licensed and made available \r
under the terms and conditions of the BSD License which accompanies this \r
distribution. The full text of the license may be found at \r
//\r
// Test if the memory is avalaible or not.\r
// \r
- BaseOffsetPageNumber = (UINTN)EFI_SIZE_TO_PAGES((UINT32)(ImageBase - SmmCodeBase));\r
- TopOffsetPageNumber = (UINTN)EFI_SIZE_TO_PAGES((UINT32)(ImageBase + ImageSize - SmmCodeBase));\r
+ BaseOffsetPageNumber = EFI_SIZE_TO_PAGES((UINT32)(ImageBase - SmmCodeBase));\r
+ TopOffsetPageNumber = EFI_SIZE_TO_PAGES((UINT32)(ImageBase + ImageSize - SmmCodeBase));\r
for (Index = BaseOffsetPageNumber; Index < TopOffsetPageNumber; Index ++) {\r
if ((mSmmCodeMemoryRangeUsageBitMap[Index / 64] & LShiftU64(1, (Index % 64))) != 0) {\r
//\r
// Get PeHeader pointer\r
//\r
ImgHdr = (EFI_IMAGE_OPTIONAL_HEADER_UNION *)((CHAR8* )ImageContext->Handle + ImageContext->PeCoffHeaderOffset);\r
- SectionHeaderOffset = (UINTN)(\r
- ImageContext->PeCoffHeaderOffset +\r
- sizeof (UINT32) +\r
- sizeof (EFI_IMAGE_FILE_HEADER) +\r
- ImgHdr->Pe32.FileHeader.SizeOfOptionalHeader\r
- );\r
+ SectionHeaderOffset = ImageContext->PeCoffHeaderOffset +\r
+ sizeof (UINT32) +\r
+ sizeof (EFI_IMAGE_FILE_HEADER) +\r
+ ImgHdr->Pe32.FileHeader.SizeOfOptionalHeader;\r
NumberOfSections = ImgHdr->Pe32.FileHeader.NumberOfSections;\r
\r
//\r
// Align buffer on section boundary\r
//\r
ImageContext.ImageAddress += ImageContext.SectionAlignment - 1;\r
- ImageContext.ImageAddress &= ~((EFI_PHYSICAL_ADDRESS)(ImageContext.SectionAlignment - 1));\r
+ ImageContext.ImageAddress &= ~((EFI_PHYSICAL_ADDRESS)ImageContext.SectionAlignment - 1);\r
\r
//\r
// Load the image to our new buffer\r
// Get PeHeader pointer\r
//\r
ImgHdr = (EFI_IMAGE_OPTIONAL_HEADER_UNION *)((CHAR8* )ImageContext->Handle + ImageContext->PeCoffHeaderOffset);\r
- SectionHeaderOffset = (UINTN)(\r
- ImageContext->PeCoffHeaderOffset +\r
- sizeof (UINT32) +\r
- sizeof (EFI_IMAGE_FILE_HEADER) +\r
- ImgHdr->Pe32.FileHeader.SizeOfOptionalHeader\r
- );\r
+ SectionHeaderOffset = ImageContext->PeCoffHeaderOffset +\r
+ sizeof (UINT32) +\r
+ sizeof (EFI_IMAGE_FILE_HEADER) +\r
+ ImgHdr->Pe32.FileHeader.SizeOfOptionalHeader;\r
NumberOfSections = ImgHdr->Pe32.FileHeader.NumberOfSections;\r
\r
//\r
}\r
\r
ImageContext.ImageAddress += ImageContext.SectionAlignment - 1;\r
- ImageContext.ImageAddress &= ~((EFI_PHYSICAL_ADDRESS)(ImageContext.SectionAlignment - 1));\r
+ ImageContext.ImageAddress &= ~((EFI_PHYSICAL_ADDRESS)ImageContext.SectionAlignment - 1);\r
\r
//\r
// Print debug message showing SMM Core load address.\r
EFI_GRAPHICS_OUTPUT_PROTOCOL *GraphicsOutput;\r
\r
ImagePayload = (DISPLAY_DISPLAY_PAYLOAD *)(CapsuleHeader + 1);\r
- PayloadSize = (UINTN)(CapsuleHeader->CapsuleImageSize - sizeof(EFI_CAPSULE_HEADER));\r
+ PayloadSize = CapsuleHeader->CapsuleImageSize - sizeof(EFI_CAPSULE_HEADER);\r
\r
if (ImagePayload->Version != 1) {\r
return EFI_UNSUPPORTED;\r
for (Index = 0; Index < FmpCapsuleHeader->EmbeddedDriverCount; Index++) {\r
DEBUG((DEBUG_VERBOSE, " ItemOffsetList[%d] - 0x%lx\n", Index, ItemOffsetList[Index]));\r
}\r
- for (; Index < (UINTN)(FmpCapsuleHeader->EmbeddedDriverCount + FmpCapsuleHeader->PayloadItemCount); Index++) {\r
+ for (; Index < (UINT32)FmpCapsuleHeader->EmbeddedDriverCount + FmpCapsuleHeader->PayloadItemCount; Index++) {\r
DEBUG((DEBUG_VERBOSE, " ItemOffsetList[%d] - 0x%lx\n", Index, ItemOffsetList[Index]));\r
ImageHeader = (EFI_FIRMWARE_MANAGEMENT_CAPSULE_IMAGE_HEADER *)((UINT8 *)FmpCapsuleHeader + ItemOffsetList[Index]);\r
\r
on DxeCore Memory Allocation services for DxeCore,\r
with memory profile support.\r
\r
- Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials \r
are licensed and made available under the terms and conditions of the BSD License \r
which accompanies this distribution. The full text of the license may be found at \r
Status = CoreFreePages (Memory, UnalignedPages);\r
ASSERT_EFI_ERROR (Status);\r
}\r
- Memory = (EFI_PHYSICAL_ADDRESS) (AlignedMemory + EFI_PAGES_TO_SIZE (Pages));\r
+ Memory = AlignedMemory + EFI_PAGES_TO_SIZE (Pages);\r
UnalignedPages = RealPages - Pages - UnalignedPages;\r
if (UnalignedPages > 0) {\r
//\r
return EFI_NOT_FOUND;\r
}\r
Smbios.Hdr = (SMBIOS_STRUCTURE *) (UINTN) SmbiosTable->TableAddress;\r
- SmbiosEnd.Raw = (UINT8 *) (UINTN) (SmbiosTable->TableAddress + SmbiosTable->TableLength);\r
+ SmbiosEnd.Raw = (UINT8 *) ((UINTN) SmbiosTable->TableAddress + SmbiosTable->TableLength);\r
}\r
\r
do {\r
// Here we do not count the reserved memory for runtime script table.\r
PageNumber = (UINT16) (mS3BootScriptTablePtr->TableMemoryPageNumber - PcdGet16(PcdS3BootScriptRuntimeTableReservePageNumber));\r
TableLength = mS3BootScriptTablePtr->TableLength;\r
- if ((UINTN) EFI_PAGES_TO_SIZE ((UINTN) PageNumber) < (UINTN) (TableLength + EntryLength + sizeof (EFI_BOOT_SCRIPT_TERMINATE))) {\r
+ if (EFI_PAGES_TO_SIZE ((UINTN) PageNumber) < (TableLength + EntryLength + sizeof (EFI_BOOT_SCRIPT_TERMINATE))) {\r
//\r
// The buffer is too small to hold the table, Reallocate the buffer\r
//\r
//\r
// Check if the memory range reserved for S3 Boot Script table is large enough to hold the node.\r
//\r
- if ((UINTN) (mS3BootScriptTablePtr->TableLength + EntryLength + sizeof (EFI_BOOT_SCRIPT_TERMINATE)) <= (UINTN) EFI_PAGES_TO_SIZE ((UINTN) (mS3BootScriptTablePtr->TableMemoryPageNumber))) {\r
+ if ((mS3BootScriptTablePtr->TableLength + EntryLength + sizeof (EFI_BOOT_SCRIPT_TERMINATE)) <= EFI_PAGES_TO_SIZE ((UINTN) (mS3BootScriptTablePtr->TableMemoryPageNumber))) {\r
NewEntryPtr = mS3BootScriptTablePtr->TableBase + mS3BootScriptTablePtr->TableLength;\r
mS3BootScriptTablePtr->TableLength = mS3BootScriptTablePtr->TableLength + EntryLength;\r
//\r
In addition, allocation for the Reserved memory types are not supported and will \r
always return NULL.\r
\r
- Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials \r
are licensed and made available under the terms and conditions of the BSD License \r
which accompanies this distribution. The full text of the license may be found at \r
Status = SmmFreePages (Memory, UnalignedPages);\r
ASSERT_EFI_ERROR (Status);\r
}\r
- Memory = (EFI_PHYSICAL_ADDRESS) (AlignedMemory + EFI_PAGES_TO_SIZE (Pages));\r
+ Memory = AlignedMemory + EFI_PAGES_TO_SIZE (Pages);\r
UnalignedPages = RealPages - Pages - UnalignedPages;\r
if (UnalignedPages > 0) {\r
//\r
allocation for the Reserved memory types are not supported and will always \r
return NULL.\r
\r
- Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials \r
are licensed and made available under the terms and conditions of the BSD License \r
which accompanies this distribution. The full text of the license may be found at \r
Status = gSmst->SmmFreePages (Memory, UnalignedPages);\r
ASSERT_EFI_ERROR (Status);\r
}\r
- Memory = (EFI_PHYSICAL_ADDRESS) (AlignedMemory + EFI_PAGES_TO_SIZE (Pages));\r
+ Memory = AlignedMemory + EFI_PAGES_TO_SIZE (Pages);\r
UnalignedPages = RealPages - Pages - UnalignedPages;\r
if (UnalignedPages > 0) {\r
//\r
)\r
{\r
if ((Char >= L'0') && (Char <= L'9')) {\r
- return (UINTN) (Char - L'0');\r
+ return (Char - L'0');\r
}\r
\r
if ((Char >= L'A') && (Char <= L'F')) {\r
- return (UINTN) (Char - L'A' + 0xA);\r
+ return (Char - L'A' + 0xA);\r
}\r
\r
ASSERT (FALSE);\r
//\r
// Check whether VarBuffer is enough\r
//\r
- if ((UINTN) (Offset + Width) > MaxBufferSize) {\r
+ if ((UINT32)Offset + Width > MaxBufferSize) {\r
DataBuffer = ReallocatePool (\r
MaxBufferSize,\r
Offset + Width + HII_LIB_DEFAULT_VARSTORE_SIZE,\r
Support routines for memory allocation routines based \r
on boot services for Dxe phase drivers, with memory profile support.\r
\r
- Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials \r
are licensed and made available under the terms and conditions of the BSD License \r
which accompanies this distribution. The full text of the license may be found at \r
Status = gBS->FreePages (Memory, UnalignedPages);\r
ASSERT_EFI_ERROR (Status);\r
}\r
- Memory = (EFI_PHYSICAL_ADDRESS) (AlignedMemory + EFI_PAGES_TO_SIZE (Pages));\r
+ Memory = AlignedMemory + EFI_PAGES_TO_SIZE (Pages);\r
UnalignedPages = RealPages - Pages - UnalignedPages;\r
if (UnalignedPages > 0) {\r
//\r
/** @file\r
Var Check Hii handler.\r
\r
-Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
UINT8 Index;\r
UINT8 MaxContainers;\r
\r
- if ((UINTN) (HiiQuestion->VarOffset + HiiQuestion->StorageWidth) > DataSize) {\r
+ if (((UINT32) HiiQuestion->VarOffset + HiiQuestion->StorageWidth) > DataSize) {\r
DEBUG ((EFI_D_INFO, "VarCheckHiiQuestion fail: (VarOffset(0x%04x) + StorageWidth(0x%02x)) > Size(0x%x)\n", HiiQuestion->VarOffset, HiiQuestion->StorageWidth, DataSize));\r
return FALSE;\r
}\r
\r
case EFI_IFR_ORDERED_LIST_OP:\r
MaxContainers = ((VAR_CHECK_HII_QUESTION_ORDEREDLIST *) HiiQuestion)->MaxContainers;\r
- if ((UINTN) (HiiQuestion->VarOffset + HiiQuestion->StorageWidth * MaxContainers) > DataSize) {\r
+ if (((UINT32) HiiQuestion->VarOffset + HiiQuestion->StorageWidth * MaxContainers) > DataSize) {\r
DEBUG ((EFI_D_INFO, "VarCheckHiiQuestion fail: (VarOffset(0x%04x) + StorageWidth(0x%02x) * MaxContainers(0x%02x)) > Size(0x%x)\n", HiiQuestion->VarOffset, HiiQuestion->StorageWidth, MaxContainers, DataSize));\r
return FALSE;\r
}\r
This driver is dispatched by Dxe core and the driver will reload itself to ACPI reserved memory\r
in the entry point. The functionality is to interpret and restore the S3 boot script\r
\r
-Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r
\r
This program and the accompanying materials\r
// Align buffer on section boundary\r
//\r
ImageContext.ImageAddress += ImageContext.SectionAlignment - 1;\r
- ImageContext.ImageAddress &= ~((EFI_PHYSICAL_ADDRESS)(ImageContext.SectionAlignment - 1));\r
+ ImageContext.ImageAddress &= ~((EFI_PHYSICAL_ADDRESS)ImageContext.SectionAlignment - 1);\r
//\r
// Load the image to our new buffer\r
//\r
/** @file\r
This is the implementation to save ACPI S3 Context.\r
\r
-Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions\r
// We need calculate whole page size then allocate once, because S3 restore page table does not know each page in Nvs.\r
//\r
if (!Page1GSupport) {\r
- TotalPageTableSize = (UINTN)(1 + NumberOfPml4EntriesNeeded + NumberOfPml4EntriesNeeded * NumberOfPdpEntriesNeeded);\r
+ TotalPageTableSize = 1 + NumberOfPml4EntriesNeeded + NumberOfPml4EntriesNeeded * NumberOfPdpEntriesNeeded;\r
} else {\r
- TotalPageTableSize = (UINTN)(1 + NumberOfPml4EntriesNeeded);\r
+ TotalPageTableSize = 1 + NumberOfPml4EntriesNeeded;\r
}\r
\r
TotalPageTableSize += ExtraPageTablePages;\r
into memory.\r
\r
(C) Copyright 2014 Hewlett-Packard Development Company, L.P.<BR>\r
-Copyright (c) 2011 - 2016, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2011 - 2017, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
//\r
ASSERT (PrivateDataPtr->Signature == EFI_CAPSULE_PEIM_PRIVATE_DATA_SIGNATURE);\r
ASSERT ((UINTN)DestPtr >= (UINTN)CapsuleImageBase);\r
- PrivateDataPtr->CapsuleOffset[CapsuleIndex++] = (UINT64)((UINTN)DestPtr - (UINTN)CapsuleImageBase);\r
+ PrivateDataPtr->CapsuleOffset[CapsuleIndex++] = (UINTN)DestPtr - (UINTN)CapsuleImageBase;\r
}\r
\r
//\r
/** @file\r
Entry and initialization module for the browser.\r
\r
-Copyright (c) 2007 - 2016, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2007 - 2017, Intel Corporation. All rights reserved.<BR>\r
Copyright (c) 2014, Hewlett-Packard Development Company, L.P.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
//\r
// Need extra glyph info and '\0' info, so +2.\r
//\r
- *OutputString = AllocateZeroPool (((UINTN) (StrOffset + 2) * sizeof(CHAR16)));\r
+ *OutputString = AllocateZeroPool ((StrOffset + 2) * sizeof(CHAR16));\r
if (*OutputString == NULL) {\r
return 0;\r
}\r
gST->ConOut->SetAttribute (gST->ConOut, GetInfoTextColor ());\r
for (Index = 0; Index < HelpHeaderLine; Index++) {\r
ASSERT (HelpHeaderLine == 1);\r
- ASSERT (GetStringWidth (HelpHeaderString) / 2 < (UINTN) (gHelpBlockWidth - 1));\r
+ ASSERT (GetStringWidth (HelpHeaderString) / 2 < ((UINT32) gHelpBlockWidth - 1));\r
PrintStringAtWithWidth (\r
gStatementDimensions.RightColumn - gHelpBlockWidth,\r
Index + TopRow,\r
gST->ConOut->SetAttribute (gST->ConOut, GetInfoTextColor ());\r
for (Index = 0; Index < HelpBottomLine; Index++) {\r
ASSERT (HelpBottomLine == 1);\r
- ASSERT (GetStringWidth (HelpBottomString) / 2 < (UINTN) (gHelpBlockWidth - 1)); \r
+ ASSERT (GetStringWidth (HelpBottomString) / 2 < ((UINT32) gHelpBlockWidth - 1));\r
PrintStringAtWithWidth (\r
gStatementDimensions.RightColumn - gHelpBlockWidth,\r
BottomRow + Index - HelpBottomLine + 1,\r
/** @file\r
Contains code that implements the virtual machine.\r
\r
-Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
if (OPERAND1_INDIRECT (Operands)) {\r
VmWriteMemN (VmPtr, (UINTN) (VmPtr->Gpr[OPERAND1_REGNUM (Operands)] + Index16), DataN);\r
} else {\r
- VmPtr->Gpr[OPERAND1_REGNUM (Operands)] = (INT64) (UINT64) ((UINTN) DataN + Index16);\r
+ VmPtr->Gpr[OPERAND1_REGNUM (Operands)] = (INT64) (UINT64) (UINTN) (DataN + Index16);\r
}\r
\r
return EFI_SUCCESS;\r
if ((*VmPtr->Ip & DATAMANIP_M_64) != 0) {\r
return (UINT64) ((INT64) ((INT64) Op1 - (INT64) Op2));\r
} else {\r
- return (UINT64) ((INT64) ((INT32) Op1 - (INT32) Op2));\r
+ return (UINT64) ((INT64) ((INT32) ((INT32) Op1 - (INT32) Op2)));\r
}\r
}\r
\r
if ((*VmPtr->Ip & DATAMANIP_M_64) != 0) {\r
return MultS64x64 ((INT64)Op1, (INT64)Op2);\r
} else {\r
- return (UINT64) ((INT64) ((INT32) Op1 * (INT32) Op2));\r
+ return (UINT64) ((INT64) ((INT32) ((INT32) Op1 * (INT32) Op2)));\r
}\r
}\r
\r
if ((*VmPtr->Ip & DATAMANIP_M_64) != 0) {\r
return MultU64x64 (Op1, Op2);\r
} else {\r
- return (UINT64) ((UINT32) Op1 * (UINT32) Op2);\r
+ return (UINT64) ((UINT32) ((UINT32) Op1 * (UINT32) Op2));\r
}\r
}\r
\r
\r
Internal functions to operate Working Block Space.\r
\r
-Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials \r
are licensed and made available under the terms and conditions of the BSD License \r
which accompanies this distribution. The full text of the license may be found at \r
&gEdkiiWorkingBlockSignatureGuid,\r
sizeof (EFI_GUID)\r
);\r
- mWorkingBlockHeader.WriteQueueSize = (UINT64) (PcdGet32 (PcdFlashNvStorageFtwWorkingSize) - sizeof (EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER));\r
+ mWorkingBlockHeader.WriteQueueSize = PcdGet32 (PcdFlashNvStorageFtwWorkingSize) - sizeof (EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER);\r
\r
//\r
// Crc is calculated with all the fields except Crc and STATE, so leave them as FTW_ERASED_BYTE.\r
Implementation for EFI_HII_FONT_PROTOCOL.\r
\r
\r
-Copyright (c) 2007 - 2016, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2007 - 2017, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
// The glyph's upper left hand corner pixel is the most significant bit of the\r
// first bitmap byte.\r
//\r
- for (Ypos = 0; Ypos < Cell->Height && ((UINTN) (Ypos + YposOffset) < RowHeight); Ypos++) {\r
+ for (Ypos = 0; Ypos < Cell->Height && (((UINT32) Ypos + YposOffset) < RowHeight); Ypos++) {\r
OffsetY = BITMAP_LEN_1_BIT (Cell->Width, Ypos);\r
\r
//\r
//\r
for (Xpos = 0; Xpos < Cell->Width / 8; Xpos++) {\r
Data = *(GlyphBuffer + OffsetY + Xpos);\r
- for (Index = 0; Index < 8 && ((UINTN) (Xpos * 8 + Index + Cell->OffsetX) < RowWidth); Index++) {\r
+ for (Index = 0; Index < 8 && (((UINT32) Xpos * 8 + Index + Cell->OffsetX) < RowWidth); Index++) {\r
if ((Data & (1 << (8 - Index - 1))) != 0) {\r
BltBuffer[Ypos * ImageWidth + Xpos * 8 + Index] = Foreground;\r
} else {\r
// There are some padding bits in this byte. Ignore them.\r
//\r
Data = *(GlyphBuffer + OffsetY + Xpos);\r
- for (Index = 0; Index < Cell->Width % 8 && ((UINTN) (Xpos * 8 + Index + Cell->OffsetX) < RowWidth); Index++) {\r
+ for (Index = 0; Index < Cell->Width % 8 && (((UINT32) Xpos * 8 + Index + Cell->OffsetX) < RowWidth); Index++) {\r
if ((Data & (1 << (8 - Index - 1))) != 0) {\r
BltBuffer[Ypos * ImageWidth + Xpos * 8 + Index] = Foreground;\r
} else {\r
// If this character is the last character of a row, we need not\r
// draw its (AdvanceX - Width - OffsetX) for next character.\r
//\r
- LineWidth -= (UINTN) (Cell[Index].AdvanceX - Cell[Index].Width - Cell[Index].OffsetX);\r
+ LineWidth -= (Cell[Index].AdvanceX - Cell[Index].Width - Cell[Index].OffsetX);\r
\r
//\r
// Clip the right-most character if cannot fit when EFI_HII_OUT_FLAG_CLEAN_X is set.\r
//\r
// Don't draw the last char on this row. And, don't draw the second last char (AdvanceX - Width - OffsetX).\r
//\r
- LineWidth -= (UINTN) (Cell[Index].Width + Cell[Index].OffsetX);\r
- LineWidth -= (UINTN) (Cell[Index - 1].AdvanceX - Cell[Index - 1].Width - Cell[Index - 1].OffsetX);\r
+ LineWidth -= (Cell[Index].Width + Cell[Index].OffsetX);\r
+ LineWidth -= (Cell[Index - 1].AdvanceX - Cell[Index - 1].Width - Cell[Index - 1].OffsetX);\r
RowInfo[RowIndex].EndIndex = Index - 1;\r
RowInfo[RowIndex].LineWidth = LineWidth;\r
RowInfo[RowIndex].LineHeight = LineHeight;\r
if (Index1 == RowInfo[RowIndex].StartIndex) {\r
LineWidth = 0;\r
} else {\r
- LineWidth -= (UINTN) (Cell[Index1 - 1].AdvanceX - Cell[Index1 - 1].Width - Cell[Index1 - 1].OffsetX);\r
+ LineWidth -= (Cell[Index1 - 1].AdvanceX - Cell[Index1 - 1].Width - Cell[Index1 - 1].OffsetX);\r
}\r
RowInfo[RowIndex].LineWidth = LineWidth;\r
}\r
//\r
// Don't draw the last char on this row. And, don't draw the second last char (AdvanceX - Width - OffsetX).\r
//\r
- LineWidth -= (UINTN) (Cell[Index1].Width + Cell[Index1].OffsetX);\r
- LineWidth -= (UINTN) (Cell[Index1 - 1].AdvanceX - Cell[Index1 - 1].Width - Cell[Index1 - 1].OffsetX);\r
+ LineWidth -= (Cell[Index1].Width + Cell[Index1].OffsetX);\r
+ LineWidth -= (Cell[Index1 - 1].AdvanceX - Cell[Index1 - 1].Width - Cell[Index1 - 1].OffsetX);\r
RowInfo[RowIndex].EndIndex = Index1 - 1;\r
RowInfo[RowIndex].LineWidth = LineWidth;\r
} else {\r
/** @file\r
Interface routines for PxeBc.\r
\r
-Copyright (c) 2007 - 2016, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2007 - 2017, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
//\r
// Configure block size for TFTP as a default value to handle all link layers.\r
// \r
- Private->BlockSize = (UINTN) (MIN (Private->Ip4MaxPacketSize, PXEBC_DEFAULT_PACKET_SIZE) - \r
- PXEBC_DEFAULT_UDP_OVERHEAD_SIZE - PXEBC_DEFAULT_TFTP_OVERHEAD_SIZE);\r
+ Private->BlockSize = MIN (Private->Ip4MaxPacketSize, PXEBC_DEFAULT_PACKET_SIZE) -\r
+ PXEBC_DEFAULT_UDP_OVERHEAD_SIZE - PXEBC_DEFAULT_TFTP_OVERHEAD_SIZE;\r
//\r
// If PcdTftpBlockSize is set to non-zero, override the default value.\r
//\r
Help functions used by PCD DXE driver.\r
\r
Copyright (c) 2014, Hewlett-Packard Development Company, L.P.<BR>\r
-Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
(C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
switch (LocalTokenNumber & PCD_TYPE_ALL_SET) {\r
case PCD_TYPE_VPD:\r
VpdHead = (VPD_HEAD *) ((UINT8 *) PcdDb + Offset);\r
- RetPtr = (VOID *) (UINTN) (PcdGet32 (PcdVpdBaseAddress) + VpdHead->Offset);\r
+ RetPtr = (VOID *) ((UINTN) PcdGet32 (PcdVpdBaseAddress) + VpdHead->Offset);\r
\r
break;\r
\r
The driver internal functions are implmented here.\r
They build Pei PCD database, and provide access service to PCD database.\r
\r
-Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
{\r
VPD_HEAD *VpdHead;\r
VpdHead = (VPD_HEAD *) ((UINT8 *)PeiPcdDb + Offset);\r
- return (VOID *) (UINTN) (PcdGet32 (PcdVpdBaseAddress) + VpdHead->Offset);\r
+ return (VOID *) ((UINTN) PcdGet32 (PcdVpdBaseAddress) + VpdHead->Offset);\r
}\r
\r
case PCD_TYPE_HII|PCD_TYPE_STRING:\r
This code produces the Smbios protocol. It also responsible for constructing \r
SMBIOS table into system table.\r
\r
-Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials \r
are licensed and made available under the terms and conditions of the BSD License \r
which accompanies this distribution. The full text of the license may be found at \r
EntryPointStructure->MaxStructureSize = (UINT16) sizeof (EndStructure);\r
}\r
\r
- if ((UINTN) EFI_SIZE_TO_PAGES (EntryPointStructure->TableLength) > mPreAllocatedPages) {\r
+ if (EFI_SIZE_TO_PAGES ((UINT32) EntryPointStructure->TableLength) > mPreAllocatedPages) {\r
//\r
// If new SMBIOS table size exceeds the previous allocated page, \r
// it is time to re-allocate memory (below 4GB).\r
EndStructure.Tailing[1] = 0;\r
Smbios30EntryPointStructure->TableMaximumSize = (UINT32) (Smbios30EntryPointStructure->TableMaximumSize + sizeof (EndStructure));\r
\r
- if ((UINTN) EFI_SIZE_TO_PAGES (Smbios30EntryPointStructure->TableMaximumSize) > mPre64BitAllocatedPages) {\r
+ if (EFI_SIZE_TO_PAGES (Smbios30EntryPointStructure->TableMaximumSize) > mPre64BitAllocatedPages) {\r
//\r
// If new SMBIOS table size exceeds the previous allocated page, \r
// it is time to re-allocate memory at anywhere.\r
return EFI_VOLUME_CORRUPTED;\r
}\r
\r
- VariableStoreBase = (EFI_PHYSICAL_ADDRESS) ((UINTN) FvHeader + FvHeader->HeaderLength);\r
- VariableStoreLength = (UINT64) (NvStorageSize - FvHeader->HeaderLength);\r
+ VariableStoreBase = (UINTN) FvHeader + FvHeader->HeaderLength;\r
+ VariableStoreLength = NvStorageSize - FvHeader->HeaderLength;\r
\r
mNvFvHeaderCache = FvHeader;\r
mVariableModuleGlobal->VariableGlobal.NonVolatileVariableBase = VariableStoreBase;\r
GuidHob = GetFirstGuidHob (VariableGuid);\r
if (GuidHob != NULL) {\r
VariableStoreHeader = GET_GUID_HOB_DATA (GuidHob);\r
- VariableStoreLength = (UINT64) (GuidHob->Header.HobLength - sizeof (EFI_HOB_GUID_TYPE));\r
+ VariableStoreLength = GuidHob->Header.HobLength - sizeof (EFI_HOB_GUID_TYPE);\r
if (GetVariableStoreStatus (VariableStoreHeader) == EfiValid) {\r
mVariableModuleGlobal->VariableGlobal.HobVariableBase = (EFI_PHYSICAL_ADDRESS) (UINTN) AllocateRuntimeCopyPool ((UINTN) VariableStoreLength, (VOID *) VariableStoreHeader);\r
if (mVariableModuleGlobal->VariableGlobal.HobVariableBase == 0) {\r