b _SetPrimaryStackInitGlobals ; \\r
_SetPrimaryStackEnd:\r
\r
+// Initialize the Global Variable with '0'\r
+#define InitializePrimaryStack(GlobalSize, Tmp1) \\r
+ and Tmp1, GlobalSize, #7 ; \\r
+ rsbne Tmp1, Tmp1, #8 ; \\r
+ add GlobalSize, GlobalSize, Tmp1 ; \\r
+ ; \\r
+ mov Tmp1, sp ; \\r
+ sub sp, GlobalSize ; \\r
+ mov GlobalSize, #0x0 ; \\r
+_InitializePrimaryStackLoop: ; \\r
+ cmp Tmp1, sp ; \\r
+ bls _InitializePrimaryStackEnd ; \\r
+ str GlobalSize, [Tmp1], #-4 ; \\r
+ b _InitializePrimaryStackLoop ; \\r
+_InitializePrimaryStackEnd:\r
\r
#elif defined (__GNUC__)\r
\r
b _SetPrimaryStackInitGlobals ; \\r
_SetPrimaryStackEnd:\r
\r
+// Initialize the Global Variable with '0'\r
+#define InitializePrimaryStack(GlobalSize, Tmp1) \\r
+ and Tmp1, GlobalSize, #7 ; \\r
+ rsbne Tmp1, Tmp1, #8 ; \\r
+ add GlobalSize, GlobalSize, Tmp1 ; \\r
+ ; \\r
+ mov Tmp1, sp ; \\r
+ sub sp, GlobalSize ; \\r
+ mov GlobalSize, #0x0 ; \\r
+_InitializePrimaryStackLoop: ; \\r
+ cmp Tmp1, sp ; \\r
+ bls _InitializePrimaryStackEnd ; \\r
+ str GlobalSize, [Tmp1], #-4 ; \\r
+ b _InitializePrimaryStackLoop ; \\r
+_InitializePrimaryStackEnd:\r
+\r
#else\r
\r
//\r
\r
#define SetPrimaryStack(StackTop,GlobalSize,Tmp) SetPrimaryStack StackTop, GlobalSize, Tmp\r
\r
+// Initialize the Global Variable with '0'\r
+#define InitializePrimaryStack(GlobalSize, Tmp1) InitializePrimaryStack GlobalSize, Tmp1\r
+\r
#endif\r
\r
#endif\r
beq _SetPrimaryStackEnd\r
str $GlobalSize, [$Tmp], #4\r
b _SetPrimaryStackInitGlobals\r
-\r
_SetPrimaryStackEnd\r
MEND\r
\r
+ MACRO\r
+ InitializePrimaryStack $GlobalSize, $Tmp1\r
+ and $Tmp1, $GlobalSize, #7\r
+ rsbne $Tmp1, $Tmp1, #8\r
+ add $GlobalSize, $GlobalSize, $Tmp1\r
+\r
+ mov $Tmp1, sp\r
+ sub sp, $GlobalSize\r
+ ; Set all the global variables to 0\r
+ mov $GlobalSize, #0x0\r
+_InitializePrimaryStackLoop\r
+ cmp $Tmp1, sp\r
+ bls _InitializePrimaryStackEnd\r
+ str $GlobalSize, [$Tmp1], #-4\r
+ b _InitializePrimaryStackLoop\r
+_InitializePrimaryStackEnd\r
+ MEND\r
+\r
END\r
ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf\r
DmaLib|ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf\r
ArmGicLib|ArmPkg/Drivers/PL390Gic/PL390GicLib.inf\r
+ ArmPlatformStackLib|ArmPlatformPkg/Library/ArmPlatformStackLib/ArmPlatformStackLib.inf\r
\r
# Versatile Express Specific Libraries\r
ArmPlatformSysConfigLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfigLib.inf\r
--- /dev/null
+//\r
+// Copyright (c) 2012, ARM Limited. All rights reserved.\r
+//\r
+// This program and the accompanying materials\r
+// are licensed and made available under the terms and conditions of the BSD License\r
+// which accompanies this distribution. The full text of the license may be found at\r
+// http://opensource.org/licenses/bsd-license.php\r
+//\r
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+//\r
+//\r
+\r
+#include <AsmMacroIoLib.h>\r
+#include <Base.h>\r
+#include <AutoGen.h>\r
+\r
+.text\r
+.align 3\r
+\r
+GCC_ASM_EXPORT(ArmPlatformStackSet)\r
+GCC_ASM_EXPORT(ArmPlatformStackSetPrimary)\r
+GCC_ASM_EXPORT(ArmPlatformStackSetSecondary)\r
+\r
+GCC_ASM_IMPORT(ArmPlatformGetCorePosition)\r
+\r
+GCC_ASM_IMPORT(gPcd_FixedAtBuild_PcdCoreCount)\r
+GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)\r
+\r
+//VOID\r
+//ArmPlatformStackSet (\r
+// IN UINTN StackBase,\r
+// IN UINTN MpId,\r
+// IN UINTN PrimaryStackSize,\r
+// IN UINTN SecondaryStackSize\r
+// );\r
+ASM_PFX(ArmPlatformStackSet):\r
+ // Identify Stack\r
+ // Mask for ClusterId|CoreId\r
+ LoadConstantToReg (0xFFFF, r4)\r
+ and r1, r1, r4\r
+ // Is it the Primary Core ?\r
+ LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r4)\r
+ ldr r4, [r4]\r
+ cmp r1, r4\r
+ beq ASM_PFX(ArmPlatformStackSetPrimary)\r
+ bne ASM_PFX(ArmPlatformStackSetSecondary)\r
+\r
+//VOID\r
+//ArmPlatformStackSetPrimary (\r
+// IN UINTN StackBase,\r
+// IN UINTN MpId,\r
+// IN UINTN PrimaryStackSize,\r
+// IN UINTN SecondaryStackSize\r
+// );\r
+ASM_PFX(ArmPlatformStackSetPrimary):\r
+ mov r4, lr\r
+\r
+ // Add stack of primary stack to StackBase\r
+ add r0, r0, r2\r
+\r
+ // Compute SecondaryCoresCount * SecondaryCoreStackSize\r
+ LoadConstantToReg (_gPcd_FixedAtBuild_PcdCoreCount, r1)\r
+ ldr r1, [r1]\r
+ sub r1, #1\r
+ mul r3, r3, r1\r
+\r
+ // Set Primary Stack ((StackBase + PrimaryStackSize) + (SecondaryCoresCount * SecondaryCoreStackSize))\r
+ add sp, r0, r3\r
+\r
+ bx r4\r
+\r
+//VOID\r
+//ArmPlatformStackSetSecondary (\r
+// IN UINTN StackBase,\r
+// IN UINTN MpId,\r
+// IN UINTN PrimaryStackSize,\r
+// IN UINTN SecondaryStackSize\r
+// );\r
+ASM_PFX(ArmPlatformStackSetSecondary):\r
+ mov r4, lr\r
+ mov sp, r0\r
+\r
+ // Get Core Position\r
+ mov r0, r1\r
+ bl ASM_PFX(ArmPlatformGetCorePosition)\r
+ mov r5, r0\r
+\r
+ // Get Primary Core Position\r
+ LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)\r
+ ldr r0, [r0]\r
+ bl ASM_PFX(ArmPlatformGetCorePosition)\r
+\r
+ // Get Secondary Core Position. We should get consecutive secondary stack number from 1...(CoreCount-1)\r
+ cmp r5, r0\r
+ subhi r5, r5, #1\r
+ add r5, r5, #1\r
+\r
+ // Compute top of the secondary stack\r
+ mul r3, r3, r5\r
+\r
+ // Set stack\r
+ add sp, sp, r3\r
+\r
+ bx r4\r
+\r
--- /dev/null
+//\r
+// Copyright (c) 2012, ARM Limited. All rights reserved.\r
+//\r
+// This program and the accompanying materials\r
+// are licensed and made available under the terms and conditions of the BSD License\r
+// which accompanies this distribution. The full text of the license may be found at\r
+// http://opensource.org/licenses/bsd-license.php\r
+//\r
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+//\r
+//\r
+\r
+#include <AsmMacroIoLib.h>\r
+#include <Base.h>\r
+#include <AutoGen.h>\r
+\r
+ INCLUDE AsmMacroIoLib.inc\r
+\r
+ EXPORT ArmPlatformStackSet\r
+ EXPORT ArmPlatformStackSetPrimary\r
+ EXPORT ArmPlatformStackSetSecondary\r
+\r
+ IMPORT ArmPlatformGetCorePosition\r
+\r
+ IMPORT _gPcd_FixedAtBuild_PcdCoreCount\r
+ IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCore\r
+\r
+ PRESERVE8\r
+ AREA ArmPlatformStackLib, CODE, READONLY\r
+\r
+//VOID\r
+//ArmPlatformStackSet (\r
+// IN UINTN StackBase,\r
+// IN UINTN MpId,\r
+// IN UINTN PrimaryStackSize,\r
+// IN UINTN SecondaryStackSize\r
+// );\r
+ArmPlatformStackSet FUNCTION\r
+ // Identify Stack\r
+ // Mask for ClusterId|CoreId\r
+ LoadConstantToReg (0xFFFF, r4)\r
+ and r1, r1, r4\r
+ // Is it the Primary Core ?\r
+ LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r4)\r
+ ldr r4, [r4]\r
+ cmp r1, r4\r
+ beq ArmPlatformStackSetPrimary\r
+ bne ArmPlatformStackSetSecondary\r
+ ENDFUNC\r
+\r
+//VOID\r
+//ArmPlatformStackSetPrimary (\r
+// IN UINTN StackBase,\r
+// IN UINTN MpId,\r
+// IN UINTN PrimaryStackSize,\r
+// IN UINTN SecondaryStackSize\r
+// );\r
+ArmPlatformStackSetPrimary FUNCTION\r
+ mov r4, lr\r
+\r
+ // Add stack of primary stack to StackBase\r
+ add r0, r0, r2\r
+\r
+ // Compute SecondaryCoresCount * SecondaryCoreStackSize\r
+ LoadConstantToReg (_gPcd_FixedAtBuild_PcdCoreCount, r1)\r
+ ldr r1, [r1]\r
+ sub r1, #1\r
+ mul r3, r3, r1\r
+\r
+ // Set Primary Stack ((StackBase + PrimaryStackSize) + (SecondaryCoresCount * SecondaryCoreStackSize))\r
+ add sp, r0, r3\r
+\r
+ bx r4\r
+ ENDFUNC\r
+\r
+//VOID\r
+//ArmPlatformStackSetSecondary (\r
+// IN UINTN StackBase,\r
+// IN UINTN MpId,\r
+// IN UINTN PrimaryStackSize,\r
+// IN UINTN SecondaryStackSize\r
+// );\r
+ArmPlatformStackSetSecondary FUNCTION\r
+ mov r4, lr\r
+ mov sp, r0\r
+\r
+ // Get Core Position\r
+ mov r0, r1\r
+ bl ArmPlatformGetCorePosition\r
+ mov r5, r0\r
+\r
+ // Get Primary Core Position\r
+ LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)\r
+ ldr r0, [r0]\r
+ bl ArmPlatformGetCorePosition\r
+\r
+ // Get Secondary Core Position. We should get consecutive secondary stack number from 1...(CoreCount-1)\r
+ cmp r5, r0\r
+ subhi r5, r5, #1\r
+ add r5, r5, #1\r
+\r
+ // Compute top of the secondary stack\r
+ mul r3, r3, r5\r
+\r
+ // Set stack\r
+ add sp, sp, r3\r
+\r
+ bx r4\r
+ ENDFUNC\r
+\r
+ END\r
--- /dev/null
+#/* @file\r
+#\r
+# Copyright (c) 2012, ARM Limited. All rights reserved.\r
+# \r
+# This program and the accompanying materials \r
+# are licensed and made available under the terms and conditions of the BSD License \r
+# which accompanies this distribution. The full text of the license may be found at \r
+# http://opensource.org/licenses/bsd-license.php \r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+#\r
+#*/\r
+\r
+[Defines]\r
+ INF_VERSION = 0x00010005\r
+ BASE_NAME = ArmPlatformStackLib\r
+ FILE_GUID = 5e2e44af-53c1-44c2-a801-9c149f3d6ba0\r
+ MODULE_TYPE = BASE\r
+ VERSION_STRING = 1.0\r
+ LIBRARY_CLASS = ArmPlatformStackLib\r
+\r
+[Packages]\r
+ MdePkg/MdePkg.dec\r
+ MdeModulePkg/MdeModulePkg.dec\r
+ ArmPkg/ArmPkg.dec\r
+ ArmPlatformPkg/ArmPlatformPkg.dec\r
+\r
+[Sources.common]\r
+ ArmPlatformStackLib.asm | RVCT\r
+ ArmPlatformStackLib.S | GCC\r
+\r
+[FixedPcd]\r
+ gArmPlatformTokenSpaceGuid.PcdCoreCount\r
+\r
+ gArmPlatformTokenSpaceGuid.PcdCoreCount\r
+\r
+ gArmTokenSpaceGuid.PcdArmPrimaryCoreMask\r
+ gArmTokenSpaceGuid.PcdArmPrimaryCore\r
\r
GCC_ASM_IMPORT(CEntryPoint)\r
GCC_ASM_IMPORT(ArmReadMpidr)\r
-GCC_ASM_IMPORT(ArmIsMpCore)\r
+GCC_ASM_IMPORT(ArmPlatformStackSet)\r
GCC_ASM_EXPORT(_ModuleEntryPoint)\r
\r
StartupAddr: .word CEntryPoint\r
// Get ID of this CPU in Multicore system\r
bl ASM_PFX(ArmReadMpidr)\r
LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)\r
- and r5, r0, r1\r
+ and r6, r0, r1\r
\r
_SetSVCMode:\r
// Enter SVC mode, Disable FIQ and IRQ\r
+ //TODO: remove hardcoded values\r
mov r1, #0x13|0x80|0x40\r
msr CPSR_c, r1\r
\r
// Because the 'push' instruction is equivalent to 'stmdb' (decrement before), we need to increment\r
// one to the top of the stack. We check if incrementing one does not overflow (case of DRAM at the\r
// top of the memory space)\r
- adds r6, r1, #1\r
+ adds r7, r1, #1\r
bcs _SetupOverflowStack\r
\r
_SetupAlignedStack:\r
- mov r1, r6\r
+ mov r1, r7\r
b _GetBaseUefiMemory\r
\r
_SetupOverflowStack:\r
// Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE\r
// aligned (4KB)\r
- LoadConstantToReg (EFI_PAGE_MASK, r6)\r
- and r6, r6, r1\r
- sub r1, r1, r6\r
+ LoadConstantToReg (EFI_PAGE_MASK, r7)\r
+ and r7, r7, r1\r
+ sub r1, r1, r7\r
\r
_GetBaseUefiMemory:\r
// Calculate the Base of the UEFI Memory\r
- sub r6, r1, r4\r
+ sub r7, r1, r4\r
\r
_GetStackBase:\r
- // Compute Base of Normal stacks for CPU Cores\r
- // Is it MpCore system\r
- bl ASM_PFX(ArmIsMpCore)\r
- cmp r0, #0\r
- // Case it is not an MP Core system. Just setup the primary core\r
- beq _SetupUnicoreStack\r
-\r
-_GetStackBaseMpCore:\r
// r1 = The top of the Mpcore Stacks\r
// Stack for the primary core = PrimaryCoreStack\r
LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r
- sub r7, r1, r2\r
-\r
- // Stack for the secondary core = Number of Clusters * (4 Cores per cluster) * SecondaryStackSize\r
- LoadConstantToReg (FixedPcdGet32(PcdClusterCount), r2)\r
- lsl r2, r2, #2\r
- LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r3)\r
- mul r2, r2, r3\r
- sub r7, r7, r2\r
-\r
- // The base of the secondary Stacks = Top of Primary stack\r
+ sub r8, r1, r2\r
+\r
+ // Stack for the secondary core = Number of Cores - 1\r
+ LoadConstantToReg (FixedPcdGet32(PcdCoreCount), r0)\r
+ sub r0, r0, #1\r
+ LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1)\r
+ mul r1, r1, r0\r
+ sub r8, r8, r1\r
+\r
+ // r8 = The base of the MpCore Stacks (primary stack & secondary stacks)\r
+ mov r0, r8\r
+ mov r1, r6\r
+ //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)\r
LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r
- add r1, r7, r2\r
-\r
- // r7 = The base of the MpCore Stacks (primary stack + cluster_count * 4 * secondary stacks)\r
- // r1 = The base of the secondary Stacks = Top of the Primary stack\r
+ LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r3)\r
+ bl ASM_PFX(ArmPlatformStackSet)\r
\r
// Is it the Primary Core ?\r
LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r4)\r
- cmp r5, r4\r
- beq _SetupPrimaryCoreStack\r
-\r
-_SetupSecondaryCoreStack:\r
- // r1 = The base of the secondary Stacks\r
-\r
- // Get the position of the cores (ClusterId * 4) + CoreId\r
- GetCorePositionFromMpId(r0, r5, r4)\r
- // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack\r
- add r0, r0, #1\r
- // Get the offset for the Secondary Stack\r
- mul r0, r0, r3\r
- add sp, r1, r0\r
-\r
+ cmp r6, r4\r
bne _PrepareArguments\r
\r
-_SetupPrimaryCoreStack:\r
- // r1 = Top of the primary stack\r
- LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r2)\r
- b _PreparePrimaryStack\r
-\r
-_SetupUnicoreStack:\r
- // The top of the Unicore Stack is in r1\r
- LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r2)\r
- LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r3)\r
-\r
- // Calculate the bottom of the primary stack (StackBase)\r
- sub r7, r1, r3\r
-\r
-_PreparePrimaryStack:\r
- // The reserved space for global variable must be 8-bytes aligned for pushing\r
- // 64-bit variable on the stack\r
- SetPrimaryStack (r1, r2, r3)\r
+_ReserveGlobalVariable:\r
+ LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r0)\r
+ // InitializePrimaryStack($GlobalVariableSize, $Tmp1)\r
+ InitializePrimaryStack(r0, r1)\r
\r
_PrepareArguments:\r
- mov r0, r5\r
- mov r1, r6\r
- mov r2, r7\r
+ mov r0, r6\r
+ mov r1, r7\r
+ mov r2, r8\r
mov r3, sp\r
\r
// Move sec startup address into a data register\r
// Get ID of this CPU in Multicore system\r
bl ArmReadMpidr\r
LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)\r
- and r5, r0, r1\r
+ and r6, r0, r1\r
\r
_SetSVCMode\r
// Enter SVC mode, Disable FIQ and IRQ\r
+ //TODO: remove hardcoded values\r
mov r1, #0x13 :OR: 0x80 :OR: 0x40\r
msr CPSR_c, r1\r
\r
// Because the 'push' instruction is equivalent to 'stmdb' (decrement before), we need to increment\r
// one to the top of the stack. We check if incrementing one does not overflow (case of DRAM at the\r
// top of the memory space)\r
- adds r6, r1, #1\r
+ adds r7, r1, #1\r
bcs _SetupOverflowStack\r
\r
_SetupAlignedStack\r
- mov r1, r6\r
+ mov r1, r7\r
b _GetBaseUefiMemory\r
\r
_SetupOverflowStack\r
// Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE\r
// aligned (4KB)\r
- LoadConstantToReg (EFI_PAGE_MASK, r6)\r
- and r6, r6, r1\r
- sub r1, r1, r6\r
+ LoadConstantToReg (EFI_PAGE_MASK, r7)\r
+ and r7, r7, r1\r
+ sub r1, r1, r7\r
\r
_GetBaseUefiMemory\r
// Calculate the Base of the UEFI Memory\r
- sub r6, r1, r4\r
+ sub r7, r1, r4\r
\r
_GetStackBase\r
- // Compute Base of Normal stacks for CPU Cores\r
- // Is it MpCore system\r
- bl ArmIsMpCore\r
- cmp r0, #0\r
- // Case it is not an MP Core system. Just setup the primary core\r
- beq _SetupUnicoreStack\r
-\r
-_GetStackBaseMpCore\r
// r1 = The top of the Mpcore Stacks\r
// Stack for the primary core = PrimaryCoreStack\r
LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r
//ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)\r
LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r
LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r3)\r
- mul r2, r2, r3\r
- sub r7, r7, r2\r
-\r
- // The base of the secondary Stacks = Top of Primary stack\r
- LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r
- add r1, r7, r2\r
-\r
- // r7 = The base of the MpCore Stacks (primary stack + cluster_count * 4 * secondary stacks)\r
- // r1 = The base of the secondary Stacks = Top of the Primary stack\r
+ bl ArmPlatformStackSet\r
\r
// Is it the Primary Core ?\r
LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r4)\r
- cmp r5, r4\r
- beq _SetupPrimaryCoreStack\r
-\r
-_SetupSecondaryCoreStack\r
- // r1 = The base of the secondary Stacks\r
-\r
- // Get the position of the cores (ClusterId * 4) + CoreId\r
- GetCorePositionFromMpId(r0, r5, r4)\r
- // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack\r
- add r0, r0, #1\r
- // Get the offset for the Secondary Stack\r
- mul r0, r0, r3\r
- add sp, r1, r0\r
-\r
+ cmp r6, r4\r
bne _PrepareArguments\r
\r
-_SetupPrimaryCoreStack\r
- // r1 = Top of the primary stack\r
- LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r2)\r
- b _PreparePrimaryStack\r
-\r
-_SetupUnicoreStack\r
- // The top of the Unicore Stack is in r1\r
- LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r2)\r
- LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r3)\r
-\r
- // Calculate the bottom of the primary stack (StackBase)\r
- sub r7, r1, r3\r
-\r
-_PreparePrimaryStack\r
- // The reserved space for global variable must be 8-bytes aligned for pushing\r
- // 64-bit variable on the stack\r
- SetPrimaryStack (r1, r2, r3)\r
+_ReserveGlobalVariable\r
+ LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r0)\r
+ // InitializePrimaryStack($GlobalVariableSize, $Tmp1)\r
+ InitializePrimaryStack r0, r1\r
\r
_PrepareArguments\r
- mov r0, r5\r
- mov r1, r6\r
- mov r2, r7\r
+ mov r0, r6\r
+ mov r1, r7\r
+ mov r2, r8\r
mov r3, sp\r
\r
// Move sec startup address into a data register\r
DebugAgentLib\r
PrePiLib\r
ArmPlatformLib\r
+ ArmPlatformStackLib\r
MemoryAllocationLib\r
HobLib\r
PrePiHobListPointerLib\r
gArmTokenSpaceGuid.PcdFvBaseAddress\r
gArmTokenSpaceGuid.PcdFvSize\r
\r
- gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase\r
gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize\r
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize\r
\r
DebugAgentLib\r
PrePiLib\r
ArmPlatformLib\r
+ ArmPlatformStackLib\r
MemoryAllocationLib\r
HobLib\r
PrePiHobListPointerLib\r
ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf\r
ArmPlatformLib|BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardLib.inf\r
ArmCpuLib|ArmPkg/Drivers/ArmCpuLib/ArmCortexA8Lib/ArmCortexA8Lib.inf\r
+ ArmPlatformStackLib|ArmPlatformPkg/Library/ArmPlatformStackLib/ArmPlatformStackLib.inf\r
\r
HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf\r
UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf\r
projects / mirror_edk2.git / commitdiff