--- /dev/null
+/** @file\r
+ MSR Definitions.\r
+\r
+ Provides defines for Machine Specific Registers(MSR) indexes. Data structures\r
+ are provided for MSRs that contain one or more bit fields. If the MSR value\r
+ returned is a single 32-bit or 64-bit value, then a data structure is not\r
+ provided for that MSR.\r
+\r
+ Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>\r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+ @par Specification Reference:\r
+ Intel(R) 64 and IA-32 Architectures Software Developer's Manual, Volume 3,\r
+ December 2015, Chapter 35 Model-Specific-Registers (MSR), Chapter 35.\r
+\r
+**/\r
+\r
+#ifndef __MSR_H__\r
+#define __MSR_H__\r
+\r
+#include <Register/ArchitecturalMsr.h>\r
+#include <Register/Msr/Core2Msr.h>\r
+#include <Register/Msr/AtomMsr.h>\r
+#include <Register/Msr/SilvermontMsr.h>\r
+#include <Register/Msr/NehalemMsr.h>\r
+#include <Register/Msr/Xeon5600Msr.h>\r
+#include <Register/Msr/XeonE7Msr.h>\r
+#include <Register/Msr/SandyBridgeMsr.h>\r
+#include <Register/Msr/IvyBridgeMsr.h>\r
+#include <Register/Msr/HaswellMsr.h>\r
+#include <Register/Msr/HaswellEMsr.h>\r
+#include <Register/Msr/BroadwellMsr.h>\r
+#include <Register/Msr/XeonDMsr.h>\r
+#include <Register/Msr/SkylakeMsr.h>\r
+#include <Register/Msr/XeonPhiMsr.h>\r
+#include <Register/Msr/Pentium4Msr.h>\r
+#include <Register/Msr/CoreMsr.h>\r
+#include <Register/Msr/PentiumMMsr.h>\r
+#include <Register/Msr/P6Msr.h>\r
+#include <Register/Msr/PentiumMsr.h>\r
+\r
+#endif\r