SecurityPkg: Reallocate TPM Active PCRs based on platform support

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3515

In V4: Fixed patch format and uncrustify cleanup

In V3: Cleaned up comments, debug prints and updated patch to use the
new debug ENUM definitions.

- Replaced EFI_D_INFO with DEBUG_INFO.
- Replaced EFI_D_VERBOSE with DEBUG_VERBOSE.

In V2: Add case to RegisterHashInterfaceLib logic

RegisterHashInterfaceLib needs to correctly handle registering the HashLib
instance supported algorithm bitmap when PcdTpm2HashMask is set to zero.

The current implementation of SyncPcrAllocationsAndPcrMask() triggers
PCR bank reallocation only based on the intersection between
TpmActivePcrBanks and PcdTpm2HashMask.

When the software HashLibBaseCryptoRouter solution is used, no PCR bank
reallocation is occurring based on the supported hashing algorithms
registered by the HashLib instances.

Need to have an additional check for the intersection between the
TpmActivePcrBanks and the PcdTcg2HashAlgorithmBitmap populated by the
HashLib instances present on the platform's BIOS.

Signed-off-by: Rodrigo Gonzalez del Cueto <rodrigo.gonzalez.del.cueto@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>

diff --git a/SecurityPkg/Library/HashLibBaseCryptoRouter/HashLibBaseCryptoRouterDxe.c b/SecurityPkg/Library/HashLibBaseCryptoRouter/HashLibBaseCryptoRouterDxe.c
index 59639d053858d85fd72852888c556e764f09dd29..ee8fe6e06e40dab80963d5c11708c95106c7c10b 100644 (file)
--- a/SecurityPkg/Library/HashLibBaseCryptoRouter/HashLibBaseCryptoRouterDxe.c
+++ b/SecurityPkg/Library/HashLibBaseCryptoRouter/HashLibBaseCryptoRouterDxe.c
@@ -3,7 +3,7 @@
   hash handler registered, such as SHA1, SHA256.\r
   Platform can use PcdTpm2HashMask to mask some hash engines.\r
 \r
-Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved. <BR>\r
+Copyright (c) 2013 - 2021, Intel Corporation. All rights reserved. <BR>\r
 SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r
@@ -234,13 +234,18 @@ RegisterHashInterfaceLib (
 {\r
   UINTN       Index;\r
   UINT32      HashMask;\r
+  UINT32      Tpm2HashMask;\r
   EFI_STATUS  Status;\r
 \r
   //\r
   // Check allow\r
   //\r
-  HashMask = Tpm2GetHashMaskFromAlgo (&HashInterface->HashGuid);\r
-  if ((HashMask & PcdGet32 (PcdTpm2HashMask)) == 0) {\r
+  HashMask     = Tpm2GetHashMaskFromAlgo (&HashInterface->HashGuid);\r
+  Tpm2HashMask = PcdGet32 (PcdTpm2HashMask);\r
+\r
+  if ((Tpm2HashMask != 0) &&\r
+      ((HashMask & Tpm2HashMask) == 0))\r
+  {\r
     return EFI_UNSUPPORTED;\r
   }\r
 \r

diff --git a/SecurityPkg/Library/HashLibBaseCryptoRouter/HashLibBaseCryptoRouterPei.c b/SecurityPkg/Library/HashLibBaseCryptoRouter/HashLibBaseCryptoRouterPei.c
index e21103d3711bd8c691962ad8d86a074c88dae9bd..eeb424b6c3f2a487a26d9834c824a9f91549935b 100644 (file)
--- a/SecurityPkg/Library/HashLibBaseCryptoRouter/HashLibBaseCryptoRouterPei.c
+++ b/SecurityPkg/Library/HashLibBaseCryptoRouter/HashLibBaseCryptoRouterPei.c
@@ -3,7 +3,7 @@
   hash handler registered, such as SHA1, SHA256.\r
   Platform can use PcdTpm2HashMask to mask some hash engines.\r
 \r
-Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved. <BR>\r
+Copyright (c) 2013 - 2021, Intel Corporation. All rights reserved. <BR>\r
 SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r
@@ -330,13 +330,18 @@ RegisterHashInterfaceLib (
   UINTN               Index;\r
   HASH_INTERFACE_HOB  *HashInterfaceHob;\r
   UINT32              HashMask;\r
+  UINT32              Tpm2HashMask;\r
   EFI_STATUS          Status;\r
 \r
   //\r
   // Check allow\r
   //\r
-  HashMask = Tpm2GetHashMaskFromAlgo (&HashInterface->HashGuid);\r
-  if ((HashMask & PcdGet32 (PcdTpm2HashMask)) == 0) {\r
+  HashMask     = Tpm2GetHashMaskFromAlgo (&HashInterface->HashGuid);\r
+  Tpm2HashMask = PcdGet32 (PcdTpm2HashMask);\r
+\r
+  if ((Tpm2HashMask != 0) &&\r
+      ((HashMask & Tpm2HashMask) == 0))\r
+  {\r
     return EFI_UNSUPPORTED;\r
   }\r
 \r

diff --git a/SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.c b/SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.c
index 622989aff34f1798adddb7b84eed9bd2edb9ec69..26bb5282a58ba4ff7934028d686ee4e4e995868c 100644 (file)
--- a/SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.c
+++ b/SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.c
@@ -252,7 +252,7 @@ EndofPeiSignalNotifyCallBack (
 \r
 /**\r
   Make sure that the current PCR allocations, the TPM supported PCRs,\r
-  and the PcdTpm2HashMask are all in agreement.\r
+  PcdTcg2HashAlgorithmBitmap and the PcdTpm2HashMask are all in agreement.\r
 **/\r
 VOID\r
 SyncPcrAllocationsAndPcrMask (\r
@@ -261,6 +261,7 @@ SyncPcrAllocationsAndPcrMask (
 {\r
   EFI_STATUS                       Status;\r
   EFI_TCG2_EVENT_ALGORITHM_BITMAP  TpmHashAlgorithmBitmap;\r
+  EFI_TCG2_EVENT_ALGORITHM_BITMAP  BiosHashAlgorithmBitmap;\r
   UINT32                           TpmActivePcrBanks;\r
   UINT32                           NewTpmActivePcrBanks;\r
   UINT32                           Tpm2PcrMask;\r
@@ -274,33 +275,50 @@ SyncPcrAllocationsAndPcrMask (
   Status = Tpm2GetCapabilitySupportedAndActivePcrs (&TpmHashAlgorithmBitmap, &TpmActivePcrBanks);\r
   ASSERT_EFI_ERROR (Status);\r
 \r
+  DEBUG ((DEBUG_INFO, "Tpm2GetCapabilitySupportedAndActivePcrs - TpmHashAlgorithmBitmap: 0x%08x\n", TpmHashAlgorithmBitmap));\r
+  DEBUG ((DEBUG_INFO, "Tpm2GetCapabilitySupportedAndActivePcrs - TpmActivePcrBanks 0x%08x\n", TpmActivePcrBanks));\r
+\r
   Tpm2PcrMask = PcdGet32 (PcdTpm2HashMask);\r
   if (Tpm2PcrMask == 0) {\r
     //\r
-    // if PcdTPm2HashMask is zero, use ActivePcr setting\r
+    // If PcdTpm2HashMask is zero, use ActivePcr setting.\r
+    // Only when PcdTpm2HashMask is initialized to 0, will it be updated to current Active Pcrs.\r
     //\r
     PcdSet32S (PcdTpm2HashMask, TpmActivePcrBanks);\r
     Tpm2PcrMask = TpmActivePcrBanks;\r
   }\r
 \r
-  //\r
-  // Find the intersection of Pcd support and TPM support.\r
-  // If banks are missing from the TPM support that are in the PCD, update the PCD.\r
-  // If banks are missing from the PCD that are active in the TPM, reallocate the banks and reboot.\r
-  //\r
+  DEBUG ((DEBUG_INFO, "Tpm2PcrMask 0x%08x\n", Tpm2PcrMask));\r
 \r
   //\r
-  // If there are active PCR banks that are not supported by the Platform mask,\r
-  // update the TPM allocations and reboot the machine.\r
+  // The Active PCRs in the TPM need to be a strict subset of the hashing algorithms supported by BIOS.\r
   //\r
-  if ((TpmActivePcrBanks & Tpm2PcrMask) != TpmActivePcrBanks) {\r
-    NewTpmActivePcrBanks = TpmActivePcrBanks & Tpm2PcrMask;\r
+  // * Find the intersection of Pcd support and TPM active PCRs. If banks are missing from the TPM support\r
+  // that are in the PCD, update the PCD.\r
+  // * Find intersection of TPM Active PCRs and BIOS supported algorithms. If there are active PCR banks\r
+  // that are not supported by the platform, update the TPM allocations and reboot.\r
+  // Note: When the HashLibBaseCryptoRouter solution is used, the hash algorithm support from BIOS is reported\r
+  //       by Tcg2HashAlgorithmBitmap, which is populated by HashLib instances at runtime.\r
+  BiosHashAlgorithmBitmap = PcdGet32 (PcdTcg2HashAlgorithmBitmap);\r
+  DEBUG ((DEBUG_INFO, "Tcg2HashAlgorithmBitmap: 0x%08x\n", BiosHashAlgorithmBitmap));\r
+\r
+  if (((TpmActivePcrBanks & Tpm2PcrMask) != TpmActivePcrBanks) ||\r
+      ((TpmActivePcrBanks & BiosHashAlgorithmBitmap) != TpmActivePcrBanks))\r
+  {\r
+    DEBUG ((DEBUG_INFO, "TpmActivePcrBanks & Tpm2PcrMask = 0x%08x\n", (TpmActivePcrBanks & Tpm2PcrMask)));\r
+    DEBUG ((DEBUG_INFO, "TpmActivePcrBanks & BiosHashAlgorithmBitmap = 0x%08x\n", (TpmActivePcrBanks & BiosHashAlgorithmBitmap)));\r
+    NewTpmActivePcrBanks  = TpmActivePcrBanks;\r
+    NewTpmActivePcrBanks &= Tpm2PcrMask;\r
+    NewTpmActivePcrBanks &= BiosHashAlgorithmBitmap;\r
+    DEBUG ((DEBUG_INFO, "NewTpmActivePcrBanks 0x%08x\n", NewTpmActivePcrBanks));\r
 \r
     DEBUG ((DEBUG_INFO, "%a - Reallocating PCR banks from 0x%X to 0x%X.\n", __FUNCTION__, TpmActivePcrBanks, NewTpmActivePcrBanks));\r
+\r
     if (NewTpmActivePcrBanks == 0) {\r
       DEBUG ((DEBUG_ERROR, "%a - No viable PCRs active! Please set a less restrictive value for PcdTpm2HashMask!\n", __FUNCTION__));\r
       ASSERT (FALSE);\r
     } else {\r
+      DEBUG ((DEBUG_ERROR, "Tpm2PcrAllocateBanks (TpmHashAlgorithmBitmap: 0x%08x, NewTpmActivePcrBanks: 0x%08x)\n", TpmHashAlgorithmBitmap, NewTpmActivePcrBanks));\r
       Status = Tpm2PcrAllocateBanks (NULL, (UINT32)TpmHashAlgorithmBitmap, NewTpmActivePcrBanks);\r
       if (EFI_ERROR (Status)) {\r
         //\r
@@ -331,6 +349,7 @@ SyncPcrAllocationsAndPcrMask (
     }\r
 \r
     Status = PcdSet32S (PcdTpm2HashMask, NewTpm2PcrMask);\r
+    DEBUG ((DEBUG_ERROR, "Set PcdTpm2Hash Mask to 0x%08x\n", NewTpm2PcrMask));\r
     ASSERT_EFI_ERROR (Status);\r
   }\r
 }\r

diff --git a/SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf b/SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf
index 06c26a2904b8020d716b438413ff01661085c63a..17ad1161265d3425b5c06030a858671dfdc85a7f 100644 (file)
--- a/SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf
+++ b/SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf
@@ -86,6 +86,7 @@
   ## SOMETIMES_CONSUMES\r
   ## SOMETIMES_PRODUCES\r
   gEfiSecurityPkgTokenSpaceGuid.PcdTpm2HashMask\r
+  gEfiSecurityPkgTokenSpaceGuid.PcdTcg2HashAlgorithmBitmap                  ## CONSUMES\r
 \r
 [Depex]\r
   gEfiPeiMasterBootModePpiGuid AND\r