#include EFI_PPI_DEFINITION (CpuIo)\r
#include EFI_PPI_DEFINITION (PciCfg)\r
#include EFI_PPI_DEFINITION (PciCfg2)\r
+#include EFI_PPI_DEFINITION (EcpPciCfg)\r
\r
//\r
// PEI Specification Revision information\r
#if (PI_SPECIFICATION_VERSION < 0x00010000)\r
\r
PEI_CPU_IO_PPI *CpuIo;\r
+#if defined (SUPPORT_DEPRECATED_PCI_CFG_PPI)\r
PEI_PCI_CFG_PPI *PciCfg;\r
+#else\r
+ ECP_PEI_PCI_CFG_PPI *PciCfg;\r
+#endif\r
#else\r
EFI_PEI_CPU_IO_PPI *CpuIo;\r
EFI_PEI_PCI_CFG2_PPI *PciCfg;\r
--- /dev/null
+/*++\r
+\r
+Copyright (c) 2004, Intel Corporation \r
+All rights reserved. This program and the accompanying materials \r
+are licensed and made available under the terms and conditions of the BSD License \r
+which accompanies this distribution. The full text of the license may be found at \r
+http://opensource.org/licenses/bsd-license.php \r
+ \r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+Module Name:\r
+\r
+ EcpPciCfg.c\r
+\r
+Abstract:\r
+\r
+ This PPI which is same with PciCfg PPI. But Modify API is removed.\r
+\r
+--*/\r
+\r
+#include "Tiano.h"\r
+#include "Pei.h"\r
+#include EFI_PPI_DEFINITION (EcpPciCfg)\r
+\r
+EFI_GUID gEcpPeiPciCfgPpiGuid = ECP_PEI_PCI_CFG_PPI_GUID;\r
+\r
+EFI_GUID_STRING(&gEcpPeiPciCfgPpiGuid, "Ecp PciCfg", "Ecp PciCfg PPI");\r
--- /dev/null
+/*++\r
+\r
+Copyright (c) 2008, Intel Corporation \r
+All rights reserved. This program and the accompanying materials \r
+are licensed and made available under the terms and conditions of the BSD License \r
+which accompanies this distribution. The full text of the license may be found at \r
+http://opensource.org/licenses/bsd-license.php \r
+ \r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+Module Name:\r
+\r
+ PciCfg.h\r
+\r
+Abstract:\r
+\r
+ This PPI which is same with PciCfg PPI. But Modify API is removed.\r
+\r
+--*/\r
+\r
+#ifndef _ECP_PEI_PCI_CFG_H_\r
+#define _ECP_PEI_PCI_CFG_H_\r
+#include EFI_PPI_DEFINITION (PciCfg)\r
+\r
+#define ECP_PEI_PCI_CFG_PPI_GUID \\r
+ {0xb0ee53d4, 0xa049, 0x4a79, { 0xb2, 0xff, 0x19, 0xd9, 0xfa, 0xef, 0xaa, 0x94 }}\r
+\r
+EFI_FORWARD_DECLARATION (ECP_PEI_PCI_CFG_PPI);\r
+\r
+\r
+typedef\r
+EFI_STATUS\r
+(EFIAPI *ECP_PEI_PCI_CFG_PPI_IO) (\r
+ IN EFI_PEI_SERVICES **PeiServices,\r
+ IN PEI_PCI_CFG_PPI *This,\r
+ IN PEI_PCI_CFG_PPI_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN OUT VOID *Buffer\r
+ );\r
+\r
+struct _ECP_PEI_PCI_CFG_PPI {\r
+ ECP_PEI_PCI_CFG_PPI_IO Read;\r
+ ECP_PEI_PCI_CFG_PPI_IO Write;\r
+};\r
+\r
+extern EFI_GUID gEcpPeiPciCfgPpiGuid;\r
+\r
+#endif\r
+\r
FirmwareVolume/FirmwareVolume.c\r
GuidedSectionExtraction/GuidedSectionExtraction.h\r
GuidedSectionExtraction/GuidedSectionExtraction.c\r
+ EcpPciCfg/EcpPciCfg.h\r
+ EcpPciCfg/EcpPciCfg.c\r
+ \r
--*/\r
;\r
\r
+\r
+\r
+EFI_STATUS\r
+EFIAPI \r
+PeiLibPciCfgModify (\r
+ IN EFI_PEI_SERVICES **PeiServices,\r
+ IN PEI_PCI_CFG_PPI_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN UINTN SetBits,\r
+ IN UINTN ClearBits\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ PCI read-modify-write operations.\r
+\r
+ PIWG's PI specification replaces Inte's EFI Specification 1.10.\r
+ EFI_PEI_PCI_CFG_PPI defined in Inte's EFI Specification 1.10 is replaced by\r
+ EFI_PEI_PCI_CFG2_PPI in PI 1.0. "Modify" function in these two PPI are not \r
+ compatibile with each other.\r
+ \r
+\r
+ For Framework code that make the following call:\r
+\r
+ PciCfg->Modify (\r
+ PeiServices,\r
+ PciCfg,\r
+ Width,\r
+ Address,\r
+ SetBits,\r
+ ClearBits\r
+ );\r
+ it will be updated to the following code which call this library API:\r
+ PeiLibPciCfgModify (\r
+ PeiServices,\r
+ Width,\r
+ Address,\r
+ SetBits,\r
+ ClearBits\r
+ );\r
+\r
+ The \r
+\r
+Arguments:\r
+ \r
+ PeiServices An indirect pointer to the PEI Services Table\r
+ published by the PEI Foundation.\r
+\r
+ Width The width of the access. Enumerated in bytes. Type\r
+ EFI_PEI_PCI_CFG_PPI_WIDTH is defined in Read().\r
+\r
+ Address The physical address of the access.\r
+\r
+ SetBits Points to value to bitwise-OR with the read configuration value.\r
+\r
+ The size of the value is determined by Width.\r
+\r
+ ClearBits Points to the value to negate and bitwise-AND with the read configuration value.\r
+ The size of the value is determined by Width.\r
+\r
+\r
+Returns:\r
+\r
+ EFI_SUCCESS The function completed successfully.\r
+\r
+ EFI_DEVICE_ERROR There was a problem with the transaction.\r
+\r
+--*/\r
+;\r
+\r
#endif\r
}\r
\r
\r
+EFI_STATUS\r
+EFIAPI \r
+PeiLibPciCfgModify (\r
+ IN EFI_PEI_SERVICES **PeiServices,\r
+ IN PEI_PCI_CFG_PPI_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN UINTN SetBits,\r
+ IN UINTN ClearBits\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ PCI read-modify-write operations.\r
+\r
+ PIWG's PI specification replaces Inte's EFI Specification 1.10.\r
+ EFI_PEI_PCI_CFG_PPI defined in Inte's EFI Specification 1.10 is replaced by\r
+ EFI_PEI_PCI_CFG2_PPI in PI 1.0. "Modify" function in these two PPI are not \r
+ compatibile with each other.\r
+ \r
+\r
+ For Framework code that make the following call:\r
+\r
+ PciCfg->Modify (\r
+ PeiServices,\r
+ PciCfg,\r
+ Width,\r
+ Address,\r
+ SetBits,\r
+ ClearBits\r
+ );\r
+ it will be updated to the following code which call this library API:\r
+ PeiLibPciCfgModify (\r
+ PeiServices,\r
+ Width,\r
+ Address,\r
+ SetBits,\r
+ ClearBits\r
+ );\r
+\r
+ The \r
+\r
+Arguments:\r
+ \r
+ PeiServices An indirect pointer to the PEI Services Table\r
+ published by the PEI Foundation.\r
+\r
+ Width The width of the access. Enumerated in bytes. Type\r
+ EFI_PEI_PCI_CFG_PPI_WIDTH is defined in Read().\r
+\r
+ Address The physical address of the access.\r
+\r
+ SetBits Points to value to bitwise-OR with the read configuration value.\r
+\r
+ The size of the value is determined by Width.\r
+\r
+ ClearBits Points to the value to negate and bitwise-AND with the read configuration value.\r
+ The size of the value is determined by Width.\r
+\r
+\r
+Returns:\r
+\r
+ EFI_SUCCESS The function completed successfully.\r
+\r
+ EFI_DEVICE_ERROR There was a problem with the transaction.\r
+\r
+--*/\r
+{\r
+ EFI_STATUS Status;\r
+ EFI_PEI_PCI_CFG2_PPI *PciCfg2;\r
+\r
+ Status = (*PeiServices)->LocatePpi (\r
+ PeiServices,\r
+ &gPeiPciCfg2PpiGuid,\r
+ 0,\r
+ NULL,\r
+ (VOID **) &PciCfg2\r
+ );\r
+ ASSERT_EFI_ERROR (Status);\r
+\r
+ Status = PciCfg2->Modify (\r
+ PeiServices,\r
+ PciCfg2,\r
+ Width,\r
+ Address,\r
+ &SetBits,\r
+ &ClearBits\r
+ );\r
+\r
+ return Status;\r
+}\r
+\r
+\r
#if (PI_SPECIFICATION_VERSION >= 0x00010000)\r
\r
VOID *\r