0, // Power Mgt 1b Event Reg Blk unsupported\r
PM1a_CNT_BLK, // Port address of Power Mgt 1a Ctrl Reg Blk\r
0, // Power Mgt 1b Ctrl Reg Blk unsupported\r
- PM2_CNT_BLK, // Port address of Power Mgt 2 Ctrl Reg Blk\r
+ 0, // Power Mgt 2 Ctrl Reg Blk unsupported\r
PM_TMR_BLK, // Port address of Power Mgt Timer Ctrl Reg Blk\r
GPE0_BLK, // Port addr of General Purpose Event 0 Reg Blk\r
GPE1_BLK, // Port addr of General Purpose Event 1 Reg Blk\r
PM1_EVT_LEN, // Byte Length of ports at pm1X_evt_blk\r
PM1_CNT_LEN, // Byte Length of ports at pm1X_cnt_blk\r
- PM2_CNT_LEN, // Byte Length of ports at pm2_cnt_blk\r
+ 0, // Power Mgt 2 Ctrl Reg Blk unsupported\r
PM_TM_LEN, // Byte Length of ports at pm_tm_blk\r
GPE0_BLK_LEN, // Byte Length of ports at gpe0_blk\r
GPE1_BLK_LEN, // Byte Length of ports at gpe1_blk\r
#define S4BIOS_REQ 0x00\r
#define PM1a_EVT_BLK 0x0000b000\r
#define PM1a_CNT_BLK 0x0000b004\r
-#define PM2_CNT_BLK 0x00000000\r
#define PM_TMR_BLK 0x0000b008\r
#define GPE0_BLK 0x0000afe0\r
#define GPE1_BLK 0x00000000\r
#define PM1_EVT_LEN 0x04\r
#define PM1_CNT_LEN 0x02\r
-#define PM2_CNT_LEN 0x00\r
#define PM_TM_LEN 0x04\r
#define GPE0_BLK_LEN 0x04\r
#define GPE1_BLK_LEN 0x00\r