ShellPkg: fix typo.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Bobzin (jeff.bobzin@insyde.com)
Signed-off-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Erik Bjorge <erik.c.bjorge@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15696 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c b/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c
index 470f870065531d1159c89ba0cff69346dd66ed57..1e0d8c28d4aec4562c7d9c5b698dc1aa327173ce 100644 (file)
--- a/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c
+++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c
@@ -1662,7 +1662,7 @@ PciExplainPciExpress (
 **/\r
 EFI_STATUS\r
 ExplainPcieCapReg (\r
-  IN PCIE_CAP_STURCTURE *PciExpressCap\r
+  IN PCIE_CAP_STRUCTURE *PciExpressCap\r
   );\r
 \r
 /**\r
@@ -1674,7 +1674,7 @@ ExplainPcieCapReg (
 **/\r
 EFI_STATUS\r
 ExplainPcieDeviceCap (\r
-  IN PCIE_CAP_STURCTURE *PciExpressCap\r
+  IN PCIE_CAP_STRUCTURE *PciExpressCap\r
   );\r
 \r
 /**\r
@@ -1686,7 +1686,7 @@ ExplainPcieDeviceCap (
 **/\r
 EFI_STATUS\r
 ExplainPcieDeviceControl (\r
-  IN PCIE_CAP_STURCTURE *PciExpressCap\r
+  IN PCIE_CAP_STRUCTURE *PciExpressCap\r
   );\r
 \r
 /**\r
@@ -1698,7 +1698,7 @@ ExplainPcieDeviceControl (
 **/\r
 EFI_STATUS\r
 ExplainPcieDeviceStatus (\r
-  IN PCIE_CAP_STURCTURE *PciExpressCap\r
+  IN PCIE_CAP_STRUCTURE *PciExpressCap\r
   );\r
 \r
 /**\r
@@ -1710,7 +1710,7 @@ ExplainPcieDeviceStatus (
 **/\r
 EFI_STATUS\r
 ExplainPcieLinkCap (\r
-  IN PCIE_CAP_STURCTURE *PciExpressCap\r
+  IN PCIE_CAP_STRUCTURE *PciExpressCap\r
   );\r
 \r
 /**\r
@@ -1722,7 +1722,7 @@ ExplainPcieLinkCap (
 **/\r
 EFI_STATUS\r
 ExplainPcieLinkControl (\r
-  IN PCIE_CAP_STURCTURE *PciExpressCap\r
+  IN PCIE_CAP_STRUCTURE *PciExpressCap\r
   );\r
 \r
 /**\r
@@ -1734,7 +1734,7 @@ ExplainPcieLinkControl (
 **/\r
 EFI_STATUS\r
 ExplainPcieLinkStatus (\r
-  IN PCIE_CAP_STURCTURE *PciExpressCap\r
+  IN PCIE_CAP_STRUCTURE *PciExpressCap\r
   );\r
 \r
 /**\r
@@ -1746,7 +1746,7 @@ ExplainPcieLinkStatus (
 **/\r
 EFI_STATUS\r
 ExplainPcieSlotCap (\r
-  IN PCIE_CAP_STURCTURE *PciExpressCap\r
+  IN PCIE_CAP_STRUCTURE *PciExpressCap\r
   );\r
 \r
 /**\r
@@ -1758,7 +1758,7 @@ ExplainPcieSlotCap (
 **/\r
 EFI_STATUS\r
 ExplainPcieSlotControl (\r
-  IN PCIE_CAP_STURCTURE *PciExpressCap\r
+  IN PCIE_CAP_STRUCTURE *PciExpressCap\r
   );\r
 \r
 /**\r
@@ -1770,7 +1770,7 @@ ExplainPcieSlotControl (
 **/\r
 EFI_STATUS\r
 ExplainPcieSlotStatus (\r
-  IN PCIE_CAP_STURCTURE *PciExpressCap\r
+  IN PCIE_CAP_STRUCTURE *PciExpressCap\r
   );\r
 \r
 /**\r
@@ -1782,7 +1782,7 @@ ExplainPcieSlotStatus (
 **/\r
 EFI_STATUS\r
 ExplainPcieRootControl (\r
-  IN PCIE_CAP_STURCTURE *PciExpressCap\r
+  IN PCIE_CAP_STRUCTURE *PciExpressCap\r
   );\r
 \r
 /**\r
@@ -1794,7 +1794,7 @@ ExplainPcieRootControl (
 **/\r
 EFI_STATUS\r
 ExplainPcieRootCap (\r
-  IN PCIE_CAP_STURCTURE *PciExpressCap\r
+  IN PCIE_CAP_STRUCTURE *PciExpressCap\r
   );\r
 \r
 /**\r
@@ -1806,10 +1806,10 @@ ExplainPcieRootCap (
 **/\r
 EFI_STATUS\r
 ExplainPcieRootStatus (\r
-  IN PCIE_CAP_STURCTURE *PciExpressCap\r
+  IN PCIE_CAP_STRUCTURE *PciExpressCap\r
   );\r
 \r
-typedef EFI_STATUS (*PCIE_EXPLAIN_FUNCTION) (IN PCIE_CAP_STURCTURE *PciExpressCap);\r
+typedef EFI_STATUS (*PCIE_EXPLAIN_FUNCTION) (IN PCIE_CAP_STRUCTURE *PciExpressCap);\r
 \r
 typedef enum {\r
   FieldWidthUINT8,\r
@@ -3853,7 +3853,7 @@ PciExplainCapabilityStruct (
 **/\r
 EFI_STATUS\r
 ExplainPcieCapReg (\r
-  IN PCIE_CAP_STURCTURE *PciExpressCap\r
+  IN PCIE_CAP_STRUCTURE *PciExpressCap\r
   )\r
 {\r
   UINT16 PcieCapReg;\r
@@ -3901,7 +3901,7 @@ ExplainPcieCapReg (
 **/\r
 EFI_STATUS\r
 ExplainPcieDeviceCap (\r
-  IN PCIE_CAP_STURCTURE *PciExpressCap\r
+  IN PCIE_CAP_STRUCTURE *PciExpressCap\r
   )\r
 {\r
   UINT16 PcieCapReg;\r
@@ -3990,7 +3990,7 @@ ExplainPcieDeviceCap (
 **/\r
 EFI_STATUS\r
 ExplainPcieDeviceControl (\r
-  IN PCIE_CAP_STURCTURE *PciExpressCap\r
+  IN PCIE_CAP_STRUCTURE *PciExpressCap\r
   )\r
 {\r
   UINT16 PcieCapReg;\r
@@ -4067,7 +4067,7 @@ ExplainPcieDeviceControl (
 **/\r
 EFI_STATUS\r
 ExplainPcieDeviceStatus (\r
-  IN PCIE_CAP_STURCTURE *PciExpressCap\r
+  IN PCIE_CAP_STRUCTURE *PciExpressCap\r
   )\r
 {\r
   UINT16 PcieDeviceStatus;\r
@@ -4109,7 +4109,7 @@ ExplainPcieDeviceStatus (
 **/\r
 EFI_STATUS\r
 ExplainPcieLinkCap (\r
-  IN PCIE_CAP_STURCTURE *PciExpressCap\r
+  IN PCIE_CAP_STRUCTURE *PciExpressCap\r
   )\r
 {\r
   UINT32 PcieLinkCap;\r
@@ -4200,7 +4200,7 @@ ExplainPcieLinkCap (
 **/\r
 EFI_STATUS\r
 ExplainPcieLinkControl (\r
-  IN PCIE_CAP_STURCTURE *PciExpressCap\r
+  IN PCIE_CAP_STRUCTURE *PciExpressCap\r
   )\r
 {\r
   UINT16 PcieLinkControl;\r
@@ -4271,7 +4271,7 @@ ExplainPcieLinkControl (
 **/\r
 EFI_STATUS\r
 ExplainPcieLinkStatus (\r
-  IN PCIE_CAP_STURCTURE *PciExpressCap\r
+  IN PCIE_CAP_STRUCTURE *PciExpressCap\r
   )\r
 {\r
   UINT16 PcieLinkStatus;\r
@@ -4332,7 +4332,7 @@ ExplainPcieLinkStatus (
 **/\r
 EFI_STATUS\r
 ExplainPcieSlotCap (\r
-  IN PCIE_CAP_STURCTURE *PciExpressCap\r
+  IN PCIE_CAP_STRUCTURE *PciExpressCap\r
   )\r
 {\r
   UINT32 PcieSlotCap;\r
@@ -4400,7 +4400,7 @@ ExplainPcieSlotCap (
 **/\r
 EFI_STATUS\r
 ExplainPcieSlotControl (\r
-  IN PCIE_CAP_STURCTURE *PciExpressCap\r
+  IN PCIE_CAP_STRUCTURE *PciExpressCap\r
   )\r
 {\r
   UINT16 PcieSlotControl;\r
@@ -4464,7 +4464,7 @@ ExplainPcieSlotControl (
 **/\r
 EFI_STATUS\r
 ExplainPcieSlotStatus (\r
-  IN PCIE_CAP_STURCTURE *PciExpressCap\r
+  IN PCIE_CAP_STRUCTURE *PciExpressCap\r
   )\r
 {\r
   UINT16 PcieSlotStatus;\r
@@ -4525,7 +4525,7 @@ ExplainPcieSlotStatus (
 **/\r
 EFI_STATUS\r
 ExplainPcieRootControl (\r
-  IN PCIE_CAP_STURCTURE *PciExpressCap\r
+  IN PCIE_CAP_STRUCTURE *PciExpressCap\r
   )\r
 {\r
   UINT16 PcieRootControl;\r
@@ -4565,7 +4565,7 @@ ExplainPcieRootControl (
 **/\r
 EFI_STATUS\r
 ExplainPcieRootCap (\r
-  IN PCIE_CAP_STURCTURE *PciExpressCap\r
+  IN PCIE_CAP_STRUCTURE *PciExpressCap\r
   )\r
 {\r
   UINT16 PcieRootCap;\r
@@ -4589,7 +4589,7 @@ ExplainPcieRootCap (
 **/\r
 EFI_STATUS\r
 ExplainPcieRootStatus (\r
-  IN PCIE_CAP_STURCTURE *PciExpressCap\r
+  IN PCIE_CAP_STRUCTURE *PciExpressCap\r
   )\r
 {\r
   UINT32 PcieRootStatus;\r
@@ -5062,7 +5062,7 @@ EFIAPI
 PrintInterpretedExtendedCompatibilityMulticast (\r
   IN CONST PCI_EXP_EXT_HDR *HeaderAddress,\r
   IN CONST PCI_EXP_EXT_HDR *HeadersBaseAddress,\r
-  IN CONST PCIE_CAP_STURCTURE *PciExpressCapPtr\r
+  IN CONST PCIE_CAP_STRUCTURE *PciExpressCapPtr\r
   )\r
 {\r
   CONST PCI_EXPRESS_EXTENDED_CAPABILITIES_MULTICAST *Header;\r
@@ -5234,7 +5234,7 @@ EFIAPI
 PrintInterpretedExtendedCompatibilitySecondary (\r
   IN CONST PCI_EXP_EXT_HDR *HeaderAddress,\r
   IN CONST PCI_EXP_EXT_HDR *HeadersBaseAddress,\r
-  IN CONST PCIE_CAP_STURCTURE *PciExpressCapPtr\r
+  IN CONST PCIE_CAP_STRUCTURE *PciExpressCapPtr\r
   )\r
 {\r
   CONST PCI_EXPRESS_EXTENDED_CAPABILITIES_SECONDARY_PCIE *Header;\r
@@ -5276,7 +5276,7 @@ EFIAPI
 PrintPciExtendedCapabilityDetails(\r
   IN CONST PCI_EXP_EXT_HDR    *HeadersBaseAddress, \r
   IN CONST PCI_EXP_EXT_HDR    *HeaderAddress,\r
-  IN CONST PCIE_CAP_STURCTURE *PciExpressCapPtr\r
+  IN CONST PCIE_CAP_STRUCTURE *PciExpressCapPtr\r
   )\r
 {\r
   switch (HeaderAddress->CapabilityId){\r
@@ -5346,7 +5346,7 @@ PciExplainPciExpress (
   )\r
 {\r
 \r
-  PCIE_CAP_STURCTURE  PciExpressCap;\r
+  PCIE_CAP_STRUCTURE  PciExpressCap;\r
   EFI_STATUS          Status;\r
   UINT64              CapRegAddress;\r
   UINT8               Bus;\r

diff --git a/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.h b/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.h
index 8a053ab981c7704d9cf649ae6c5fb9d5a32f94b9..1b061548426f1fd45f40b48835578b7528021cf0 100644 (file)
--- a/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.h
+++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.h
@@ -453,10 +453,10 @@ typedef struct {
   UINT32  SlotCap;\r
   UINT16  SlotControl;\r
   UINT16  SlotStatus;\r
-  UINT16  RsvdP;\r
   UINT16  RootControl;\r
+  UINT16  RsvdP;\r
   UINT32  RootStatus;\r
-} PCIE_CAP_STURCTURE;\r
+} PCIE_CAP_STRUCTURE;\r
 \r
 #pragma pack()\r
 \r