]> git.proxmox.com Git - mirror_edk2.git/commitdiff
UefiCpuPkg PiSmmCpuDxeSmm: Convert Ia32/SmmInit.asm to NASM
authorLiming Gao <liming.gao@intel.com>
Tue, 14 Jun 2016 08:29:40 +0000 (16:29 +0800)
committerLiming Gao <liming.gao@intel.com>
Tue, 28 Jun 2016 01:52:15 +0000 (09:52 +0800)
Manually convert Ia32/SmmInit.asm to Ia32/SmmInit.nasm

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm [new file with mode: 0644]

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm
new file mode 100644 (file)
index 0000000..c2295e4
--- /dev/null
@@ -0,0 +1,88 @@
+;------------------------------------------------------------------------------ ;\r
+; Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>\r
+; This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php.\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   SmmInit.nasm\r
+;\r
+; Abstract:\r
+;\r
+;   Functions for relocating SMBASE's for all processors\r
+;\r
+;-------------------------------------------------------------------------------\r
+\r
+extern ASM_PFX(SmmInitHandler)\r
+extern ASM_PFX(mRebasedFlag)\r
+extern ASM_PFX(mSmmRelocationOriginalAddress)\r
+\r
+global ASM_PFX(gSmmCr3)\r
+global ASM_PFX(gSmmCr4)\r
+global ASM_PFX(gSmmCr0)\r
+global ASM_PFX(gSmmJmpAddr)\r
+global ASM_PFX(gSmmInitStack)\r
+global ASM_PFX(gcSmiInitGdtr)\r
+global ASM_PFX(gcSmmInitSize)\r
+global ASM_PFX(gcSmmInitTemplate)\r
+\r
+%define PROTECT_MODE_CS 0x8\r
+%define PROTECT_MODE_DS 0x20\r
+\r
+    SECTION .text\r
+\r
+ASM_PFX(gcSmiInitGdtr):\r
+            DW      0\r
+            DQ      0\r
+\r
+global ASM_PFX(SmmStartup)\r
+ASM_PFX(SmmStartup):\r
+    DB      0x66, 0xb8\r
+ASM_PFX(gSmmCr3): DD 0\r
+    mov     cr3, eax\r
+    DB      0x67, 0x66\r
+    lgdt    [cs:ebp + (ASM_PFX(gcSmiInitGdtr) - ASM_PFX(SmmStartup))]\r
+    DB      0x66, 0xb8\r
+ASM_PFX(gSmmCr4): DD 0\r
+    mov     cr4, eax\r
+    DB      0x66, 0xb8\r
+ASM_PFX(gSmmCr0): DD 0\r
+    DB      0xbf, PROTECT_MODE_DS, 0    ; mov di, PROTECT_MODE_DS\r
+    mov     cr0, eax\r
+    DB      0x66, 0xea                   ; jmp far [ptr48]\r
+ASM_PFX(gSmmJmpAddr):\r
+    DD      @32bit\r
+    DW      PROTECT_MODE_CS\r
+@32bit:\r
+    mov     ds, edi\r
+    mov     es, edi\r
+    mov     fs, edi\r
+    mov     gs, edi\r
+    mov     ss, edi\r
+    DB      0xbc                        ; mov esp, imm32\r
+ASM_PFX(gSmmInitStack): DD 0\r
+    call    ASM_PFX(SmmInitHandler)\r
+    rsm\r
+\r
+BITS 16\r
+ASM_PFX(gcSmmInitTemplate):\r
+    mov ebp, ASM_PFX(SmmStartup)\r
+    sub ebp, 0x30000\r
+    jmp ebp\r
+\r
+ASM_PFX(gcSmmInitSize): DW $ - ASM_PFX(gcSmmInitTemplate)\r
+\r
+BITS 32\r
+global ASM_PFX(SmmRelocationSemaphoreComplete)\r
+ASM_PFX(SmmRelocationSemaphoreComplete):\r
+    push    eax\r
+    mov     eax, [ASM_PFX(mRebasedFlag)]\r
+    mov     byte [eax], 1\r
+    pop     eax\r
+    jmp     [ASM_PFX(mSmmRelocationOriginalAddress)]\r
+    END\r