ArmPkg: Fixed RVCT compiler warnings

Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13490 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h
index 8eb1ebda5262e4acc2e504badf76b5192cdae7b7..23beb242749cfe41d5fb03098a684f324130ab7a 100644 (file)
--- a/ArmPkg/Include/Library/ArmLib.h
+++ b/ArmPkg/Include/Library/ArmLib.h
@@ -95,12 +95,12 @@ typedef enum {
 //
 // ARM Cpu IDs
 //
-#define ARM_CPU_IMPLEMENTER_MASK          (0xFF << 24)
-#define ARM_CPU_IMPLEMENTER_ARMLTD        (0x41 << 24)
-#define ARM_CPU_IMPLEMENTER_DEC           (0x44 << 24)
-#define ARM_CPU_IMPLEMENTER_MOT           (0x4D << 24)
-#define ARM_CPU_IMPLEMENTER_QUALCOMM      (0x51 << 24)
-#define ARM_CPU_IMPLEMENTER_MARVELL       (0x56 << 24)
+#define ARM_CPU_IMPLEMENTER_MASK          (0xFFU << 24)
+#define ARM_CPU_IMPLEMENTER_ARMLTD        (0x41U << 24)
+#define ARM_CPU_IMPLEMENTER_DEC           (0x44U << 24)
+#define ARM_CPU_IMPLEMENTER_MOT           (0x4DU << 24)
+#define ARM_CPU_IMPLEMENTER_QUALCOMM      (0x51U << 24)
+#define ARM_CPU_IMPLEMENTER_MARVELL       (0x56U << 24)
 
 #define ARM_CPU_PRIMARY_PART_MASK         (0xFFF << 4)
 #define ARM_CPU_PRIMARY_PART_CORTEXA5     (0xC05 << 4)

diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmLibSupportV7.asm b/ArmPkg/Library/ArmLib/ArmV7/ArmLibSupportV7.asm
index 39d6c859376a09b7c1fc1a7c69d4e5a4550d1dde..a5ff6b26108e5715cdb808206aa06a4fb2b6427b 100644 (file)
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmLibSupportV7.asm
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmLibSupportV7.asm
@@ -97,4 +97,4 @@ ReadCLIDR
   mrc p15,1,r0,c0,c0,1 ; Read CP15 Cache Level ID Register\r
   bx  lr\r
   \r
-END\r
+  END\r

diff --git a/ArmPkg/Library/BaseMemoryLibStm/Arm/SetMem.asm b/ArmPkg/Library/BaseMemoryLibStm/Arm/SetMem.asm
index 7222cf9b7fdddb029a227a3675b6694cb84136fa..7926d55369ba37d19ddc01cc6871afa0819685bb 100755 (executable)
--- a/ArmPkg/Library/BaseMemoryLibStm/Arm/SetMem.asm
+++ b/ArmPkg/Library/BaseMemoryLibStm/Arm/SetMem.asm
@@ -80,4 +80,3 @@ L43
   ldmfd    sp!, {r4-r11, pc}\r
   \r
   END\r
-  
\ No newline at end of file

diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/memset.asm b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/memset.asm
index 2d901c3a6b98da28d9ec4ab9eb6a152300c70c1c..d567cd54e76e84b756f6acfd2fb00e700b84f9be 100755 (executable)
--- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/memset.asm
+++ b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/memset.asm
@@ -55,3 +55,5 @@ __aeabi_memclr4
   mov   r2, r1
   mov   r1, #0
   b     __aeabi_memset
+
+  END

diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/Include/Platform/ArmPlatform.h b/ArmPlatformPkg/ArmRealViewEbPkg/Include/Platform/ArmPlatform.h
index 122cf2b03376e0829ea9180b9781c278825478e7..291d676d30a33941b46eb2f2cea5cca4c49eedd6 100644 (file)
--- a/ArmPlatformPkg/ArmRealViewEbPkg/Include/Platform/ArmPlatform.h
+++ b/ArmPlatformPkg/ArmRealViewEbPkg/Include/Platform/ArmPlatform.h
@@ -104,9 +104,9 @@
 // L2x0 Cache Controller Base Address\r
 //#define ARM_EB_L2x0_CTLR_BASE                   0x1E00A000*/\r
 \r
-#define ARM_EB_SYS_PROC_ID_MASK                  (0xFF << 24)\r
-#define ARM_EB_SYS_PROC_ID_CORTEX_A8             (0x0E << 24)\r
-#define ARM_EB_SYS_PROC_ID_CORTEX_A9             (0x0C << 24)\r
+#define ARM_EB_SYS_PROC_ID_MASK                  (UINT32)(0xFFU << 24)\r
+#define ARM_EB_SYS_PROC_ID_CORTEX_A8             (UINT32)(0x0EU << 24)\r
+#define ARM_EB_SYS_PROC_ID_CORTEX_A9             (UINT32)(0x0CU << 24)\r
 \r
 /*******************************************\r
 // System Configuration Control\r

diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbSecLibRTSM/ArmRealViewEbBoot.asm b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbSecLibRTSM/ArmRealViewEbBoot.asm
index 1765dd13aa63c8205027737913288bd58ffd76f9..e8bc0cd0b4a54573ab0eb47437f3d7b12b4832b4 100644 (file)
--- a/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbSecLibRTSM/ArmRealViewEbBoot.asm
+++ b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbSecLibRTSM/ArmRealViewEbBoot.asm
@@ -54,3 +54,5 @@ ArmPlatformSecBootAction
 ArmPlatformSecBootMemoryInit\r
   // The SMC does not need to be initialized for RTSM\r
   bx    lr\r
+\r
+  END\r

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Include/VExpressMotherBoard.h b/ArmPlatformPkg/ArmVExpressPkg/Include/VExpressMotherBoard.h
index 63b4005e9655973bf9801faf76f1bd0ce07b1cca..3555f3635afd956f0cb4b610106e2e557780af69 100644 (file)
--- a/ArmPlatformPkg/ArmVExpressPkg/Include/VExpressMotherBoard.h
+++ b/ArmPlatformPkg/ArmVExpressPkg/Include/VExpressMotherBoard.h
@@ -48,11 +48,11 @@
 // VRAM offset for the PL111 Colour LCD Controller on the motherboard\r
 #define VRAM_MOTHERBOARD_BASE                     (ARM_VE_SMB_PERIPH_BASE   + 0x00000)\r
 \r
-#define ARM_VE_SYS_PROC_ID_MASK                   (0xFF << 24)\r
-#define ARM_VE_SYS_PROC_ID_UNSUPPORTED            (0xFF << 24)\r
-#define ARM_VE_SYS_PROC_ID_CORTEX_A9              (0x0C << 24)\r
-#define ARM_VE_SYS_PROC_ID_CORTEX_A5              (0x12 << 24)\r
-#define ARM_VE_SYS_PROC_ID_CORTEX_A15             (0x14 << 24)\r
+#define ARM_VE_SYS_PROC_ID_MASK                   (UINT32)(0xFFU << 24)\r
+#define ARM_VE_SYS_PROC_ID_UNSUPPORTED            (UINT32)(0xFFU << 24)\r
+#define ARM_VE_SYS_PROC_ID_CORTEX_A9              (UINT32)(0x0CU << 24)\r
+#define ARM_VE_SYS_PROC_ID_CORTEX_A5              (UINT32)(0x12U << 24)\r
+#define ARM_VE_SYS_PROC_ID_CORTEX_A15             (UINT32)(0x14U << 24)\r
 \r
 //\r
 // Sites where the peripheral is fitted\r

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.asm b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.asm
index ebcee9a0d95dba234de96b3dd8e6f46782279ea6..16fab1605ba10b550a50c6413bf55da7e4ecfbf3 100644 (file)
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.asm
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.asm
@@ -123,3 +123,5 @@ ArmPlatformSecBootMemoryInit
   ldr     r0, [r2, #0]\r
 \r
   bx    r5\r
+\r
+  END\r

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMBoot.asm b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMBoot.asm
index f62a1998edfd2bc1c815eef0701509c9f0ee8079..2d0b94679f1ab529ff5c656d84682fd2602f91cb 100644 (file)
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMBoot.asm
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMBoot.asm
@@ -50,3 +50,5 @@ ArmPlatformSecBootAction
 ArmPlatformSecBootMemoryInit\r
   // The SMC does not need to be initialized for RTSM\r
   bx    lr\r
+\r
+  END\r

diff --git a/ArmPlatformPkg/Drivers/PL35xSmc/InitializeSMC.asm b/ArmPlatformPkg/Drivers/PL35xSmc/InitializeSMC.asm
index 297b2d77abf07eb87d2d5db97ebbdad1768383e5..fd6f6e6a134ae2db53d988deb7772619520eaaaa 100755 (executable)
--- a/ArmPlatformPkg/Drivers/PL35xSmc/InitializeSMC.asm
+++ b/ArmPlatformPkg/Drivers/PL35xSmc/InitializeSMC.asm
@@ -58,3 +58,5 @@ PL35xSmcSetRefresh
   str   r2, [r1, #PL350_SMC_REFRESH_0_OFFSET]\r
   str   r3, [r1, #PL350_SMC_REFRESH_1_OFFSET]\r
   blx lr\r
+\r
+  END\r

diff --git a/ArmPlatformPkg/Library/ArmPlatformSecLibNull/ArmPlatformLibNullBoot.asm b/ArmPlatformPkg/Library/ArmPlatformSecLibNull/ArmPlatformLibNullBoot.asm
index 0cd5e37c705497589b343b096c19a279cce2833b..ead086874086e0cf8daa386824408beefe072daf 100644 (file)
--- a/ArmPlatformPkg/Library/ArmPlatformSecLibNull/ArmPlatformLibNullBoot.asm
+++ b/ArmPlatformPkg/Library/ArmPlatformSecLibNull/ArmPlatformLibNullBoot.asm
@@ -45,3 +45,5 @@ ArmPlatformSecBootAction
 ArmPlatformSecBootMemoryInit\r
   // The SMC does not need to be initialized for RTSM\r
   bx    lr\r
+\r
+  END\r

diff --git a/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c b/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c
index 2497da10929883230ae3810eecf5676947520bc2..9e78d7eadfefa8cb1151a133b979a4fe77c497cb 100755 (executable)
--- a/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c
+++ b/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c
@@ -16,6 +16,7 @@
 \r
 #include <Library/ArmLib.h>\r
 #include <Library/ArmGicLib.h>\r
+#include <Library/ArmPlatformSecLib.h>\r
 #include <Library/DebugLib.h>\r
 #include <Library/PcdLib.h>\r
 #include <Library/PrintLib.h>\r

diff --git a/ArmPlatformPkg/PrePi/ModuleEntryPoint.asm b/ArmPlatformPkg/PrePi/ModuleEntryPoint.asm
index 1e1938c8f3b5d1596f42db6456038a27c069a420..e0b622103f8e98d9aad45c5dc7a06090c91ff887 100644 (file)
--- a/ArmPlatformPkg/PrePi/ModuleEntryPoint.asm
+++ b/ArmPlatformPkg/PrePi/ModuleEntryPoint.asm
@@ -36,7 +36,7 @@ _ModuleEntryPoint
 \r
 _SetSVCMode\r
   // Enter SVC mode, Disable FIQ and IRQ\r
-  mov     r1, #0x13|0x80|0x40\r
+  mov     r1, #0x13 :OR: 0x80 :OR: 0x40\r
   msr     CPSR_c, r1\r
 \r
 // Check if we can install the stack at the top of the System Memory or if we need\r