--- /dev/null
+#!/usr/bin/env python\r
+## @ FspDscBsf2Yaml.py\r
+# This script convert DSC or BSF format file into YAML format\r
+#\r
+# Copyright(c) 2021, Intel Corporation. All rights reserved.<BR>\r
+# SPDX-License-Identifier: BSD-2-Clause-Patent\r
+#\r
+##\r
+\r
+import os\r
+import re\r
+import sys\r
+from datetime import date\r
+from collections import OrderedDict\r
+from functools import reduce\r
+\r
+from GenCfgOpt import CGenCfgOpt\r
+\r
+__copyright_tmp__ = """## @file\r
+#\r
+# YAML CFGDATA %s File.\r
+#\r
+# Copyright(c) %4d, Intel Corporation. All rights reserved.<BR>\r
+# SPDX-License-Identifier: BSD-2-Clause-Patent\r
+#\r
+##\r
+"""\r
+\r
+__copyright_dsc__ = """## @file\r
+#\r
+# Copyright (c) %04d, Intel Corporation. All rights reserved.<BR>\r
+# SPDX-License-Identifier: BSD-2-Clause-Patent\r
+#\r
+##\r
+\r
+[PcdsDynamicVpd.Upd]\r
+ #\r
+ # Global definitions in BSF\r
+ # !BSF BLOCK:{NAME:"FSP UPD Configuration", VER:"0.1"}\r
+ #\r
+\r
+"""\r
+\r
+\r
+def Bytes2Val(Bytes):\r
+ return reduce(lambda x, y: (x << 8) | y, Bytes[::-1])\r
+\r
+\r
+class CFspBsf2Dsc:\r
+\r
+ def __init__(self, bsf_file):\r
+ self.cfg_list = CFspBsf2Dsc.parse_bsf(bsf_file)\r
+\r
+ def get_dsc_lines(self):\r
+ return CFspBsf2Dsc.generate_dsc(self.cfg_list)\r
+\r
+ def save_dsc(self, dsc_file):\r
+ return CFspBsf2Dsc.generate_dsc(self.cfg_list, dsc_file)\r
+\r
+ @staticmethod\r
+ def parse_bsf(bsf_file):\r
+\r
+ fd = open(bsf_file, 'r')\r
+ bsf_txt = fd.read()\r
+ fd.close()\r
+\r
+ find_list = []\r
+ regex = re.compile(r'\s+Find\s+"(.*?)"(.*?)^\s+\$(.*?)\s+', re.S | re.MULTILINE)\r
+ for match in regex.finditer(bsf_txt):\r
+ find = match.group(1)\r
+ name = match.group(3)\r
+ if not name.endswith('_Revision'):\r
+ raise Exception("Unexpected CFG item following 'Find' !")\r
+ find_list.append((name, find))\r
+\r
+ idx = 0\r
+ count = 0\r
+ prefix = ''\r
+ chk_dict = {}\r
+ cfg_list = []\r
+ cfg_temp = {'find': '', 'cname': '', 'length': 0, 'value': '0', 'type': 'Reserved',\r
+ 'embed': '', 'page': '', 'option': '', 'instance': 0}\r
+ regex = re.compile(r'^\s+(\$(.*?)|Skip)\s+(\d+)\s+bytes(\s+\$_DEFAULT_\s+=\s+(.+?))?$',\r
+ re.S | re.MULTILINE)\r
+\r
+ for match in regex.finditer(bsf_txt):\r
+ dlen = int(match.group(3))\r
+ if match.group(1) == 'Skip':\r
+ key = 'gPlatformFspPkgTokenSpaceGuid_BsfSkip%d' % idx\r
+ val = ', '.join(['%02X' % ord(i) for i in '\x00' * dlen])\r
+ idx += 1\r
+ option = '$SKIP'\r
+ else:\r
+ key = match.group(2)\r
+ val = match.group(5)\r
+ option = ''\r
+\r
+ cfg_item = dict(cfg_temp)\r
+ finds = [i for i in find_list if i[0] == key]\r
+ if len(finds) > 0:\r
+ if count >= 1:\r
+ # Append a dummy one\r
+ cfg_item['cname'] = 'Dummy'\r
+ cfg_list.append(dict(cfg_item))\r
+ cfg_list[-1]['embed'] = '%s:TAG_%03X:END' % (prefix, ord(prefix[-1]))\r
+ prefix = finds[0][1]\r
+ cfg_item['embed'] = '%s:TAG_%03X:START' % (prefix, ord(prefix[-1]))\r
+ cfg_item['find'] = prefix\r
+ cfg_item['cname'] = 'Signature'\r
+ cfg_item['length'] = len(finds[0][1])\r
+ cfg_item['value'] = '0x%X' % Bytes2Val(finds[0][1].encode('UTF-8'))\r
+ cfg_list.append(dict(cfg_item))\r
+ cfg_item = dict(cfg_temp)\r
+ find_list.pop(0)\r
+ count = 0\r
+\r
+ cfg_item['cname'] = key\r
+ cfg_item['length'] = dlen\r
+ cfg_item['value'] = val\r
+ cfg_item['option'] = option\r
+\r
+ if key not in chk_dict.keys():\r
+ chk_dict[key] = 0\r
+ else:\r
+ chk_dict[key] += 1\r
+ cfg_item['instance'] = chk_dict[key]\r
+\r
+ cfg_list.append(cfg_item)\r
+ count += 1\r
+\r
+ if prefix:\r
+ cfg_item = dict(cfg_temp)\r
+ cfg_item['cname'] = 'Dummy'\r
+ cfg_item['embed'] = '%s:%03X:END' % (prefix, ord(prefix[-1]))\r
+ cfg_list.append(cfg_item)\r
+\r
+ option_dict = {}\r
+ selreg = re.compile(r'\s+Selection\s*(.+?)\s*,\s*"(.*?)"$', re.S | re.MULTILINE)\r
+ regex = re.compile(r'^List\s&(.+?)$(.+?)^EndList$', re.S | re.MULTILINE)\r
+ for match in regex.finditer(bsf_txt):\r
+ key = match.group(1)\r
+ option_dict[key] = []\r
+ for select in selreg.finditer(match.group(2)):\r
+ option_dict[key].append((int(select.group(1), 0), select.group(2)))\r
+\r
+ chk_dict = {}\r
+ pagereg = re.compile(r'^Page\s"(.*?)"$(.+?)^EndPage$', re.S | re.MULTILINE)\r
+ for match in pagereg.finditer(bsf_txt):\r
+ page = match.group(1)\r
+ for line in match.group(2).splitlines():\r
+ match = re.match(r'\s+(Combo|EditNum)\s\$(.+?),\s"(.*?)",\s(.+?),$', line)\r
+ if match:\r
+ cname = match.group(2)\r
+ if cname not in chk_dict.keys():\r
+ chk_dict[cname] = 0\r
+ else:\r
+ chk_dict[cname] += 1\r
+ instance = chk_dict[cname]\r
+ cfg_idxs = [i for i, j in enumerate(cfg_list) if j['cname'] == cname and j['instance'] == instance]\r
+ if len(cfg_idxs) != 1:\r
+ raise Exception("Multiple CFG item '%s' found !" % cname)\r
+ cfg_item = cfg_list[cfg_idxs[0]]\r
+ cfg_item['page'] = page\r
+ cfg_item['type'] = match.group(1)\r
+ cfg_item['prompt'] = match.group(3)\r
+ cfg_item['range'] = None\r
+ if cfg_item['type'] == 'Combo':\r
+ cfg_item['option'] = option_dict[match.group(4)[1:]]\r
+ elif cfg_item['type'] == 'EditNum':\r
+ cfg_item['option'] = match.group(4)\r
+ match = re.match(r'\s+ Help\s"(.*?)"$', line)\r
+ if match:\r
+ cfg_item['help'] = match.group(1)\r
+\r
+ match = re.match(r'\s+"Valid\srange:\s(.*)"$', line)\r
+ if match:\r
+ parts = match.group(1).split()\r
+ cfg_item['option'] = (\r
+ (int(parts[0], 0), int(parts[2], 0), cfg_item['option']))\r
+\r
+ return cfg_list\r
+\r
+ @staticmethod\r
+ def generate_dsc(option_list, dsc_file=None):\r
+ dsc_lines = []\r
+ header = '%s' % (__copyright_dsc__ % date.today().year)\r
+ dsc_lines.extend(header.splitlines())\r
+\r
+ pages = []\r
+ for cfg_item in option_list:\r
+ if cfg_item['page'] and (cfg_item['page'] not in pages):\r
+ pages.append(cfg_item['page'])\r
+\r
+ page_id = 0\r
+ for page in pages:\r
+ dsc_lines.append(' # !BSF PAGES:{PG%02X::"%s"}' % (page_id, page))\r
+ page_id += 1\r
+ dsc_lines.append('')\r
+\r
+ last_page = ''\r
+ for option in option_list:\r
+ dsc_lines.append('')\r
+ default = option['value']\r
+ pos = option['cname'].find('_')\r
+ name = option['cname'][pos + 1:]\r
+\r
+ if option['find']:\r
+ dsc_lines.append(' # !BSF FIND:{%s}' % option['find'])\r
+ dsc_lines.append('')\r
+\r
+ if option['instance'] > 0:\r
+ name = name + '_%s' % option['instance']\r
+\r
+ if option['embed']:\r
+ dsc_lines.append(' # !HDR EMBED:{%s}' % option['embed'])\r
+\r
+ if option['type'] == 'Reserved':\r
+ dsc_lines.append(' # !BSF NAME:{Reserved} TYPE:{Reserved}')\r
+ if option['option'] == '$SKIP':\r
+ dsc_lines.append(' # !BSF OPTION:{$SKIP}')\r
+ else:\r
+ prompt = option['prompt']\r
+\r
+ if last_page != option['page']:\r
+ last_page = option['page']\r
+ dsc_lines.append(' # !BSF PAGE:{PG%02X}' % (pages.index(option['page'])))\r
+\r
+ if option['type'] == 'Combo':\r
+ dsc_lines.append(' # !BSF NAME:{%s} TYPE:{%s}' %\r
+ (prompt, option['type']))\r
+ ops = []\r
+ for val, text in option['option']:\r
+ ops.append('0x%x:%s' % (val, text))\r
+ dsc_lines.append(' # !BSF OPTION:{%s}' % (', '.join(ops)))\r
+ elif option['type'] == 'EditNum':\r
+ cfg_len = option['length']\r
+ if ',' in default and cfg_len > 8:\r
+ dsc_lines.append(' # !BSF NAME:{%s} TYPE:{Table}' % (prompt))\r
+ if cfg_len > 16:\r
+ cfg_len = 16\r
+ ops = []\r
+ for i in range(cfg_len):\r
+ ops.append('%X:1:HEX' % i)\r
+ dsc_lines.append(' # !BSF OPTION:{%s}' % (', '.join(ops)))\r
+ else:\r
+ dsc_lines.append(\r
+ ' # !BSF NAME:{%s} TYPE:{%s, %s,(0x%X, 0x%X)}' %\r
+ (prompt, option['type'], option['option'][2],\r
+ option['option'][0], option['option'][1]))\r
+ dsc_lines.append(' # !BSF HELP:{%s}' % option['help'])\r
+\r
+ if ',' in default:\r
+ default = '{%s}' % default\r
+ dsc_lines.append(' gCfgData.%-30s | * | 0x%04X | %s' %\r
+ (name, option['length'], default))\r
+\r
+ if dsc_file:\r
+ fd = open(dsc_file, 'w')\r
+ fd.write('\n'.join(dsc_lines))\r
+ fd.close()\r
+\r
+ return dsc_lines\r
+\r
+\r
+class CFspDsc2Yaml():\r
+\r
+ def __init__(self):\r
+ self._Hdr_key_list = ['EMBED', 'STRUCT']\r
+ self._Bsf_key_list = ['NAME', 'HELP', 'TYPE', 'PAGE', 'PAGES', 'OPTION',\r
+ 'CONDITION', 'ORDER', 'MARKER', 'SUBT', 'FIELD', 'FIND']\r
+ self.gen_cfg_data = None\r
+ self.cfg_reg_exp = re.compile(r"^([_a-zA-Z0-9$\(\)]+)\s*\|\s*(0x[0-9A-F]+|\*)\s*\|"\r
+ + r"\s*(\d+|0x[0-9a-fA-F]+)\s*\|\s*(.+)")\r
+ self.bsf_reg_exp = re.compile(r"(%s):{(.+?)}(?:$|\s+)" % '|'.join(self._Bsf_key_list))\r
+ self.hdr_reg_exp = re.compile(r"(%s):{(.+?)}" % '|'.join(self._Hdr_key_list))\r
+ self.prefix = ''\r
+ self.unused_idx = 0\r
+ self.offset = 0\r
+ self.base_offset = 0\r
+\r
+ def load_config_data_from_dsc(self, file_name):\r
+ """\r
+ Load and parse a DSC CFGDATA file.\r
+ """\r
+ gen_cfg_data = CGenCfgOpt('FSP')\r
+ if file_name.endswith('.dsc'):\r
+ # if gen_cfg_data.ParseDscFileYaml(file_name, '') != 0:\r
+ if gen_cfg_data.ParseDscFile(file_name, '') != 0:\r
+ raise Exception('DSC file parsing error !')\r
+ if gen_cfg_data.CreateVarDict() != 0:\r
+ raise Exception('DSC variable creation error !')\r
+ else:\r
+ raise Exception('Unsupported file "%s" !' % file_name)\r
+ gen_cfg_data.UpdateDefaultValue()\r
+ self.gen_cfg_data = gen_cfg_data\r
+\r
+ def print_dsc_line(self):\r
+ """\r
+ Debug function to print all DSC lines.\r
+ """\r
+ for line in self.gen_cfg_data._DscLines:\r
+ print(line)\r
+\r
+ def format_value(self, field, text, indent=''):\r
+ """\r
+ Format a CFGDATA item into YAML format.\r
+ """\r
+ if(not text.startswith('!expand')) and (': ' in text):\r
+ tgt = ':' if field == 'option' else '- '\r
+ text = text.replace(': ', tgt)\r
+ lines = text.splitlines()\r
+ if len(lines) == 1 and field != 'help':\r
+ return text\r
+ else:\r
+ return '>\n ' + '\n '.join([indent + i.lstrip() for i in lines])\r
+\r
+ def reformat_pages(self, val):\r
+ # Convert XXX:YYY into XXX::YYY format for page definition\r
+ parts = val.split(',')\r
+ if len(parts) <= 1:\r
+ return val\r
+\r
+ new_val = []\r
+ for each in parts:\r
+ nodes = each.split(':')\r
+ if len(nodes) == 2:\r
+ each = '%s::%s' % (nodes[0], nodes[1])\r
+ new_val.append(each)\r
+ ret = ','.join(new_val)\r
+ return ret\r
+\r
+ def reformat_struct_value(self, utype, val):\r
+ # Convert DSC UINT16/32/64 array into new format by\r
+ # adding prefix 0:0[WDQ] to provide hint to the array format\r
+ if utype in ['UINT16', 'UINT32', 'UINT64']:\r
+ if val and val[0] == '{' and val[-1] == '}':\r
+ if utype == 'UINT16':\r
+ unit = 'W'\r
+ elif utype == 'UINT32':\r
+ unit = 'D'\r
+ else:\r
+ unit = 'Q'\r
+ val = '{ 0:0%s, %s }' % (unit, val[1:-1])\r
+ return val\r
+\r
+ def process_config(self, cfg):\r
+ if 'page' in cfg:\r
+ cfg['page'] = self.reformat_pages(cfg['page'])\r
+\r
+ if 'struct' in cfg:\r
+ cfg['value'] = self.reformat_struct_value(cfg['struct'], cfg['value'])\r
+\r
+ def parse_dsc_line(self, dsc_line, config_dict, init_dict, include):\r
+ """\r
+ Parse a line in DSC and update the config dictionary accordingly.\r
+ """\r
+ init_dict.clear()\r
+ match = re.match(r'g(CfgData|\w+FspPkgTokenSpaceGuid)\.(.+)', dsc_line)\r
+ if match:\r
+ match = self.cfg_reg_exp.match(match.group(2))\r
+ if not match:\r
+ return False\r
+ config_dict['cname'] = self.prefix + match.group(1)\r
+ value = match.group(4).strip()\r
+ length = match.group(3).strip()\r
+ config_dict['length'] = length\r
+ config_dict['value'] = value\r
+ if match.group(2) == '*':\r
+ self.offset += int(length, 0)\r
+ else:\r
+ org_offset = int(match.group(2), 0)\r
+ if org_offset == 0:\r
+ self.base_offset = self.offset\r
+ offset = org_offset + self.base_offset\r
+ if self.offset != offset:\r
+ if offset > self.offset:\r
+ init_dict['padding'] = offset - self.offset\r
+ self.offset = offset + int(length, 0)\r
+ return True\r
+\r
+ match = re.match(r"^\s*#\s+!([<>])\s+include\s+(.+)", dsc_line)\r
+ if match and len(config_dict) == 0:\r
+ # !include should not be inside a config field\r
+ # if so, do not convert include into YAML\r
+ init_dict = dict(config_dict)\r
+ config_dict.clear()\r
+ config_dict['cname'] = '$ACTION'\r
+ if match.group(1) == '<':\r
+ config_dict['include'] = match.group(2)\r
+ else:\r
+ config_dict['include'] = ''\r
+ return True\r
+\r
+ match = re.match(r"^\s*#\s+(!BSF|!HDR)\s+(.+)", dsc_line)\r
+ if not match:\r
+ return False\r
+\r
+ remaining = match.group(2)\r
+ if match.group(1) == '!BSF':\r
+ result = self.bsf_reg_exp.findall(remaining)\r
+ if not result:\r
+ return False\r
+\r
+ for each in result:\r
+ key = each[0].lower()\r
+ val = each[1]\r
+ if key == 'field':\r
+ name = each[1]\r
+ if ':' not in name:\r
+ raise Exception('Incorrect bit field format !')\r
+ parts = name.split(':')\r
+ config_dict['length'] = parts[1]\r
+ config_dict['cname'] = '@' + parts[0]\r
+ return True\r
+ elif key in ['pages', 'page', 'find']:\r
+ init_dict = dict(config_dict)\r
+ config_dict.clear()\r
+ config_dict['cname'] = '$ACTION'\r
+ if key == 'find':\r
+ config_dict['find'] = val\r
+ else:\r
+ config_dict['page'] = val\r
+ return True\r
+ elif key == 'subt':\r
+ config_dict.clear()\r
+ parts = each[1].split(':')\r
+ tmp_name = parts[0][:-5]\r
+ if tmp_name == 'CFGHDR':\r
+ cfg_tag = '_$FFF_'\r
+ sval = '!expand { %s_TMPL : [ ' % tmp_name + '%s, %s, ' % (parts[1], cfg_tag) \\r
+ + ', '.join(parts[2:]) + ' ] }'\r
+ else:\r
+ sval = '!expand { %s_TMPL : [ ' % tmp_name + ', '.join(parts[1:]) + ' ] }'\r
+ config_dict.clear()\r
+ config_dict['cname'] = tmp_name\r
+ config_dict['expand'] = sval\r
+ return True\r
+ else:\r
+ if key in ['name', 'help', 'option'] and val.startswith('+'):\r
+ val = config_dict[key] + '\n' + val[1:]\r
+ if val.strip() == '':\r
+ val = "''"\r
+ config_dict[key] = val\r
+\r
+ else:\r
+ match = self.hdr_reg_exp.match(remaining)\r
+ if not match:\r
+ return False\r
+ key = match.group(1)\r
+ remaining = match.group(2)\r
+ if key == 'EMBED':\r
+ parts = remaining.split(':')\r
+ names = parts[0].split(',')\r
+ if parts[-1] == 'END':\r
+ prefix = '>'\r
+ else:\r
+ prefix = '<'\r
+ skip = False\r
+ if parts[1].startswith('TAG_'):\r
+ tag_txt = '%s:%s' % (names[0], parts[1])\r
+ else:\r
+ tag_txt = names[0]\r
+ if parts[2] in ['START', 'END']:\r
+ if names[0] == 'PCIE_RP_PIN_CTRL[]':\r
+ skip = True\r
+ else:\r
+ tag_txt = '%s:%s' % (names[0], parts[1])\r
+ if not skip:\r
+ config_dict.clear()\r
+ config_dict['cname'] = prefix + tag_txt\r
+ return True\r
+\r
+ if key == 'STRUCT':\r
+ text = remaining.strip()\r
+ config_dict[key.lower()] = text\r
+\r
+ return False\r
+\r
+ def process_template_lines(self, lines):\r
+ """\r
+ Process a line in DSC template section.\r
+ """\r
+ template_name = ''\r
+ bsf_temp_dict = OrderedDict()\r
+ temp_file_dict = OrderedDict()\r
+ include_file = ['.']\r
+\r
+ for line in lines:\r
+ match = re.match(r"^\s*#\s+!([<>])\s+include\s+(.+)", line)\r
+ if match:\r
+ if match.group(1) == '<':\r
+ include_file.append(match.group(2))\r
+ else:\r
+ include_file.pop()\r
+\r
+ match = re.match(r"^\s*#\s+(!BSF)\s+DEFT:{(.+?):(START|END)}", line)\r
+ if match:\r
+ if match.group(3) == 'START' and not template_name:\r
+ template_name = match.group(2).strip()\r
+ temp_file_dict[template_name] = list(include_file)\r
+ bsf_temp_dict[template_name] = []\r
+ if match.group(3) == 'END' and (template_name == match.group(2).strip()) \\r
+ and template_name:\r
+ template_name = ''\r
+ else:\r
+ if template_name:\r
+ bsf_temp_dict[template_name].append(line)\r
+ return bsf_temp_dict, temp_file_dict\r
+\r
+ def process_option_lines(self, lines):\r
+ """\r
+ Process a line in DSC config section.\r
+ """\r
+ cfgs = []\r
+ struct_end = False\r
+ config_dict = dict()\r
+ init_dict = dict()\r
+ include = ['']\r
+ for line in lines:\r
+ ret = self.parse_dsc_line(line, config_dict, init_dict, include)\r
+ if ret:\r
+ if 'padding' in init_dict:\r
+ num = init_dict['padding']\r
+ init_dict.clear()\r
+ padding_dict = {}\r
+ cfgs.append(padding_dict)\r
+ padding_dict['cname'] = 'UnusedUpdSpace%d' % self.unused_idx\r
+ padding_dict['length'] = '0x%x' % num\r
+ padding_dict['value'] = '{ 0 }'\r
+ self.unused_idx += 1\r
+\r
+ if cfgs and cfgs[-1]['cname'][0] != '@' and config_dict['cname'][0] == '@':\r
+ # it is a bit field, mark the previous one as virtual\r
+ cname = cfgs[-1]['cname']\r
+ new_cfg = dict(cfgs[-1])\r
+ new_cfg['cname'] = '@$STRUCT'\r
+ cfgs[-1].clear()\r
+ cfgs[-1]['cname'] = cname\r
+ cfgs.append(new_cfg)\r
+\r
+ if cfgs and cfgs[-1]['cname'] == 'CFGHDR' and config_dict['cname'][0] == '<':\r
+ # swap CfgHeader and the CFG_DATA order\r
+ if ':' in config_dict['cname']:\r
+ # replace the real TAG for CFG_DATA\r
+ cfgs[-1]['expand'] = cfgs[-1]['expand'].replace(\r
+ '_$FFF_', '0x%s' %\r
+ config_dict['cname'].split(':')[1][4:])\r
+ cfgs.insert(-1, config_dict)\r
+ else:\r
+ self.process_config(config_dict)\r
+ if struct_end:\r
+ struct_end = False\r
+ cfgs.insert(-1, config_dict)\r
+ else:\r
+ cfgs.append(config_dict)\r
+ if config_dict['cname'][0] == '>':\r
+ struct_end = True\r
+\r
+ config_dict = dict(init_dict)\r
+ return cfgs\r
+\r
+ def variable_fixup(self, each):\r
+ """\r
+ Fix up some variable definitions for SBL.\r
+ """\r
+ key = each\r
+ val = self.gen_cfg_data._MacroDict[each]\r
+ return key, val\r
+\r
+ def template_fixup(self, tmp_name, tmp_list):\r
+ """\r
+ Fix up some special config templates for SBL\r
+ """\r
+ return\r
+\r
+ def config_fixup(self, cfg_list):\r
+ """\r
+ Fix up some special config items for SBL.\r
+ """\r
+\r
+ # Insert FSPT_UPD/FSPM_UPD/FSPS_UPD tag so as to create C strcture\r
+ idxs = []\r
+ for idx, cfg in enumerate(cfg_list):\r
+ if cfg['cname'].startswith('<FSP_UPD_HEADER'):\r
+ idxs.append(idx)\r
+\r
+ if len(idxs) != 3:\r
+ return\r
+\r
+ # Handle insert backwards so that the index does not change in the loop\r
+ fsp_comp = 'SMT'\r
+ idx_comp = 0\r
+ for idx in idxs[::-1]:\r
+ # Add current FSP?_UPD start tag\r
+ cfgfig_dict = {}\r
+ cfgfig_dict['cname'] = '<FSP%s_UPD' % fsp_comp[idx_comp]\r
+ cfg_list.insert(idx, cfgfig_dict)\r
+ if idx_comp < 2:\r
+ # Add previous FSP?_UPD end tag\r
+ cfgfig_dict = {}\r
+ cfgfig_dict['cname'] = '>FSP%s_UPD' % fsp_comp[idx_comp + 1]\r
+ cfg_list.insert(idx, cfgfig_dict)\r
+ idx_comp += 1\r
+\r
+ # Add final FSPS_UPD end tag\r
+ cfgfig_dict = {}\r
+ cfgfig_dict['cname'] = '>FSP%s_UPD' % fsp_comp[0]\r
+ cfg_list.append(cfgfig_dict)\r
+\r
+ return\r
+\r
+ def get_section_range(self, section_name):\r
+ """\r
+ Extract line number range from config file for a given section name.\r
+ """\r
+ start = -1\r
+ end = -1\r
+ for idx, line in enumerate(self.gen_cfg_data._DscLines):\r
+ if start < 0 and line.startswith('[%s]' % section_name):\r
+ start = idx\r
+ elif start >= 0 and line.startswith('['):\r
+ end = idx\r
+ break\r
+ if start == -1:\r
+ start = 0\r
+ if end == -1:\r
+ end = len(self.gen_cfg_data._DscLines)\r
+ return start, end\r
+\r
+ def normalize_file_name(self, file, is_temp=False):\r
+ """\r
+ Normalize file name convention so that it is consistent.\r
+ """\r
+ if file.endswith('.dsc'):\r
+ file = file[:-4] + '.yaml'\r
+ dir_name = os.path.dirname(file)\r
+ base_name = os.path.basename(file)\r
+ if is_temp:\r
+ if 'Template_' not in file:\r
+ base_name = base_name.replace('Template', 'Template_')\r
+ else:\r
+ if 'CfgData_' not in file:\r
+ base_name = base_name.replace('CfgData', 'CfgData_')\r
+ if dir_name:\r
+ path = dir_name + '/' + base_name\r
+ else:\r
+ path = base_name\r
+ return path\r
+\r
+ def output_variable(self):\r
+ """\r
+ Output variable block into a line list.\r
+ """\r
+ lines = []\r
+ for each in self.gen_cfg_data._MacroDict:\r
+ key, value = self.variable_fixup(each)\r
+ lines.append('%-30s : %s' % (key, value))\r
+ return lines\r
+\r
+ def output_template(self):\r
+ """\r
+ Output template block into a line list.\r
+ """\r
+ self.offset = 0\r
+ self.base_offset = 0\r
+ start, end = self.get_section_range('PcdsDynamicVpd.Tmp')\r
+ bsf_temp_dict, temp_file_dict = self.process_template_lines(self.gen_cfg_data._DscLines[start:end])\r
+ template_dict = dict()\r
+ lines = []\r
+ file_lines = {}\r
+ last_file = '.'\r
+ file_lines[last_file] = []\r
+\r
+ for tmp_name in temp_file_dict:\r
+ temp_file_dict[tmp_name][-1] = self.normalize_file_name(temp_file_dict[tmp_name][-1], True)\r
+ if len(temp_file_dict[tmp_name]) > 1:\r
+ temp_file_dict[tmp_name][-2] = self.normalize_file_name(temp_file_dict[tmp_name][-2], True)\r
+\r
+ for tmp_name in bsf_temp_dict:\r
+ file = temp_file_dict[tmp_name][-1]\r
+ if last_file != file and len(temp_file_dict[tmp_name]) > 1:\r
+ inc_file = temp_file_dict[tmp_name][-2]\r
+ file_lines[inc_file].extend(['', '- !include %s' % temp_file_dict[tmp_name][-1], ''])\r
+ last_file = file\r
+ if file not in file_lines:\r
+ file_lines[file] = []\r
+ lines = file_lines[file]\r
+ text = bsf_temp_dict[tmp_name]\r
+ tmp_list = self.process_option_lines(text)\r
+ self.template_fixup(tmp_name, tmp_list)\r
+ template_dict[tmp_name] = tmp_list\r
+ lines.append('%s: >' % tmp_name)\r
+ lines.extend(self.output_dict(tmp_list, False)['.'])\r
+ lines.append('\n')\r
+ return file_lines\r
+\r
+ def output_config(self):\r
+ """\r
+ Output config block into a line list.\r
+ """\r
+ self.offset = 0\r
+ self.base_offset = 0\r
+ start, end = self.get_section_range('PcdsDynamicVpd.Upd')\r
+ cfgs = self.process_option_lines(self.gen_cfg_data._DscLines[start:end])\r
+ self.config_fixup(cfgs)\r
+ file_lines = self.output_dict(cfgs, True)\r
+ return file_lines\r
+\r
+ def output_dict(self, cfgs, is_configs):\r
+ """\r
+ Output one config item into a line list.\r
+ """\r
+ file_lines = {}\r
+ level = 0\r
+ file = '.'\r
+ for each in cfgs:\r
+ if 'length' in each and int(each['length'], 0) == 0:\r
+ continue\r
+\r
+ if 'include' in each:\r
+ if each['include']:\r
+ each['include'] = self.normalize_file_name(each['include'])\r
+ file_lines[file].extend(['', '- !include %s' % each['include'], ''])\r
+ file = each['include']\r
+ else:\r
+ file = '.'\r
+ continue\r
+\r
+ if file not in file_lines:\r
+ file_lines[file] = []\r
+\r
+ lines = file_lines[file]\r
+ name = each['cname']\r
+\r
+ prefix = name[0]\r
+ if prefix == '<':\r
+ level += 1\r
+\r
+ padding = ' ' * level\r
+ if prefix not in '<>@':\r
+ padding += ' '\r
+ else:\r
+ name = name[1:]\r
+ if prefix == '@':\r
+ padding += ' '\r
+\r
+ if ':' in name:\r
+ parts = name.split(':')\r
+ name = parts[0]\r
+\r
+ padding = padding[2:] if is_configs else padding\r
+\r
+ if prefix != '>':\r
+ if 'expand' in each:\r
+ lines.append('%s- %s' % (padding, each['expand']))\r
+ else:\r
+ lines.append('%s- %-12s :' % (padding, name))\r
+\r
+ for field in each:\r
+ if field in ['cname', 'expand', 'include']:\r
+ continue\r
+ value_str = self.format_value(field, each[field], padding + ' ' * 16)\r
+ full_line = ' %s %-12s : %s' % (padding, field, value_str)\r
+ lines.extend(full_line.splitlines())\r
+\r
+ if prefix == '>':\r
+ level -= 1\r
+ if level == 0:\r
+ lines.append('')\r
+\r
+ return file_lines\r
+\r
+\r
+def bsf_to_dsc(bsf_file, dsc_file):\r
+ fsp_dsc = CFspBsf2Dsc(bsf_file)\r
+ dsc_lines = fsp_dsc.get_dsc_lines()\r
+ fd = open(dsc_file, 'w')\r
+ fd.write('\n'.join(dsc_lines))\r
+ fd.close()\r
+ return\r
+\r
+\r
+def dsc_to_yaml(dsc_file, yaml_file):\r
+ dsc2yaml = CFspDsc2Yaml()\r
+ dsc2yaml.load_config_data_from_dsc(dsc_file)\r
+\r
+ cfgs = {}\r
+ for cfg in ['Template', 'Option']:\r
+ if cfg == 'Template':\r
+ file_lines = dsc2yaml.output_template()\r
+ else:\r
+ file_lines = dsc2yaml.output_config()\r
+ for file in file_lines:\r
+ lines = file_lines[file]\r
+ if file == '.':\r
+ cfgs[cfg] = lines\r
+ else:\r
+ if('/' in file or '\\' in file):\r
+ continue\r
+ file = os.path.basename(file)\r
+ fo = open(os.path.join(file), 'w')\r
+ fo.write(__copyright_tmp__ % (cfg, date.today().year) + '\n\n')\r
+ for line in lines:\r
+ fo.write(line + '\n')\r
+ fo.close()\r
+\r
+ variables = dsc2yaml.output_variable()\r
+ fo = open(yaml_file, 'w')\r
+ fo.write(__copyright_tmp__ % ('Default', date.today().year))\r
+ if len(variables) > 0:\r
+ fo.write('\n\nvariable:\n')\r
+ for line in variables:\r
+ fo.write(' ' + line + '\n')\r
+\r
+ fo.write('\n\ntemplate:\n')\r
+ for line in cfgs['Template']:\r
+ if line != '':\r
+ fo.write(' ' + line + '\n')\r
+\r
+ fo.write('\n\nconfigs:\n')\r
+ for line in cfgs['Option']:\r
+ if line != '':\r
+ fo.write(' ' + line + '\n')\r
+\r
+ fo.close()\r
+\r
+\r
+def get_fsp_name_from_path(bsf_file):\r
+ name = ''\r
+ parts = bsf_file.split(os.sep)\r
+ for part in parts:\r
+ if part.endswith('FspBinPkg'):\r
+ name = part[:-9]\r
+ break\r
+ if not name:\r
+ raise Exception('Could not get FSP name from file path!')\r
+ return name\r
+\r
+\r
+def usage():\r
+ print('\n'.join([\r
+ "FspDscBsf2Yaml Version 0.10",\r
+ "Usage:",\r
+ " FspDscBsf2Yaml BsfFile|DscFile YamlFile"\r
+ ]))\r
+\r
+\r
+def main():\r
+ #\r
+ # Parse the options and args\r
+ #\r
+ argc = len(sys.argv)\r
+ if argc < 3:\r
+ usage()\r
+ return 1\r
+\r
+ bsf_file = sys.argv[1]\r
+ yaml_file = sys.argv[2]\r
+ if os.path.isdir(yaml_file):\r
+ yaml_file = os.path.join(yaml_file, get_fsp_name_from_path(bsf_file) + '.yaml')\r
+\r
+ if bsf_file.endswith('.dsc'):\r
+ dsc_file = bsf_file\r
+ bsf_file = ''\r
+ else:\r
+ dsc_file = os.path.splitext(yaml_file)[0] + '.dsc'\r
+ bsf_to_dsc(bsf_file, dsc_file)\r
+\r
+ dsc_to_yaml(dsc_file, yaml_file)\r
+\r
+ print("'%s' was created successfully!" % yaml_file)\r
+\r
+ return 0\r
+\r
+\r
+if __name__ == '__main__':\r
+ sys.exit(main())\r
## @ GenCfgOpt.py\r
#\r
-# Copyright (c) 2014 - 2020, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2014 - 2021, Intel Corporation. All rights reserved.<BR>\r
# SPDX-License-Identifier: BSD-2-Clause-Patent\r
#\r
##\r
return Result\r
\r
class CGenCfgOpt:\r
- def __init__(self):\r
+ def __init__(self, Mode = ''):\r
self.Debug = False\r
self.Error = ''\r
-\r
+ self.Mode = Mode\r
self._GlobalDataDef = """\r
GlobalDataDef\r
SKUID = 0, "DEFAULT"\r
EndList\r
\r
"""\r
-\r
- self._BsfKeyList = ['FIND','NAME','HELP','TYPE','PAGE','OPTION','ORDER']\r
+ self._BsfKeyList = ['FIND','NAME','HELP','TYPE','PAGE', 'PAGES', 'BLOCK', 'OPTION','CONDITION','ORDER', 'MARKER', 'SUBT']\r
self._HdrKeyList = ['HEADER','STRUCT', 'EMBED', 'COMMENT']\r
self._BuidinOption = {'$EN_DIS' : 'EN_DIS'}\r
\r
self._MacroDict = {}\r
+ self._VarDict = {}\r
self._PcdsDict = {}\r
self._CfgBlkDict = {}\r
self._CfgPageDict = {}\r
+ self._BsfTempDict = {}\r
self._CfgItemList = []\r
+ self._DscLines = []\r
self._DscFile = ''\r
- self._FvDir = ''\r
+\r
self._MapVer = 0\r
self._DscTime = 0\r
\r
print ("INFO : Eval Ifdef [%s] : %s" % (Macro, Result))\r
return Result\r
\r
- def ExpandMacros (self, Input):\r
+ def ExpandMacros (self, Input, Preserve = False):\r
Line = Input\r
Match = re.findall("\$\(\w+\)", Input)\r
if Match:\r
else:\r
if self.Debug:\r
print ("WARN : %s is not defined" % Each)\r
- Line = Line.replace(Each, Each[2:-1])\r
+ if not Preserve:\r
+ Line = Line.replace(Each, Each[2:-1])\r
return Line\r
\r
def ExpandPcds (self, Input):\r
print ("INFO : Eval Express [%s] : %s" % (Expr, Result))\r
return Result\r
\r
+ def ValueToByteArray (self, ValueStr, Length):\r
+ Match = re.match("\{\s*FILE:(.+)\}", ValueStr)\r
+ if Match:\r
+ FileList = Match.group(1).split(',')\r
+ Result = bytearray()\r
+ for File in FileList:\r
+ File = File.strip()\r
+ BinPath = os.path.join(os.path.dirname(self._DscFile), File)\r
+ Result.extend(bytearray(open(BinPath, 'rb').read()))\r
+ else:\r
+ try:\r
+ Result = bytearray(self.ValueToList(ValueStr, Length))\r
+ except ValueError as e:\r
+ raise Exception ("Bytes in '%s' must be in range 0~255 !" % ValueStr)\r
+ if len(Result) < Length:\r
+ Result.extend(b'\x00' * (Length - len(Result)))\r
+ elif len(Result) > Length:\r
+ raise Exception ("Value '%s' is too big to fit into %d bytes !" % (ValueStr, Length))\r
+\r
+ return Result[:Length]\r
+\r
+ def ValueToList (self, ValueStr, Length):\r
+ if ValueStr[0] == '{':\r
+ Result = []\r
+ BinList = ValueStr[1:-1].split(',')\r
+ InBitField = False\r
+ LastInBitField = False\r
+ Value = 0\r
+ BitLen = 0\r
+ for Element in BinList:\r
+ InBitField = False\r
+ Each = Element.strip()\r
+ if len(Each) == 0:\r
+ pass\r
+ else:\r
+ if Each[0] in ['"', "'"]:\r
+ Result.extend(list(bytearray(Each[1:-1], 'utf-8')))\r
+ elif ':' in Each:\r
+ Match = re.match("(.+):(\d+)b", Each)\r
+ if Match is None:\r
+ raise Exception("Invald value list format '%s' !" % Each)\r
+ InBitField = True\r
+ CurrentBitLen = int(Match.group(2))\r
+ CurrentValue = ((self.EvaluateExpress(Match.group(1)) & (1<<CurrentBitLen) - 1)) << BitLen\r
+ else:\r
+ Result.append(self.EvaluateExpress(Each.strip()))\r
+ if InBitField:\r
+ Value += CurrentValue\r
+ BitLen += CurrentBitLen\r
+ if LastInBitField and ((not InBitField) or (Element == BinList[-1])):\r
+ if BitLen % 8 != 0:\r
+ raise Exception("Invald bit field length!")\r
+ Result.extend(Val2Bytes(Value, BitLen // 8))\r
+ Value = 0\r
+ BitLen = 0\r
+ LastInBitField = InBitField\r
+ elif ValueStr.startswith("'") and ValueStr.endswith("'"):\r
+ Result = Str2Bytes (ValueStr, Length)\r
+ elif ValueStr.startswith('"') and ValueStr.endswith('"'):\r
+ Result = Str2Bytes (ValueStr, Length)\r
+ else:\r
+ Result = Val2Bytes (self.EvaluateExpress(ValueStr), Length)\r
+ return Result\r
+\r
def FormatListValue(self, ConfigDict):\r
Struct = ConfigDict['struct']\r
if Struct not in ['UINT8','UINT16','UINT32','UINT64']:\r
self._DscFile = DscFile\r
self._FvDir = FvDir\r
\r
+ self._DscLines = []\r
+ self._BsfTempDict = {}\r
+\r
# Initial DSC time is parent DSC time.\r
self._DscTime = os.path.getmtime(DscFile)\r
\r
+ CfgDict = {}\r
+\r
IsDefSect = False\r
IsPcdSect = False\r
IsUpdSect = False\r
IsVpdSect = False\r
+ IsTmpSect = False\r
+\r
+ TemplateName = ''\r
\r
IfStack = []\r
ElifStack = []\r
Error = 0\r
ConfigDict = {}\r
\r
- DscFd = open(DscFile, "r")\r
- DscLines = DscFd.readlines()\r
- DscFd.close()\r
+\r
+ if type(DscFile) is list:\r
+ # it is DSC lines already\r
+ DscLines = DscFile\r
+ self._DscFile = '.'\r
+ else:\r
+ DscFd = open(DscFile, "r")\r
+ DscLines = DscFd.readlines()\r
+ DscFd.close()\r
+ self._DscFile = DscFile\r
+\r
+ SkipLines = 0\r
\r
MaxAlign = 32 #Default align to 32, but if there are 64 bit unit, align to 64\r
SizeAlign = 0 #record the struct max align\r
Base = 0 #Starting offset of sub-structure.\r
+\r
while len(DscLines):\r
DscLine = DscLines.pop(0).strip()\r
+ if SkipLines == 0:\r
+ self._DscLines.append (DscLine)\r
+ else:\r
+ SkipLines = SkipLines - 1\r
+ if len(DscLine) == 0:\r
+ continue\r
+\r
Handle = False\r
Match = re.match("^\[(.+)\]", DscLine)\r
if Match is not None:\r
IsPcdSect = False\r
IsVpdSect = False\r
IsUpdSect = False\r
- if Match.group(1).lower() == "Defines".lower():\r
+ IsTmpSect = False\r
+ SectionName = Match.group(1).lower()\r
+ if SectionName == "Defines".lower():\r
IsDefSect = True\r
- if (Match.group(1).lower() == "PcdsFeatureFlag".lower() or Match.group(1).lower() == "PcdsFixedAtBuild".lower()):\r
+ if (SectionName == "PcdsFeatureFlag".lower() or SectionName == "PcdsFixedAtBuild".lower()):\r
IsPcdSect = True\r
- elif Match.group(1).lower() == "PcdsDynamicVpd.Upd".lower():\r
+ elif SectionName == "PcdsDynamicVpd.Tmp".lower():\r
+ IsTmpSect = True\r
+ elif SectionName == "PcdsDynamicVpd.Upd".lower():\r
ConfigDict = {}\r
ConfigDict['header'] = 'ON'\r
ConfigDict['region'] = 'UPD'\r
ConfigDict['page'] = ''\r
ConfigDict['name'] = ''\r
ConfigDict['find'] = ''\r
+ ConfigDict['marker'] = ''\r
ConfigDict['struct'] = ''\r
ConfigDict['embed'] = ''\r
ConfigDict['comment'] = ''\r
ConfigDict['subreg'] = []\r
+ ConfigDict['condition'] = ''\r
+ ConfigDict['option'] = ''\r
IsUpdSect = True\r
Offset = 0\r
else:\r
- if IsDefSect or IsPcdSect or IsUpdSect or IsVpdSect:\r
- if re.match("^!else($|\s+#.+)", DscLine):\r
+ if IsDefSect or IsPcdSect or IsUpdSect or IsVpdSect or IsTmpSect:\r
+\r
+ Match = False if DscLine[0] != '!' else True\r
+ if Match:\r
+ Match = re.match("^!(else|endif|ifdef|ifndef|if|elseif|include)\s*(.+)?$", DscLine.split("#")[0])\r
+ Keyword = Match.group(1) if Match else ''\r
+ Remaining = Match.group(2) if Match else ''\r
+ Remaining = '' if Remaining is None else Remaining.strip()\r
+\r
+ if Keyword in ['if', 'elseif', 'ifdef', 'ifndef', 'include'] and not Remaining:\r
+ raise Exception ("ERROR: Expression is expected after '!if' or !elseif' for line '%s'" % DscLine)\r
+\r
+ if Keyword == 'else':\r
if IfStack:\r
IfStack[-1] = not IfStack[-1]\r
else:\r
- print("ERROR: No paired '!if' found for '!else' for line '%s'" % DscLine)\r
- raise SystemExit\r
- elif re.match("^!endif($|\s+#.+)", DscLine):\r
+ raise Exception ("ERROR: No paired '!if' found for '!else' for line '%s'" % DscLine)\r
+ elif Keyword == 'endif':\r
if IfStack:\r
IfStack.pop()\r
Level = ElifStack.pop()\r
if Level > 0:\r
del IfStack[-Level:]\r
else:\r
- print("ERROR: No paired '!if' found for '!endif' for line '%s'" % DscLine)\r
- raise SystemExit\r
- else:\r
- Result = False\r
- Match = re.match("!(ifdef|ifndef)\s+(.+)", DscLine)\r
- if Match:\r
- Result = self.EvaulateIfdef (Match.group(2))\r
- if Match.group(1) == 'ifndef':\r
- Result = not Result\r
- IfStack.append(Result)\r
+ raise Exception ("ERROR: No paired '!if' found for '!endif' for line '%s'" % DscLine)\r
+ elif Keyword == 'ifdef' or Keyword == 'ifndef':\r
+ Result = self.EvaulateIfdef (Remaining)\r
+ if Keyword == 'ifndef':\r
+ Result = not Result\r
+ IfStack.append(Result)\r
+ ElifStack.append(0)\r
+ elif Keyword == 'if' or Keyword == 'elseif':\r
+ Result = self.EvaluateExpress(Remaining)\r
+ if Keyword == "if":\r
ElifStack.append(0)\r
+ IfStack.append(Result)\r
+ else: #elseif\r
+ if IfStack:\r
+ IfStack[-1] = not IfStack[-1]\r
+ IfStack.append(Result)\r
+ ElifStack[-1] = ElifStack[-1] + 1\r
+ else:\r
+ raise Exception ("ERROR: No paired '!if' found for '!elif' for line '%s'" % DscLine)\r
+ else:\r
+ if IfStack:\r
+ Handle = reduce(lambda x,y: x and y, IfStack)\r
else:\r
- Match = re.match("!(if|elseif)\s+(.+)", DscLine.split("#")[0])\r
+ Handle = True\r
+ if Handle:\r
+ Match = re.match("!include\s+(.+)", DscLine)\r
if Match:\r
- Result = self.EvaluateExpress(Match.group(2))\r
- if Match.group(1) == "if":\r
- ElifStack.append(0)\r
- IfStack.append(Result)\r
- else: #elseif\r
- if IfStack:\r
- IfStack[-1] = not IfStack[-1]\r
- IfStack.append(Result)\r
- ElifStack[-1] = ElifStack[-1] + 1\r
- else:\r
- print("ERROR: No paired '!if' found for '!elif' for line '%s'" % DscLine)\r
- raise SystemExit\r
- else:\r
- if IfStack:\r
- Handle = reduce(lambda x,y: x and y, IfStack)\r
+ IncludeFilePath = Match.group(1)\r
+ IncludeFilePath = self.ExpandMacros(IncludeFilePath)\r
+ PackagesPath = os.getenv("PACKAGES_PATH")\r
+ if PackagesPath:\r
+ for PackagePath in PackagesPath.split(os.pathsep):\r
+ IncludeFilePathAbs = os.path.join(os.path.normpath(PackagePath), os.path.normpath(IncludeFilePath))\r
+ if os.path.exists(IncludeFilePathAbs):\r
+ IncludeDsc = open(IncludeFilePathAbs, "r")\r
+ break\r
else:\r
- Handle = True\r
- if Handle:\r
- Match = re.match("!include\s+(.+)", DscLine)\r
- if Match:\r
- IncludeFilePath = Match.group(1)\r
- IncludeFilePath = self.ExpandMacros(IncludeFilePath)\r
- PackagesPath = os.getenv("PACKAGES_PATH")\r
- if PackagesPath:\r
- for PackagePath in PackagesPath.split(os.pathsep):\r
- IncludeFilePathAbs = os.path.join(os.path.normpath(PackagePath), os.path.normpath(IncludeFilePath))\r
- if os.path.exists(IncludeFilePathAbs):\r
- IncludeDsc = open(IncludeFilePathAbs, "r")\r
- break\r
- else:\r
- IncludeDsc = open(IncludeFilePath, "r")\r
- if IncludeDsc == None:\r
- print("ERROR: Cannot open file '%s'" % IncludeFilePath)\r
- raise SystemExit\r
-\r
- # Update DscTime when newer DSC time found.\r
- CurrentDscTime = os.path.getmtime(os.path.realpath(IncludeDsc.name))\r
- if CurrentDscTime > self._DscTime:\r
- self._DscTime = CurrentDscTime\r
-\r
- NewDscLines = IncludeDsc.readlines()\r
- IncludeDsc.close()\r
- DscLines = NewDscLines + DscLines\r
- Offset = 0\r
- else:\r
- if DscLine.startswith('!'):\r
- print("ERROR: Unrecognized directive for line '%s'" % DscLine)\r
- raise SystemExit\r
+ IncludeDsc = open(IncludeFilePath, "r")\r
+ if IncludeDsc == None:\r
+ print("ERROR: Cannot open file '%s'" % IncludeFilePath)\r
+ raise SystemExit\r
+\r
+ # Update DscTime when newer DSC time found.\r
+ CurrentDscTime = os.path.getmtime(os.path.realpath(IncludeDsc.name))\r
+ if CurrentDscTime > self._DscTime:\r
+ self._DscTime = CurrentDscTime\r
+\r
+ NewDscLines = IncludeDsc.readlines()\r
+ IncludeDsc.close()\r
+ DscLines = NewDscLines + DscLines\r
+ del self._DscLines[-1]\r
+ Offset = 0\r
+ else:\r
+ if DscLine.startswith('!'):\r
+ print("ERROR: Unrecognized directive for line '%s'" % DscLine)\r
+ raise SystemExit\r
if not Handle:\r
+ del self._DscLines[-1]\r
continue\r
\r
if IsDefSect:\r
#DEFINE FSP_T_UPD_TOOL_GUID = 34686CA3-34F9-4901-B82A-BA630F0714C6\r
#DEFINE FSP_M_UPD_TOOL_GUID = 39A250DB-E465-4DD1-A2AC-E2BD3C0E2385\r
#DEFINE FSP_S_UPD_TOOL_GUID = CAE3605B-5B34-4C85-B3D7-27D54273C40F\r
- Match = re.match("^\s*(?:DEFINE\s+)*(\w+)\s*=\s*([/$()-.\w]+)", DscLine)\r
+ Match = re.match("^\s*(?:DEFINE\s+)*(\w+)\s*=\s*(.+)", DscLine)\r
if Match:\r
self._MacroDict[Match.group(1)] = self.ExpandMacros(Match.group(2))\r
if self.Debug:\r
if Match:\r
self._PcdsDict[Match.group(1)] = Match.group(2)\r
i += 1\r
+\r
+ elif IsTmpSect:\r
+ # !BSF DEFT:{GPIO_TMPL:START}\r
+ Match = re.match("^\s*#\s+(!BSF)\s+DEFT:{(.+?):(START|END)}", DscLine)\r
+ if Match:\r
+ if Match.group(3) == 'START' and not TemplateName:\r
+ TemplateName = Match.group(2).strip()\r
+ self._BsfTempDict[TemplateName] = []\r
+ if Match.group(3) == 'END' and (TemplateName == Match.group(2).strip()) and TemplateName:\r
+ TemplateName = ''\r
+ else:\r
+ if TemplateName:\r
+ Match = re.match("^!include\s*(.+)?$", DscLine)\r
+ if Match:\r
+ continue\r
+ self._BsfTempDict[TemplateName].append(DscLine)\r
+\r
else:\r
Match = re.match("^\s*#\s+(!BSF|@Bsf|!HDR)\s+(.+)", DscLine)\r
if Match:\r
Match = re.match("^\s*#\s*@ValidRange\s*(.+)\s*\|\s*(.+)\s*-\s*(.+)\s*", DscLine)\r
if Match:\r
if "0x" in Match.group(2) or "0x" in Match.group(3):\r
- ConfigDict['type'] = "EditNum, HEX, (%s,%s)" % (Match.group(2), Match.group(3))\r
+ ConfigDict['type'] = "EditNum, HEX, (%s,%s)" % (Match.group(2), Match.group(3))\r
else:\r
- ConfigDict['type'] = "EditNum, DEC, (%s,%s)" % (Match.group(2), Match.group(3))\r
+ ConfigDict['type'] = "EditNum, DEC, (%s,%s)" % (Match.group(2), Match.group(3))\r
\r
Match = re.match("^\s*##\s+(.+)", DscLine)\r
if Match:\r
ConfigDict['struct'] = ''\r
ConfigDict['embed'] = ''\r
ConfigDict['comment'] = ''\r
+ ConfigDict['marker'] = ''\r
ConfigDict['order'] = -1\r
ConfigDict['subreg'] = []\r
ConfigDict['option'] = ''\r
bitsvalue = bitsvalue[::-1]\r
bitslen = len(bitsvalue)\r
if start > bitslen or end > bitslen:\r
- print ("Invalid bits offset [%d,%d] for %s" % (start, end, subitem['name']))\r
- raise SystemExit\r
- return hex(int(bitsvalue[start:end][::-1], 2))\r
+ raise Exception ("Invalid bits offset [%d,%d] %d for %s" % (start, end, bitslen, subitem['name']))\r
+ return '0x%X' % (int(bitsvalue[start:end][::-1], 2))\r
\r
def UpdateSubRegionDefaultValue (self):\r
Error = 0\r
TxtFd.close()\r
return 0\r
\r
- def ProcessMultilines (self, String, MaxCharLength):\r
- Multilines = ''\r
- StringLength = len(String)\r
- CurrentStringStart = 0\r
- StringOffset = 0\r
- BreakLineDict = []\r
- if len(String) <= MaxCharLength:\r
- while (StringOffset < StringLength):\r
- if StringOffset >= 1:\r
- if String[StringOffset - 1] == '\\' and String[StringOffset] == 'n':\r
- BreakLineDict.append (StringOffset + 1)\r
- StringOffset += 1\r
- if BreakLineDict != []:\r
- for Each in BreakLineDict:\r
- Multilines += " %s\n" % String[CurrentStringStart:Each].lstrip()\r
- CurrentStringStart = Each\r
- if StringLength - CurrentStringStart > 0:\r
- Multilines += " %s\n" % String[CurrentStringStart:].lstrip()\r
+ def CreateVarDict (self):\r
+ Error = 0\r
+ self._VarDict = {}\r
+ if len(self._CfgItemList) > 0:\r
+ Item = self._CfgItemList[-1]\r
+ self._VarDict['_LENGTH_'] = '%d' % (Item['offset'] + Item['length'])\r
+ for Item in self._CfgItemList:\r
+ Embed = Item['embed']\r
+ Match = re.match("^(\w+):(\w+):(START|END)", Embed)\r
+ if Match:\r
+ StructName = Match.group(1)\r
+ VarName = '_%s_%s_' % (Match.group(3), StructName)\r
+ if Match.group(3) == 'END':\r
+ self._VarDict[VarName] = Item['offset'] + Item['length']\r
+ self._VarDict['_LENGTH_%s_' % StructName] = \\r
+ self._VarDict['_END_%s_' % StructName] - self._VarDict['_START_%s_' % StructName]\r
+ if Match.group(2).startswith('TAG_'):\r
+ if (self.Mode != 'FSP') and (self._VarDict['_LENGTH_%s_' % StructName] % 4):\r
+ raise Exception("Size of structure '%s' is %d, not DWORD aligned !" % (StructName, self._VarDict['_LENGTH_%s_' % StructName]))\r
+ self._VarDict['_TAG_%s_' % StructName] = int (Match.group(2)[4:], 16) & 0xFFF\r
else:\r
- Multilines = " %s\n" % String\r
+ self._VarDict[VarName] = Item['offset']\r
+ if Item['marker']:\r
+ self._VarDict['_OFFSET_%s_' % Item['marker'].strip()] = Item['offset']\r
+ return Error\r
+\r
+ def UpdateBsfBitUnit (self, Item):\r
+ BitTotal = 0\r
+ BitOffset = 0\r
+ StartIdx = 0\r
+ Unit = None\r
+ UnitDec = {1:'BYTE', 2:'WORD', 4:'DWORD', 8:'QWORD'}\r
+ for Idx, SubItem in enumerate(Item['subreg']):\r
+ if Unit is None:\r
+ Unit = SubItem['bitunit']\r
+ BitLength = SubItem['bitlength']\r
+ BitTotal += BitLength\r
+ BitOffset += BitLength\r
+\r
+ if BitOffset > 64 or BitOffset > Unit * 8:\r
+ break\r
+\r
+ if BitOffset == Unit * 8:\r
+ for SubIdx in range (StartIdx, Idx + 1):\r
+ Item['subreg'][SubIdx]['bitunit'] = Unit\r
+ BitOffset = 0\r
+ StartIdx = Idx + 1\r
+ Unit = None\r
+\r
+ if BitOffset > 0:\r
+ raise Exception ("Bit fields cannot fit into %s for '%s.%s' !" % (UnitDec[Unit], Item['cname'], SubItem['cname']))\r
+\r
+ ExpectedTotal = Item['length'] * 8\r
+ if Item['length'] * 8 != BitTotal:\r
+ raise Exception ("Bit fields total length (%d) does not match length (%d) of '%s' !" % (BitTotal, ExpectedTotal, Item['cname']))\r
+\r
+ def UpdateDefaultValue (self):\r
+ Error = 0\r
+ for Idx, Item in enumerate(self._CfgItemList):\r
+ if len(Item['subreg']) == 0:\r
+ Value = Item['value']\r
+ if (len(Value) > 0) and (Value[0] == '{' or Value[0] == "'" or Value[0] == '"'):\r
+ # {XXX} or 'XXX' strings\r
+ self.FormatListValue(self._CfgItemList[Idx])\r
+ else:\r
+ Match = re.match("(0x[0-9a-fA-F]+|[0-9]+)", Value)\r
+ if not Match:\r
+ NumValue = self.EvaluateExpress (Value)\r
+ Item['value'] = '0x%X' % NumValue\r
else:\r
- NewLineStart = 0\r
- NewLineCount = 0\r
- FoundSpaceChar = False\r
- while (StringOffset < StringLength):\r
- if StringOffset >= 1:\r
- if NewLineCount >= MaxCharLength - 1:\r
- if String[StringOffset] == ' ' and StringLength - StringOffset > 10:\r
- BreakLineDict.append (NewLineStart + NewLineCount)\r
- NewLineStart = NewLineStart + NewLineCount\r
- NewLineCount = 0\r
- FoundSpaceChar = True\r
- elif StringOffset == StringLength - 1 and FoundSpaceChar == False:\r
- BreakLineDict.append (0)\r
- if String[StringOffset - 1] == '\\' and String[StringOffset] == 'n':\r
- BreakLineDict.append (StringOffset + 1)\r
- NewLineStart = StringOffset + 1\r
+ ValArray = self.ValueToByteArray (Item['value'], Item['length'])\r
+ for SubItem in Item['subreg']:\r
+ SubItem['value'] = self.GetBsfBitFields(SubItem, ValArray)\r
+ self.UpdateBsfBitUnit (Item)\r
+ return Error\r
+\r
+ def ProcessMultilines (self, String, MaxCharLength):\r
+ Multilines = ''\r
+ StringLength = len(String)\r
+ CurrentStringStart = 0\r
+ StringOffset = 0\r
+ BreakLineDict = []\r
+ if len(String) <= MaxCharLength:\r
+ while (StringOffset < StringLength):\r
+ if StringOffset >= 1:\r
+ if String[StringOffset - 1] == '\\' and String[StringOffset] == 'n':\r
+ BreakLineDict.append (StringOffset + 1)\r
+ StringOffset += 1\r
+ if BreakLineDict != []:\r
+ for Each in BreakLineDict:\r
+ Multilines += " %s\n" % String[CurrentStringStart:Each].lstrip()\r
+ CurrentStringStart = Each\r
+ if StringLength - CurrentStringStart > 0:\r
+ Multilines += " %s\n" % String[CurrentStringStart:].lstrip()\r
+ else:\r
+ Multilines = " %s\n" % String\r
+ else:\r
+ NewLineStart = 0\r
+ NewLineCount = 0\r
+ FoundSpaceChar = False\r
+ while (StringOffset < StringLength):\r
+ if StringOffset >= 1:\r
+ if NewLineCount >= MaxCharLength - 1:\r
+ if String[StringOffset] == ' ' and StringLength - StringOffset > 10:\r
+ BreakLineDict.append (NewLineStart + NewLineCount)\r
+ NewLineStart = NewLineStart + NewLineCount\r
NewLineCount = 0\r
- StringOffset += 1\r
- NewLineCount += 1\r
- if BreakLineDict != []:\r
- BreakLineDict.sort ()\r
- for Each in BreakLineDict:\r
- if Each > 0:\r
- Multilines += " %s\n" % String[CurrentStringStart:Each].lstrip()\r
- CurrentStringStart = Each\r
- if StringLength - CurrentStringStart > 0:\r
- Multilines += " %s\n" % String[CurrentStringStart:].lstrip()\r
- return Multilines\r
-\r
- def CreateField (self, Item, Name, Length, Offset, Struct, BsfName, Help, Option):\r
+ FoundSpaceChar = True\r
+ elif StringOffset == StringLength - 1 and FoundSpaceChar == False:\r
+ BreakLineDict.append (0)\r
+ if String[StringOffset - 1] == '\\' and String[StringOffset] == 'n':\r
+ BreakLineDict.append (StringOffset + 1)\r
+ NewLineStart = StringOffset + 1\r
+ NewLineCount = 0\r
+ StringOffset += 1\r
+ NewLineCount += 1\r
+ if BreakLineDict != []:\r
+ BreakLineDict.sort ()\r
+ for Each in BreakLineDict:\r
+ if Each > 0:\r
+ Multilines += " %s\n" % String[CurrentStringStart:Each].lstrip()\r
+ CurrentStringStart = Each\r
+ if StringLength - CurrentStringStart > 0:\r
+ Multilines += " %s\n" % String[CurrentStringStart:].lstrip()\r
+ return Multilines\r
+\r
+ def CreateField (self, Item, Name, Length, Offset, Struct, BsfName, Help, Option, BitsLength = None):\r
PosName = 28\r
PosComment = 30\r
NameLine=''\r
HelpLine=''\r
OptionLine=''\r
\r
+ if Length == 0 and Name == 'Dummy':\r
+ return '\n'\r
+\r
IsArray = False\r
if Length in [1,2,4,8]:\r
Type = "UINT%d" % (Length * 8)\r
else:\r
OffsetStr = '0x%04X' % Offset\r
\r
- return "\n/** Offset %s%s%s%s**/\n %s%s%s;\n" % (OffsetStr, NameLine, HelpLine, OptionLine, Type, ' ' * Space1, Name,)\r
+ if BitsLength is None:\r
+ BitsLength = ''\r
+ else:\r
+ BitsLength = ' : %d' % BitsLength\r
+\r
+ return "\n/** Offset %s%s%s%s**/\n %s%s%s%s;\n" % (OffsetStr, NameLine, HelpLine, OptionLine, Type, ' ' * Space1, Name, BitsLength)\r
\r
def PostProcessBody (self, TextBody):\r
NewTextBody = []\r
UpdStructure = ['FSPT_UPD', 'FSPM_UPD', 'FSPS_UPD']\r
for Item in self._CfgItemList:\r
if Item["cname"] == 'Signature' and Item["value"][0:6] in UpdSignature:\r
+ Item["offset"] = 0 # re-initialize offset to 0 when new UPD structure starting\r
UpdOffsetTable.append (Item["offset"])\r
\r
for UpdIdx in range(len(UpdOffsetTable)):\r
--- /dev/null
+#ifndef __FSPUPD_H__\r
+#define __FSPUPD_H__\r
+\r
+#include <FspEas.h>\r
+\r
+#pragma pack(1)\r
+\r
+#define FSPT_UPD_SIGNATURE 0x545F4450554D4551 /* 'QEMUPD_T' */\r
+\r
+#define FSPM_UPD_SIGNATURE 0x4D5F4450554D4551 /* 'QEMUPD_M' */\r
+\r
+#define FSPS_UPD_SIGNATURE 0x535F4450554D4551 /* 'QEMUPD_S' */\r
+\r
+#pragma pack()\r
+\r
+#endif\r
--- /dev/null
+#ifndef __FSPMUPD_H__\r
+#define __FSPMUPD_H__\r
+\r
+#include <FspUpd.h>\r
+\r
+#pragma pack(1)\r
+\r
+\r
+/** Fsp M Configuration\r
+**/\r
+typedef struct {\r
+\r
+/** Offset 0x00C8 - Debug Serial Port Base address\r
+ Debug serial port base address. This option will be used only when the 'Serial Port\r
+ Debug Device' option is set to 'External Device'. 0x00000000(Default).\r
+**/\r
+ UINT32 SerialDebugPortAddress;\r
+\r
+/** Offset 0x00CC - Debug Serial Port Type\r
+ 16550 compatible debug serial port resource type. NONE means no serial port support.\r
+ 0x02:MMIO(Default).\r
+ 0:NONE, 1:I/O, 2:MMIO\r
+**/\r
+ UINT8 SerialDebugPortType;\r
+\r
+/** Offset 0x00CD - Serial Port Debug Device\r
+ Select active serial port device for debug.For SOC UART devices,'Debug Serial Port\r
+ Base' options will be ignored. 0x02:SOC UART2(Default).\r
+ 0:SOC UART0, 1:SOC UART1, 2:SOC UART2, 3:External Device\r
+**/\r
+ UINT8 SerialDebugPortDevice;\r
+\r
+/** Offset 0x00CE - Debug Serial Port Stride Size\r
+ Debug serial port register map stride size in bytes. 0x00:1, 0x02:4(Default).\r
+ 0:1, 2:4\r
+**/\r
+ UINT8 SerialDebugPortStrideSize;\r
+\r
+/** Offset 0x00CF\r
+**/\r
+ UINT8 UnusedUpdSpace2[1];\r
+\r
+/** Offset 0x00D0\r
+**/\r
+ UINT8 ReservedFspmUpd[4];\r
+} FSP_M_CONFIG;\r
+\r
+/** Fsp M UPD Configuration\r
+**/\r
+typedef struct {\r
+\r
+/** Offset 0x0000\r
+**/\r
+ FSP_UPD_HEADER FspUpdHeader;\r
+\r
+/** Offset 0x00A8\r
+**/\r
+ FSPM_ARCH_UPD FspmArchUpd;\r
+\r
+/** Offset 0x00C8\r
+**/\r
+ FSP_M_CONFIG FspmConfig;\r
+\r
+/** Offset 0x00D4\r
+**/\r
+ UINT8 UnusedUpdSpace3[2];\r
+\r
+/** Offset 0x00D6\r
+**/\r
+ UINT16 UpdTerminator;\r
+} FSPM_UPD;\r
+\r
+#pragma pack()\r
+\r
+#endif\r
--- /dev/null
+#ifndef __FSPSUPD_H__\r
+#define __FSPSUPD_H__\r
+\r
+#include <FspUpd.h>\r
+\r
+#pragma pack(1)\r
+\r
+\r
+/** Fsp S Configuration\r
+**/\r
+typedef struct {\r
+\r
+/** Offset 0x0118 - BMP Logo Data Size\r
+ BMP logo data buffer size. 0x00000000(Default).\r
+**/\r
+ UINT32 LogoSize;\r
+\r
+/** Offset 0x011C - BMP Logo Data Pointer\r
+ BMP logo data pointer to a BMP format buffer. 0x00000000(Default).\r
+**/\r
+ UINT32 LogoPtr;\r
+\r
+/** Offset 0x0120 - Graphics Configuration Data Pointer\r
+ Graphics configuration data used for initialization. 0x00000000(Default).\r
+**/\r
+ UINT32 GraphicsConfigPtr;\r
+\r
+/** Offset 0x0124 - PCI GFX Temporary MMIO Base\r
+ PCI Temporary PCI GFX Base used before full PCI enumeration. 0x80000000(Default).\r
+**/\r
+ UINT32 PciTempResourceBase;\r
+\r
+/** Offset 0x0128\r
+**/\r
+ UINT8 UnusedUpdSpace1[3];\r
+\r
+/** Offset 0x012B\r
+**/\r
+ UINT8 ReservedFspsUpd;\r
+} FSP_S_CONFIG;\r
+\r
+/** Fsp S UPD Configuration\r
+**/\r
+typedef struct {\r
+\r
+/** Offset 0x0000\r
+**/\r
+ FSP_UPD_HEADER FspUpdHeader;\r
+\r
+/** Offset 0x00F8\r
+**/\r
+ FSPS_ARCH_UPD FspsArchUpd;\r
+\r
+/** Offset 0x0118\r
+**/\r
+ FSP_S_CONFIG FspsConfig;\r
+\r
+/** Offset 0x012C\r
+**/\r
+ UINT8 UnusedUpdSpace2[2];\r
+\r
+/** Offset 0x012E\r
+**/\r
+ UINT16 UpdTerminator;\r
+} FSPS_UPD;\r
+\r
+#pragma pack()\r
+\r
+#endif\r
--- /dev/null
+#ifndef __FSPTUPD_H__\r
+#define __FSPTUPD_H__\r
+\r
+#include <FspUpd.h>\r
+\r
+#pragma pack(1)\r
+\r
+\r
+/** Fsp T Common UPD\r
+**/\r
+typedef struct {\r
+\r
+/** Offset 0x0040\r
+**/\r
+ UINT8 Revision;\r
+\r
+/** Offset 0x0041\r
+**/\r
+ UINT8 Reserved[3];\r
+\r
+/** Offset 0x0044\r
+**/\r
+ UINT32 MicrocodeRegionBase;\r
+\r
+/** Offset 0x0048\r
+**/\r
+ UINT32 MicrocodeRegionLength;\r
+\r
+/** Offset 0x004C\r
+**/\r
+ UINT32 CodeRegionBase;\r
+\r
+/** Offset 0x0050\r
+**/\r
+ UINT32 CodeRegionLength;\r
+\r
+/** Offset 0x0054\r
+**/\r
+ UINT8 Reserved1[12];\r
+} FSPT_COMMON_UPD;\r
+\r
+/** Fsp T Configuration\r
+**/\r
+typedef struct {\r
+\r
+/** Offset 0x0060 - Chicken bytes to test Hex config\r
+ This option shows how to present option for 4 bytes data\r
+**/\r
+ UINT32 ChickenBytes;\r
+\r
+/** Offset 0x0064\r
+**/\r
+ UINT8 ReservedFsptUpd1[28];\r
+} FSP_T_CONFIG;\r
+\r
+/** Fsp T UPD Configuration\r
+**/\r
+typedef struct {\r
+\r
+/** Offset 0x0000\r
+**/\r
+ FSP_UPD_HEADER FspUpdHeader;\r
+\r
+/** Offset 0x0020\r
+**/\r
+ FSPT_ARCH_UPD FsptArchUpd;\r
+\r
+/** Offset 0x0040\r
+**/\r
+ FSPT_COMMON_UPD FsptCommonUpd;\r
+\r
+/** Offset 0x0060\r
+**/\r
+ FSP_T_CONFIG FsptConfig;\r
+\r
+/** Offset 0x0080\r
+**/\r
+ UINT8 UnusedUpdSpace0[6];\r
+\r
+/** Offset 0x0086\r
+**/\r
+ UINT16 UpdTerminator;\r
+} FSPT_UPD;\r
+\r
+#pragma pack()\r
+\r
+#endif\r
--- /dev/null
+GlobalDataDef\r
+ SKUID = 0, "DEFAULT"\r
+EndGlobalData\r
+\r
+\r
+StructDef\r
+\r
+ Find "QEMUPD_T"\r
+ $gQemuFspPkgTokenSpaceGuid_Revision 1 bytes $_DEFAULT_ = 0x01\r
+ Skip 87 bytes\r
+ $gQemuFspPkgTokenSpaceGuid_ChickenBytes 4 bytes $_DEFAULT_ = 0x00000000\r
+\r
+ Find "QEMUPD_M"\r
+ $gQemuFspPkgTokenSpaceGuid_Revision 1 bytes $_DEFAULT_ = 0x01\r
+ Skip 35 bytes\r
+ $gQemuFspPkgTokenSpaceGuid_StackBase 4 bytes $_DEFAULT_ = 0x00070000\r
+ $gQemuFspPkgTokenSpaceGuid_StackSize 4 bytes $_DEFAULT_ = 0x00010000\r
+ $gQemuFspPkgTokenSpaceGuid_BootLoaderTolumSize 4 bytes $_DEFAULT_ = 0x00000000\r
+ $gPlatformFspPkgTokenSpaceGuid_Bootmode 4 bytes $_DEFAULT_ = 0x00000000\r
+ Skip 8 bytes\r
+ $gQemuFspPkgTokenSpaceGuid_SerialDebugPortAddress 4 bytes $_DEFAULT_ = 0x00000000\r
+ $gQemuFspPkgTokenSpaceGuid_SerialDebugPortType 1 bytes $_DEFAULT_ = 0x02\r
+ $gQemuFspPkgTokenSpaceGuid_SerialDebugPortDevice 1 bytes $_DEFAULT_ = 0x02\r
+ $gQemuFspPkgTokenSpaceGuid_SerialDebugPortStrideSize 1 bytes $_DEFAULT_ = 0x02\r
+\r
+ Find "QEMUPD_S"\r
+ $gQemuFspPkgTokenSpaceGuid_Revision 1 bytes $_DEFAULT_ = 0x01\r
+ Skip 55 bytes\r
+ $gQemuFspPkgTokenSpaceGuid_LogoSize 4 bytes $_DEFAULT_ = 0x00000000\r
+ $gQemuFspPkgTokenSpaceGuid_LogoPtr 4 bytes $_DEFAULT_ = 0x00000000\r
+ $gQemuFspPkgTokenSpaceGuid_GraphicsConfigPtr 4 bytes $_DEFAULT_ = 0x00000000\r
+ $gQemuFspPkgTokenSpaceGuid_PciTempResourceBase 4 bytes $_DEFAULT_ = 0x80000000\r
+\r
+EndStruct\r
+\r
+\r
+List &EN_DIS\r
+ Selection 0x1 , "Enabled"\r
+ Selection 0x0 , "Disabled"\r
+EndList\r
+\r
+List &gQemuFspPkgTokenSpaceGuid_SerialDebugPortType\r
+ Selection 0 , "NONE"\r
+ Selection 1 , "I/O"\r
+ Selection 2 , "MMIO"\r
+EndList\r
+\r
+List &gQemuFspPkgTokenSpaceGuid_SerialDebugPortDevice\r
+ Selection 0 , "SOC UART0"\r
+ Selection 1 , "SOC UART1"\r
+ Selection 2 , "SOC UART2"\r
+ Selection 3 , "External Device"\r
+EndList\r
+\r
+List &gQemuFspPkgTokenSpaceGuid_SerialDebugPortStrideSize\r
+ Selection 0 , "1"\r
+ Selection 2 , "4"\r
+EndList\r
+\r
+BeginInfoBlock\r
+ PPVer "0.1"\r
+ Description "QEMU Platform"\r
+EndInfoBlock\r
+\r
+Page "FSP T"\r
+ EditNum $gQemuFspPkgTokenSpaceGuid_ChickenBytes, "Chicken bytes to test Hex config", HEX,\r
+ Help "This option shows how to present option for 4 bytes data"\r
+ "Valid range: 0x00000000 ~ 0xFFFFFFFF"\r
+EndPage\r
+\r
+Page "FSP MemoryInit Settings"\r
+ EditNum $gQemuFspPkgTokenSpaceGuid_SerialDebugPortAddress, "Debug Serial Port Base address", HEX,\r
+ Help "Debug serial port base address. This option will be used only when the 'Serial Port Debug Device' option is set to 'External Device'. 0x00000000(Default)."\r
+ "Valid range: 0x00000000 ~ 0xFFFFFFFF"\r
+ Combo $gQemuFspPkgTokenSpaceGuid_SerialDebugPortType, "Debug Serial Port Type", &gQemuFspPkgTokenSpaceGuid_SerialDebugPortType,\r
+ Help "16550 compatible debug serial port resource type. NONE means no serial port support. 0x02:MMIO(Default)."\r
+ Combo $gQemuFspPkgTokenSpaceGuid_SerialDebugPortDevice, "Serial Port Debug Device", &gQemuFspPkgTokenSpaceGuid_SerialDebugPortDevice,\r
+ Help "Select active serial port device for debug.For SOC UART devices,'Debug Serial Port Base' options will be ignored. 0x02:SOC UART2(Default)."\r
+ Combo $gQemuFspPkgTokenSpaceGuid_SerialDebugPortStrideSize, "Debug Serial Port Stride Size", &gQemuFspPkgTokenSpaceGuid_SerialDebugPortStrideSize,\r
+ Help "Debug serial port register map stride size in bytes. 0x00:1, 0x02:4(Default)."\r
+EndPage\r
+\r
+Page "FSP SiliconInit Settings"\r
+ EditNum $gQemuFspPkgTokenSpaceGuid_PciTempResourceBase, "PCI GFX Temporary MMIO Base", HEX,\r
+ Help "PCI Temporary PCI GFX Base used before full PCI enumeration. 0x80000000(Default)."\r
+ "Valid range: 0x80000000 ~ 0xDFFFFFFF"\r
+EndPage\r
+\r
--- /dev/null
+variable:\r
+ PLATFORM_NAME : QemuFspPkg\r
+ PLATFORM_GUID : 1BEDB57A-7904-406e-8486-C89FC7FB39EE\r
+ PLATFORM_VERSION : 0.1\r
+ DSC_SPECIFICATION : 0x00010005\r
+ OUTPUT_DIRECTORY : Build/QemuFspPkg\r
+ SUPPORTED_ARCHITECTURES : IA32|X64\r
+ BUILD_TARGETS : DEBUG|RELEASE\r
+ SKUID_IDENTIFIER : DEFAULT\r
+ FLASH_DEFINITION : QemuFspPkg/QemuFspPkg.fdf\r
+ FSP_T_UPD_TOOL_GUID : 34686CA3-34F9-4901-B82A-BA630F0714C6\r
+ FSP_V_UPD_TOOL_GUID : 4E2F4725-734A-4399-BAF5-B4E16348EB2F\r
+ FSP_M_UPD_TOOL_GUID : 39A250DB-E465-4DD1-A2AC-E2BD3C0E2385\r
+ FSP_S_UPD_TOOL_GUID : CAE3605B-5B34-4C85-B3D7-27D54273C40F\r
+ FSP_T_UPD_FFS_GUID : 70BCF6A5-FFB1-47D8-B1AE-EFE5508E23EA\r
+ FSP_V_UPD_FFS_GUID : 0197EF5E-2FFC-4089-8E55-F70400B18146\r
+ FSP_M_UPD_FFS_GUID : D5B86AEA-6AF7-40D4-8014-982301BC3D89\r
+ FSP_S_UPD_FFS_GUID : E3CD9B18-998C-4F76-B65E-98B154E5446F\r
+ FSP_PACKAGE : QemuFspPkg\r
+ FSP_IMAGE_ID : 0x245053464D455124 # $QEMFSP$\r
+ FSP_IMAGE_REV : 0x00001010\r
+ CAR_BASE_ADDRESS : 0x00000000\r
+ CAR_REGION_SIZE : 0x00080000\r
+ CAR_BLD_REGION_SIZE : 0x00070000\r
+ CAR_FSP_REGION_SIZE : 0x00010000\r
+ FSP_ARCH : X64\r
+\r
+\r
+template:\r
+\r
+\r
+configs:\r
+ - $ACTION :\r
+ page : TMP::"FSP T", MEM::"FSP MemoryInit Settings", SIL::"FSP SiliconInit Settings"\r
+ - $ACTION :\r
+ find : QEMUPD_T\r
+ - FSPT_UPD :\r
+ - FSP_UPD_HEADER :\r
+ - Signature :\r
+ length : 0x08\r
+ value : 0x545F4450554D4551\r
+ - Revision :\r
+ name : FsptUpdRevision\r
+ length : 0x01\r
+ value : 0x01\r
+ - Reserved :\r
+ length : 0x17\r
+ value : {0x00}\r
+ - FSPT_ARCH_UPD :\r
+ - Revision :\r
+ length : 0x01\r
+ value : 0x01\r
+ - Reserved :\r
+ length : 0x03\r
+ value : {0x00}\r
+ - Length :\r
+ length : 0x04\r
+ value : 0x00000020\r
+ - FspDebugHandler :\r
+ length : 0x04\r
+ value : 0x00000000\r
+ - Reserved1 :\r
+ length : 0x14\r
+ value : {0x00}\r
+ - FSPT_COMMON_UPD :\r
+ - Revision :\r
+ length : 0x01\r
+ value : 0x01\r
+ - Reserved :\r
+ length : 0x03\r
+ value : {0x00}\r
+ - MicrocodeRegionBase :\r
+ length : 0x04\r
+ value : 0x00000000\r
+ - MicrocodeRegionLength :\r
+ length : 0x04\r
+ value : 0x00000000\r
+ - CodeRegionBase :\r
+ length : 0x04\r
+ value : 0x00000000\r
+ - CodeRegionLength :\r
+ length : 0x04\r
+ value : 0x00000000\r
+ - Reserved1 :\r
+ length : 0x0C\r
+ value : {0x00}\r
+ - FSP_T_CONFIG :\r
+ - $ACTION :\r
+ page : TMP\r
+ - ChickenBytes :\r
+ name : Chicken bytes to test Hex config\r
+ type : EditNum, HEX, (0x00000000,0xFFFFFFFF)\r
+ help : >\r
+ This option shows how to present option for 4 bytes data\r
+ length : 0x04\r
+ value : 0x00000000\r
+ - ReservedFsptUpd1 :\r
+ length : 0x1C\r
+ value : {0x00}\r
+ - UpdTerminator :\r
+ length : 0x02\r
+ value : 0x55AA\r
+ - $ACTION :\r
+ find : QEMUPD_M\r
+ - FSPM_UPD :\r
+ - FSP_UPD_HEADER :\r
+ - Signature :\r
+ length : 0x08\r
+ value : 0x4D5F4450554D4551\r
+ - Revision :\r
+ name : FspmUpdRevision\r
+ length : 0x01\r
+ value : 0x01\r
+ - Reserved :\r
+ length : 0x17\r
+ value : {0x00}\r
+ - FSPM_ARCH_UPD :\r
+ - Revision :\r
+ length : 0x01\r
+ value : 0x01\r
+ - Reserved :\r
+ length : 0x03\r
+ value : {0x00}\r
+ - NvsBufferPtr :\r
+ struct : VOID*\r
+ length : 0x04\r
+ value : 0x00000000\r
+ - StackBase :\r
+ struct : VOID*\r
+ name : StackBase\r
+ help : >\r
+ Stack base for FSP use. Default- 0xFEF16000\r
+ length : 0x04\r
+ value : $(CAR_BLD_REGION_SIZE)\r
+ - StackSize :\r
+ name : StackSize\r
+ help : >\r
+ To pass the stack size for FSP use. Bootloader can programmatically get the FSP requested StackSize by using the defaults in the FSP-M component. This is the minimum stack size expected by this revision of FSP. Default- 0x2A000\r
+ length : 0x04\r
+ value : $(CAR_FSP_REGION_SIZE)\r
+ - BootLoaderTolumSize :\r
+ name : BootLoaderTolumSize\r
+ help : >\r
+ To pass Bootloader Tolum size.\r
+ length : 0x04\r
+ value : 0x00000000\r
+ - Bootmode :\r
+ name : Bootmode\r
+ help : >\r
+ To maintain Bootmode details.\r
+ length : 0x04\r
+ value : 0x00000000\r
+ - Reserved1 :\r
+ length : 0x08\r
+ value : {0x00}\r
+ - FSP_M_CONFIG :\r
+ - $ACTION :\r
+ page : MEM\r
+ - SerialDebugPortAddress :\r
+ name : Debug Serial Port Base address\r
+ type : EditNum, HEX, (0x00000000,0xFFFFFFFF)\r
+ help : >\r
+ Debug serial port base address. This option will be used only when the 'Serial Port Debug Device'\r
+ option is set to 'External Device'. 0x00000000(Default).\r
+ length : 0x04\r
+ value : 0x00000000\r
+ - SerialDebugPortType :\r
+ name : Debug Serial Port Type\r
+ type : Combo\r
+ option : 0:NONE, 1:I/O, 2:MMIO\r
+ help : >\r
+ 16550 compatible debug serial port resource type. NONE means no serial port support. 0x02:MMIO(Default).\r
+ length : 0x01\r
+ value : 0x02\r
+ - SerialDebugPortDevice :\r
+ name : Serial Port Debug Device\r
+ type : Combo\r
+ option : 0:SOC UART0, 1:SOC UART1, 2:SOC UART2, 3:External Device\r
+ help : >\r
+ Select active serial port device for debug.\r
+ For SOC UART devices,'Debug Serial Port Base' options will be ignored. 0x02:SOC UART2(Default).\r
+ length : 0x01\r
+ value : 0x02\r
+ - SerialDebugPortStrideSize :\r
+ name : Debug Serial Port Stride Size\r
+ type : Combo\r
+ option : 0:1, 2:4\r
+ help : >\r
+ Debug serial port register map stride size in bytes. 0x00:1, 0x02:4(Default).\r
+ length : 0x01\r
+ value : 0x02\r
+ - ReservedFspmUpd :\r
+ length : 0x04\r
+ value : {0x00}\r
+ - UpdTerminator :\r
+ length : 0x02\r
+ value : 0x55AA\r
+ - $ACTION :\r
+ find : QEMUPD_S\r
+ - FSPS_UPD :\r
+ - FSP_UPD_HEADER :\r
+ - Signature :\r
+ length : 0x08\r
+ value : 0x535F4450554D4551\r
+ - Revision :\r
+ name : FspsUpdRevision\r
+ length : 0x01\r
+ value : 0x01\r
+ - Reserved :\r
+ length : 0x17\r
+ value : {0x00}\r
+ - FSPS_ARCH_UPD :\r
+ - Revision :\r
+ length : 0x01\r
+ value : 0x01\r
+ - Reserved :\r
+ length : 0x03\r
+ value : {0x00}\r
+ - Length :\r
+ length : 0x04\r
+ value : 0x00000020\r
+ - FspEventHandler :\r
+ length : 0x04\r
+ value : 0x00000000\r
+ - EnableMultiPhaseSiliconInit :\r
+ length : 0x01\r
+ value : 0x00\r
+ - Reserved1 :\r
+ length : 0x13\r
+ value : {0x00}\r
+ - FSP_S_CONFIG :\r
+ - $ACTION :\r
+ page : SIL\r
+ - LogoSize :\r
+ name : BMP Logo Data Size\r
+ type : Reserved\r
+ help : >\r
+ BMP logo data buffer size. 0x00000000(Default).\r
+ length : 0x04\r
+ value : 0x00000000\r
+ - LogoPtr :\r
+ name : BMP Logo Data Pointer\r
+ type : Reserved\r
+ help : >\r
+ BMP logo data pointer to a BMP format buffer. 0x00000000(Default).\r
+ length : 0x04\r
+ value : 0x00000000\r
+ - GraphicsConfigPtr :\r
+ name : Graphics Configuration Data Pointer\r
+ type : Reserved\r
+ help : >\r
+ Graphics configuration data used for initialization. 0x00000000(Default).\r
+ length : 0x04\r
+ value : 0x00000000\r
+ - PciTempResourceBase :\r
+ name : PCI GFX Temporary MMIO Base\r
+ type : EditNum, HEX, (0x80000000,0xDFFFFFFF)\r
+ help : >\r
+ PCI Temporary PCI GFX Base used before full PCI enumeration. 0x80000000(Default).\r
+ length : 0x04\r
+ value : 0x80000000\r
+ - ReservedFspsUpd :\r
+ length : 0x01\r
+ value : 0x00\r
+ - UpdTerminator :\r
+ length : 0x02\r
+ value : 0x55AA\r
--- /dev/null
+## @file\r
+# FSP DSC build file for QEMU platform\r
+#\r
+# Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.<BR>\r
+#\r
+# This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+##\r
+\r
+################################################################################\r
+#\r
+# Defines Section - statements that will be processed to create a Makefile.\r
+#\r
+################################################################################\r
+[Defines]\r
+ PLATFORM_NAME = QemuFspPkg\r
+ PLATFORM_GUID = 1BEDB57A-7904-406e-8486-C89FC7FB39EE\r
+ PLATFORM_VERSION = 0.1\r
+ DSC_SPECIFICATION = 0x00010005\r
+ OUTPUT_DIRECTORY = Build/QemuFspPkg\r
+ SUPPORTED_ARCHITECTURES = IA32|X64\r
+ BUILD_TARGETS = DEBUG|RELEASE\r
+ SKUID_IDENTIFIER = DEFAULT\r
+ FLASH_DEFINITION = QemuFspPkg/QemuFspPkg.fdf\r
+\r
+ #\r
+ # UPD tool definition\r
+ #\r
+ FSP_T_UPD_TOOL_GUID = 34686CA3-34F9-4901-B82A-BA630F0714C6\r
+ FSP_V_UPD_TOOL_GUID = 4E2F4725-734A-4399-BAF5-B4E16348EB2F\r
+ FSP_M_UPD_TOOL_GUID = 39A250DB-E465-4DD1-A2AC-E2BD3C0E2385\r
+ FSP_S_UPD_TOOL_GUID = CAE3605B-5B34-4C85-B3D7-27D54273C40F\r
+ FSP_T_UPD_FFS_GUID = 70BCF6A5-FFB1-47D8-B1AE-EFE5508E23EA\r
+ FSP_V_UPD_FFS_GUID = 0197EF5E-2FFC-4089-8E55-F70400B18146\r
+ FSP_M_UPD_FFS_GUID = D5B86AEA-6AF7-40D4-8014-982301BC3D89\r
+ FSP_S_UPD_FFS_GUID = E3CD9B18-998C-4F76-B65E-98B154E5446F\r
+\r
+ #\r
+ # Set platform specific package/folder name, same as passed from PREBUILD script.\r
+ # PLATFORM_PACKAGE would be the same as PLATFORM_NAME as well as package build folder\r
+ # DEFINE only takes effect at R9 DSC and FDF.\r
+ #\r
+ DEFINE FSP_PACKAGE = QemuFspPkg\r
+ DEFINE FSP_IMAGE_ID = 0x245053464D455124 # $QEMFSP$\r
+ DEFINE FSP_IMAGE_REV = 0x00001010\r
+\r
+ DEFINE CAR_BASE_ADDRESS = 0x00000000\r
+ DEFINE CAR_REGION_SIZE = 0x00080000\r
+ DEFINE CAR_BLD_REGION_SIZE = 0x00070000\r
+ DEFINE CAR_FSP_REGION_SIZE = 0x00010000\r
+\r
+ DEFINE FSP_ARCH = X64\r
+\r
+################################################################################\r
+#\r
+# SKU Identification section - list of all SKU IDs supported by this\r
+# Platform.\r
+#\r
+################################################################################\r
+[SkuIds]\r
+ 0|DEFAULT # The entry: 0|DEFAULT is reserved and always required.\r
+\r
+################################################################################\r
+#\r
+# Library Class section - list of all Library Classes needed by this Platform.\r
+#\r
+################################################################################\r
+\r
+[LibraryClasses]\r
+ PeiCoreEntryPoint|MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf\r
+ PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf\r
+ DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf\r
+ BaseLib|MdePkg/Library/BaseLib/BaseLib.inf\r
+ IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf\r
+ PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf\r
+ PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf\r
+ PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf\r
+ BaseMemoryLib|MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRepStr.inf\r
+ PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf\r
+ PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf\r
+ HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf\r
+ PeiServicesTablePointerLib|MdePkg/Library/PeiServicesTablePointerLibIdt/PeiServicesTablePointerLibIdt.inf\r
+ PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf\r
+ MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf\r
+ PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf\r
+ ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf\r
+ CacheMaintenanceLib|MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf\r
+ PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf\r
+ PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf\r
+ UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf\r
+ SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf\r
+ CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf\r
+ ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf\r
+ CacheLib|IntelFsp2Pkg/Library/BaseCacheLib/BaseCacheLib.inf\r
+ CacheAsRamLib|IntelFsp2Pkg/Library/BaseCacheAsRamLibNull/BaseCacheAsRamLibNull.inf\r
+ FspSwitchStackLib|IntelFsp2Pkg/Library/BaseFspSwitchStackLib/BaseFspSwitchStackLib.inf\r
+ FspCommonLib|IntelFsp2Pkg/Library/BaseFspCommonLib/BaseFspCommonLib.inf\r
+ FspPlatformLib|IntelFsp2Pkg/Library/BaseFspPlatformLib/BaseFspPlatformLib.inf\r
+ PlatformHookLib|MdeModulePkg/Library/BasePlatformHookLibNull/BasePlatformHookLibNull.inf\r
+ PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf\r
+ OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf\r
+ UefiCpuLib|UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf\r
+!if $(TARGET) == DEBUG\r
+ DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf\r
+ SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf\r
+!else\r
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf\r
+ SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf\r
+!endif\r
+\r
+\r
+################################################################################\r
+#\r
+# Pcd Section - list of all EDK II PCD Entries defined by this Platform\r
+#\r
+################################################################################\r
+[PcdsFixedAtBuild]\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdShadowPeimOnS3Boot | TRUE\r
+ gQemuFspPkgTokenSpaceGuid.PcdFspHeaderRevision | 0x03\r
+ gQemuFspPkgTokenSpaceGuid.PcdFspImageIdString | $(FSP_IMAGE_ID)\r
+ gQemuFspPkgTokenSpaceGuid.PcdFspImageRevision | $(FSP_IMAGE_REV)\r
+ #\r
+ # FSP CAR Usages (BL RAM | FSP RAM | FSP CODE)\r
+ #\r
+ gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase | $(CAR_BASE_ADDRESS)\r
+ gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize | $(CAR_REGION_SIZE)\r
+ gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize | $(CAR_FSP_REGION_SIZE)\r
+ gIntelFsp2PkgTokenSpaceGuid.PcdFspReservedBufferSize | 0x0100\r
+\r
+ # This defines how much space will be used for heap in FSP temporary memory\r
+ # x % of FSP temporary memory will be used for heap\r
+ # (100 - x) % of FSP temporary memory will be used for stack\r
+ gIntelFsp2PkgTokenSpaceGuid.PcdFspHeapSizePercentage | 65\r
+\r
+ # This is a platform specific global pointer used by FSP\r
+ gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress | 0xFED00148\r
+ gIntelFsp2PkgTokenSpaceGuid.PcdFspReservedMemoryLength | 0x00100000\r
+\r
+!if $(TARGET) == RELEASE\r
+ gEfiMdePkgTokenSpaceGuid.PcdFixedDebugPrintErrorLevel | 0x00000000\r
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask | 0\r
+!else\r
+ gEfiMdePkgTokenSpaceGuid.PcdFixedDebugPrintErrorLevel | 0x80000047\r
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask | 0x27\r
+!endif\r
+\r
+[PcdsPatchableInModule]\r
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress | 0xE0000000\r
+ #\r
+ # This entry will be patched during the build process\r
+ #\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress | 0x12345678\r
+\r
+!if $(TARGET) == RELEASE\r
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel | 0\r
+!else\r
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel | 0x80000047\r
+!endif\r
+\r
+[PcdsDynamicVpd.Upd]\r
+ #\r
+ # This section is not used by the normal build process\r
+ # However, FSP will use dedicated tool to handle it and generate a\r
+ # VPD similar binary block (User Configuration Data). This block will\r
+ # be accessed through a generated data structure directly rather than\r
+ # PCD services. This is for size consideration.\r
+ # Format:\r
+ # gQemuFspPkgTokenSpaceGuid.Updxxxxxxxxxxxxn | OFFSET | LENGTH | VALUE\r
+ # Only simple data type is supported\r
+ #\r
+\r
+ #\r
+ # Comments with !BSF will be used to generate BSF file\r
+ # Comments with !HDR will be used to generate H header file\r
+ #\r
+\r
+ # Global definitions in BSF\r
+ # !BSF PAGES:{TMP:"FSP T", MEM:"FSP MemoryInit Settings", SIL:"FSP SiliconInit Settings"}\r
+ # !BSF BLOCK:{NAME:"QEMU Platform", VER:"0.1"}\r
+\r
+ # !BSF FIND:{QEMUPD_T}\r
+ # !HDR COMMENT:{FSP_UPD_HEADER:FSP UPD Header}\r
+ # !HDR EMBED:{FSP_UPD_HEADER:FspUpdHeader:START}\r
+ # FsptUpdSignature: {QEMUPD_T}\r
+ gQemuFspPkgTokenSpaceGuid.Signature | * | 0x08 | 0x545F4450554D4551\r
+ # !BSF NAME:{FsptUpdRevision}\r
+ gQemuFspPkgTokenSpaceGuid.Revision | * | 0x01 | 0x01\r
+ # !HDR EMBED:{FSP_UPD_HEADER:FspUpdHeader:END}\r
+ gQemuFspPkgTokenSpaceGuid.Reserved | * | 0x17 | {0x00}\r
+\r
+ # !HDR COMMENT:{FSPT_ARCH_UPD:FSPT_ARCH_UPD}\r
+ # !HDR EMBED:{FSPT_ARCH_UPD:FsptArchUpd:START}\r
+ gQemuFspPkgTokenSpaceGuid.Revision | * | 0x01 | 0x01\r
+ gQemuFspPkgTokenSpaceGuid.Reserved | * | 0x03 | {0x00}\r
+ gQemuFspPkgTokenSpaceGuid.Length | * | 0x04 | 0x00000020\r
+ gQemuFspPkgTokenSpaceGuid.FspDebugHandler | * | 0x04 | 0x00000000\r
+ # !HDR EMBED:{FSPT_ARCH_UPD:FsptArchUpd:END}\r
+ gQemuFspPkgTokenSpaceGuid.Reserved1 | * | 0x14 | {0x00}\r
+\r
+ # !HDR COMMENT:{FSPT_COMMON_UPD:Fsp T Common UPD}\r
+ # !HDR EMBED:{FSPT_COMMON_UPD:FsptCommonUpd:START}\r
+ gQemuFspPkgTokenSpaceGuid.Revision | * | 0x01 | 0x01\r
+ gQemuFspPkgTokenSpaceGuid.Reserved | * | 0x03 | {0x00}\r
+\r
+ # Base address of the microcode region.\r
+ gQemuFspPkgTokenSpaceGuid.MicrocodeRegionBase | * | 0x04 | 0x00000000\r
+\r
+ # Length of the microcode region.\r
+ gQemuFspPkgTokenSpaceGuid.MicrocodeRegionLength | * | 0x04 | 0x00000000\r
+\r
+ # Base address of the cacheable flash region.\r
+ gQemuFspPkgTokenSpaceGuid.CodeRegionBase | * | 0x04 | 0x00000000\r
+\r
+ # Length of the cacheable flash region.\r
+ gQemuFspPkgTokenSpaceGuid.CodeRegionLength | * | 0x04 | 0x00000000\r
+\r
+ # !HDR EMBED:{FSPT_COMMON_UPD:FsptCommonUpd:END}\r
+ gQemuFspPkgTokenSpaceGuid.Reserved1 | * | 0x0C | {0x00}\r
+\r
+ # !HDR COMMENT:{FSP_T_CONFIG:Fsp T Configuration}\r
+ # !HDR EMBED:{FSP_T_CONFIG:FsptConfig:START}\r
+ # !BSF PAGE:{TMP}\r
+ # !BSF NAME:{Chicken bytes to test Hex config}\r
+ # !BSF TYPE:{EditNum, HEX, (0x00000000,0xFFFFFFFF)}\r
+ # !BSF HELP:{This option shows how to present option for 4 bytes data}\r
+ gQemuFspPkgTokenSpaceGuid.ChickenBytes | * | 0x04 | 0x00000000\r
+\r
+ # !HDR EMBED:{FSP_T_CONFIG:FsptConfig:END}\r
+ gQemuFspPkgTokenSpaceGuid.ReservedFsptUpd1 | * | 0x1C | {0x00}\r
+\r
+ # Note please keep "UpdTerminator" at the end of each UPD region.\r
+ # The tool will use this field to determine the actual end of the UPD data\r
+ # structure.\r
+ gQemuFspPkgTokenSpaceGuid.UpdTerminator | * | 0x02 | 0x55AA\r
+\r
+ ################################################################################\r
+ #\r
+ # UPDs consumed in FspMemoryInit Api\r
+ #\r
+ ################################################################################\r
+ # !BSF FIND:{QEMUPD_M}\r
+ # !HDR COMMENT:{FSP_UPD_HEADER:FSP UPD Header}\r
+ # !HDR EMBED:{FSP_UPD_HEADER:FspUpdHeader:START}\r
+ # FspmUpdSignature: {QEMUPD_M}\r
+ gQemuFspPkgTokenSpaceGuid.Signature | * | 0x08 | 0x4D5F4450554D4551\r
+ # !BSF NAME:{FspmUpdRevision}\r
+ gQemuFspPkgTokenSpaceGuid.Revision | * | 0x01 | 0x01\r
+ # !HDR EMBED:{FSP_UPD_HEADER:FspUpdHeader:END}\r
+ gQemuFspPkgTokenSpaceGuid.Reserved | * | 0x17 | {0x00}\r
+\r
+ # !HDR COMMENT:{FSPM_ARCH_UPD:Fsp M Architectural UPD}\r
+ # !HDR EMBED:{FSPM_ARCH_UPD:FspmArchUpd:START}\r
+\r
+ gQemuFspPkgTokenSpaceGuid.Revision | * | 0x01 | 0x01\r
+\r
+ gQemuFspPkgTokenSpaceGuid.Reserved | * | 0x03 | {0x00}\r
+\r
+ # !HDR STRUCT:{VOID*}\r
+ gQemuFspPkgTokenSpaceGuid.NvsBufferPtr | * | 0x04 | 0x00000000\r
+\r
+ # !HDR STRUCT:{VOID*}\r
+ # !BSF NAME:{StackBase}\r
+ # !BSF HELP:{Stack base for FSP use. Default: 0xFEF16000}\r
+ gQemuFspPkgTokenSpaceGuid.StackBase | * | 0x04 | $(CAR_BLD_REGION_SIZE)\r
+\r
+ # !BSF NAME:{StackSize}\r
+ # !BSF HELP:{To pass the stack size for FSP use. Bootloader can programmatically get the FSP requested StackSize by using the defaults in the FSP-M component. This is the minimum stack size expected by this revision of FSP. Default: 0x2A000}\r
+ gQemuFspPkgTokenSpaceGuid.StackSize | * | 0x04 | $(CAR_FSP_REGION_SIZE)\r
+\r
+ # !BSF NAME:{BootLoaderTolumSize}\r
+ # !BSF HELP:{To pass Bootloader Tolum size.}\r
+ gQemuFspPkgTokenSpaceGuid.BootLoaderTolumSize | * | 0x04 | 0x00000000\r
+\r
+ # !BSF NAME:{Bootmode}\r
+ # !BSF HELP:{To maintain Bootmode details.}\r
+ gPlatformFspPkgTokenSpaceGuid.Bootmode | * | 0x04 | 0x00000000\r
+\r
+ # !HDR EMBED:{FSPM_ARCH_UPD:FspmArchUpd:END}\r
+ gQemuFspPkgTokenSpaceGuid.Reserved1 | * | 0x08 | {0x00}\r
+\r
+ # !HDR COMMENT:{FSP_M_CONFIG:Fsp M Configuration}\r
+ # !HDR EMBED:{FSP_M_CONFIG:FspmConfig:START}\r
+ # !BSF PAGE:{MEM}\r
+ # !BSF NAME:{Debug Serial Port Base address}\r
+ # !BSF TYPE:{EditNum, HEX, (0x00000000,0xFFFFFFFF)}\r
+ # !BSF HELP:{Debug serial port base address. This option will be used only when the 'Serial Port Debug Device'}\r
+ # !BSF HELP:{+ option is set to 'External Device'. 0x00000000(Default).}\r
+ gQemuFspPkgTokenSpaceGuid.SerialDebugPortAddress | * | 0x04 | 0x00000000\r
+\r
+ # !BSF NAME:{Debug Serial Port Type} TYPE:{Combo}\r
+ # !BSF OPTION:{0:NONE, 1:I/O, 2:MMIO}\r
+ # !BSF HELP:{16550 compatible debug serial port resource type. NONE means no serial port support. 0x02:MMIO(Default).}\r
+ gQemuFspPkgTokenSpaceGuid.SerialDebugPortType | * | 0x01 | 0x02\r
+\r
+ # !BSF NAME:{Serial Port Debug Device} TYPE:{Combo}\r
+ # !BSF OPTION:{0:SOC UART0, 1:SOC UART1, 2:SOC UART2, 3:External Device}\r
+ # !BSF HELP:{Select active serial port device for debug.}\r
+ # !BSF HELP:{+For SOC UART devices,'Debug Serial Port Base' options will be ignored. 0x02:SOC UART2(Default).}\r
+ gQemuFspPkgTokenSpaceGuid.SerialDebugPortDevice | * | 0x01 | 0x02\r
+\r
+ # !BSF NAME:{Debug Serial Port Stride Size} TYPE:{Combo}\r
+ # !BSF OPTION:{0:1, 2:4}\r
+ # !BSF HELP:{Debug serial port register map stride size in bytes. 0x00:1, 0x02:4(Default).}\r
+ gQemuFspPkgTokenSpaceGuid.SerialDebugPortStrideSize | * | 0x01 | 0x02\r
+\r
+\r
+ # !HDR EMBED:{FSP_M_CONFIG:FspmConfig:END}\r
+ gQemuFspPkgTokenSpaceGuid.ReservedFspmUpd | * | 0x04 | {0x00}\r
+\r
+\r
+ # Note please keep "UpdTerminator" at the end of each UPD region.\r
+ # The tool will use this field to determine the actual end of the UPD data\r
+ # structure.\r
+ gQemuFspPkgTokenSpaceGuid.UpdTerminator | * | 0x02 | 0x55AA\r
+\r
+ ################################################################################\r
+ #\r
+ # UPDs consumed in FspSiliconInit Api\r
+ #\r
+ ################################################################################\r
+ # !BSF FIND:{QEMUPD_S}\r
+ # !HDR COMMENT:{FSP_UPD_HEADER:FSP UPD Header}\r
+ # !HDR EMBED:{FSP_UPD_HEADER:FspUpdHeader:START}\r
+ # FspsUpdSignature: {QEMUPD_S}\r
+ gQemuFspPkgTokenSpaceGuid.Signature | * | 0x08 | 0x535F4450554D4551\r
+ # !BSF NAME:{FspsUpdRevision}\r
+ gQemuFspPkgTokenSpaceGuid.Revision | * | 0x01 | 0x01\r
+ # !HDR EMBED:{FSP_UPD_HEADER:FspUpdHeader:END}\r
+ gQemuFspPkgTokenSpaceGuid.Reserved | * | 0x17 | {0x00}\r
+\r
+ # !HDR COMMENT:{FSPS_ARCH_UPD:FSPS_ARCH_UPD}\r
+ # !HDR EMBED:{FSPS_ARCH_UPD:FspsArchUpd:START}\r
+ gQemuFspPkgTokenSpaceGuid.Revision | * | 0x01 | 0x01\r
+ gQemuFspPkgTokenSpaceGuid.Reserved | * | 0x03 | {0x00}\r
+ gQemuFspPkgTokenSpaceGuid.Length | * | 0x04 | 0x00000020\r
+ gQemuFspPkgTokenSpaceGuid.FspEventHandler | * | 0x04 | 0x00000000\r
+ gQemuFspPkgTokenSpaceGuid.EnableMultiPhaseSiliconInit | * | 0x01 | 0x00\r
+ # !HDR EMBED:{FSPS_ARCH_UPD:FspsArchUpd:END}\r
+ gQemuFspPkgTokenSpaceGuid.Reserved1 | * | 0x13 | {0x00}\r
+\r
+ # !HDR COMMENT:{FSP_S_CONFIG:Fsp S Configuration}\r
+ # !HDR EMBED:{FSP_S_CONFIG:FspsConfig:START}\r
+ # !BSF PAGE:{SIL}\r
+\r
+ # !BSF NAME:{BMP Logo Data Size}\r
+ # !BSF TYPE:{Reserved}\r
+ # !BSF HELP:{BMP logo data buffer size. 0x00000000(Default).}\r
+ gQemuFspPkgTokenSpaceGuid.LogoSize | * | 0x04 | 0x00000000\r
+\r
+ # !BSF NAME:{BMP Logo Data Pointer}\r
+ # !BSF TYPE:{Reserved}\r
+ # !BSF HELP:{BMP logo data pointer to a BMP format buffer. 0x00000000(Default).}\r
+ gQemuFspPkgTokenSpaceGuid.LogoPtr | * | 0x04 | 0x00000000\r
+\r
+ # !BSF NAME:{Graphics Configuration Data Pointer}\r
+ # !BSF TYPE:{Reserved}\r
+ # !BSF HELP:{Graphics configuration data used for initialization. 0x00000000(Default).}\r
+ gQemuFspPkgTokenSpaceGuid.GraphicsConfigPtr | * | 0x04 | 0x00000000\r
+\r
+ # !BSF NAME:{PCI GFX Temporary MMIO Base}\r
+ # !BSF TYPE:{EditNum, HEX, (0x80000000,0xDFFFFFFF)}\r
+ # !BSF HELP:{PCI Temporary PCI GFX Base used before full PCI enumeration. 0x80000000(Default).}\r
+ gQemuFspPkgTokenSpaceGuid.PciTempResourceBase | * | 0x04 | 0x80000000\r
+\r
+ # !HDR EMBED:{FSP_S_CONFIG:FspsConfig:END}\r
+ gQemuFspPkgTokenSpaceGuid.ReservedFspsUpd | * | 0x01 | 0x00\r
+\r
+ # Note please keep "UpdTerminator" at the end of each UPD region.\r
+ # The tool will use this field to determine the actual end of the UPD data\r
+ # structure.\r
+ gQemuFspPkgTokenSpaceGuid.UpdTerminator | * | 0x02 | 0x55AA\r
+\r
+###################################################################################################\r
+#\r
+# Components Section - list of the modules and components that will be processed by compilation\r
+# tools and the EDK II tools to generate PE32/PE32+/Coff image files.\r
+#\r
+# Note: The EDK II DSC file is not used to specify how compiled binary images get placed\r
+# into firmware volume images. This section is just a list of modules to compile from\r
+# source into UEFI-compliant binaries.\r
+# It is the FDF file that contains information on combining binary files into firmware\r
+# volume images, whose concept is beyond UEFI and is described in PI specification.\r
+# Binary modules do not need to be listed in this section, as they should be\r
+# specified in the FDF file. For example: Shell binary (Shell_Full.efi), FAT binary (Fat.efi),\r
+# Logo (Logo.bmp), and etc.\r
+# There may also be modules listed in this section that are not required in the FDF file,\r
+# When a module listed here is excluded from FDF file, then UEFI-compliant binary will be\r
+# generated for it, but the binary will not be put into any firmware volume.\r
+#\r
+###################################################################################################\r
+[Components.IA32]\r
+ #\r
+ # FSP Binary Components\r
+ #\r
+ $(FSP_PACKAGE)/FspHeader/FspHeader.inf\r
+\r
+ #\r
+ # SEC\r
+ #\r
+ IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf {\r
+ <LibraryClasses>\r
+ FspSecPlatformLib|$(FSP_PACKAGE)/Library/PlatformSecLib/Vtf0PlatformSecTLib.inf\r
+ }\r
+\r
+[Components.$(FSP_ARCH)]\r
+ IntelFsp2Pkg/FspSecCore/FspSecCoreV.inf {\r
+ <LibraryClasses>\r
+ FspSecPlatformLib|$(FSP_PACKAGE)/Library/PlatformSecLib/Vtf0PlatformSecVLib.inf\r
+ }\r
+\r
+ IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf {\r
+ <LibraryClasses>\r
+ FspSecPlatformLib|$(FSP_PACKAGE)/Library/PlatformSecLib/Vtf0PlatformSecMLib.inf\r
+ }\r
+\r
+ IntelFsp2Pkg/FspSecCore/FspSecCoreS.inf {\r
+ <LibraryClasses>\r
+ FspSecPlatformLib|$(FSP_PACKAGE)/Library/PlatformSecLib/Vtf0PlatformSecSLib.inf\r
+ }\r
+\r
+ #\r
+ # PEI Core\r
+ #\r
+ MdeModulePkg/Core/Pei/PeiMain.inf\r
+\r
+ #\r
+ # PCD\r
+ #\r
+ MdeModulePkg/Universal/PCD/Pei/Pcd.inf {\r
+ <LibraryClasses>\r
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf\r
+ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf\r
+ }\r
+\r
+ $(FSP_PACKAGE)/FspvInit/FspvInit.inf\r
+ $(FSP_PACKAGE)/FspmInit/FspmInit.inf\r
+ $(FSP_PACKAGE)/FspsInit/FspsInit.inf\r
+ $(FSP_PACKAGE)/QemuVideo/QemuVideo.inf\r
+ MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {\r
+ <LibraryClasses>\r
+ DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf\r
+ ResetSystemLib|MdeModulePkg/Library/BaseResetSystemLibNull/BaseResetSystemLibNull.inf\r
+ }\r
+ IntelFsp2Pkg/FspNotifyPhase/FspNotifyPhasePeim.inf\r
+\r
+###################################################################################################\r
+#\r
+# BuildOptions Section - Define the module specific tool chain flags that should be used as\r
+# the default flags for a module. These flags are appended to any\r
+# standard flags that are defined by the build process. They can be\r
+# applied for any modules or only those modules with the specific\r
+# module style (EDK or EDKII) specified in [Components] section.\r
+#\r
+###################################################################################################\r
+[BuildOptions]\r
+# Append build options for EDK and EDKII drivers (= is Append, == is Replace)\r
+ # Enable link-time optimization when building with GCC49\r
+ *_GCC49_IA32_CC_FLAGS = -flto\r
+ *_GCC49_IA32_DLINK_FLAGS = -flto\r
+ *_GCC5_IA32_CC_FLAGS = -fno-pic\r
+ *_GCC5_IA32_DLINK_FLAGS = -no-pie\r
+ *_GCC5_IA32_ASLCC_FLAGS = -fno-pic\r
+ *_GCC5_IA32_ASLDLINK_FLAGS = -no-pie\r
--- /dev/null
+# @file\r
+# Split a file into two pieces at the request offset.\r
+#\r
+# Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>\r
+#\r
+# SPDX-License-Identifier: BSD-2-Clause-Patent\r
+#\r
+##\r
+\r
+# Import Modules\r
+import unittest\r
+import tempfile\r
+import os\r
+import shutil\r
+import struct as st\r
+import filecmp\r
+\r
+import os, sys\r
+currentdir = os.path.dirname(os.path.realpath(__file__))\r
+parentdir = os.path.dirname(currentdir)\r
+sys.path.append(parentdir)\r
+import FspDscBsf2Yaml\r
+\r
+YamlHeaderLineLength = 10\r
+HdrFileHeaderLineLength = 32\r
+BsfFileHeaderLineLength = 19\r
+\r
+def GenFileWithoutHdr(inputfile, numLineToStrip):\r
+ yaml_file = open(inputfile, "r")\r
+ lines = yaml_file.readlines()\r
+ yaml_file.close()\r
+ del lines[:numLineToStrip]\r
+\r
+ noHdrOutputFileName = "no-header-" + inputfile\r
+ stripped_file = open(noHdrOutputFileName, "w")\r
+ for line in lines:\r
+ stripped_file.write(line)\r
+ stripped_file.close()\r
+ return noHdrOutputFileName\r
+\r
+class TestFspScripts(unittest.TestCase):\r
+ def test_generateFspHeader_fromDsc(self):\r
+ # Generate HEADER\r
+ cmd = '{} {} HEADER {} {} {}'.format(\r
+ 'python',\r
+ '..\GenCfgOpt.py',\r
+ 'QemuFspPkg.dsc',\r
+ '.',\r
+ "")\r
+ os.system(cmd)\r
+ noHdrOutputFileName = GenFileWithoutHdr("FspUpd.h", HdrFileHeaderLineLength)\r
+ self.assertTrue(filecmp.cmp(noHdrOutputFileName,\r
+ 'ExpectedFspUpd.h'))\r
+\r
+ def test_generateFspsHeader_fromDsc(self):\r
+ noHdrOutputFileName = GenFileWithoutHdr("FspsUpd.h", HdrFileHeaderLineLength)\r
+ self.assertTrue(filecmp.cmp(noHdrOutputFileName,\r
+ 'ExpectedFspsUpd.h'))\r
+\r
+ def test_generateFsptHeader_fromDsc(self):\r
+ noHdrOutputFileName = GenFileWithoutHdr("FsptUpd.h", HdrFileHeaderLineLength)\r
+ self.assertTrue(filecmp.cmp(noHdrOutputFileName,\r
+ 'ExpectedFsptUpd.h'))\r
+\r
+ def test_generateFspmHeader_fromDsc(self):\r
+ noHdrOutputFileName = GenFileWithoutHdr("FspmUpd.h", HdrFileHeaderLineLength)\r
+ self.assertTrue(filecmp.cmp(noHdrOutputFileName,\r
+ 'ExpectedFspmUpd.h'))\r
+\r
+ def test_generateBsf_fromDsc(self):\r
+ # Generate BSF\r
+ cmd = '{} {} GENBSF {} {} {}'.format(\r
+ 'python',\r
+ '..\GenCfgOpt.py',\r
+ 'QemuFspPkg.dsc',\r
+ '.',\r
+ "Output.bsf")\r
+ os.system(cmd)\r
+ noHdrOutputFileName = GenFileWithoutHdr("Output.bsf", BsfFileHeaderLineLength)\r
+ self.assertTrue(filecmp.cmp(noHdrOutputFileName,\r
+ 'ExpectedOutput.bsf'))\r
+\r
+ def test_generateYaml_fromDsc(self):\r
+ # Generate YAML\r
+ cmd = '{} {} {} {}'.format(\r
+ 'python',\r
+ '..\FspDscBsf2Yaml.py',\r
+ 'QemuFspPkg.dsc',\r
+ "Output.yaml")\r
+ os.system(cmd)\r
+ noHdrOutputFileName = GenFileWithoutHdr("Output.yaml", YamlHeaderLineLength)\r
+ self.assertTrue(filecmp.cmp(noHdrOutputFileName,\r
+ 'ExpectedOutput.yaml'))\r
+\r
+if __name__ == '__main__':\r
+ unittest.main()\r
--- /dev/null
+#Name\r
+**FspDscBsf2Yaml.py** The python script that generates YAML file for\r
+the Boot Settings from an EDK II Platform Description (**DSC**) file\r
+or from a Boot Settings File (**BSF**). It is created to help\r
+transitioning FSP Updateable Product Data (**UPD**) file format to\r
+new standardized YAML format so that it can be configured through\r
+open source tools.\r
+\r
+#Synopsis\r
+```\r
+FspDscBsf2Yaml DscFile|BsfFile YamlFile\r
+```\r
+\r
+#Description\r
+**FspDscBsf2Yaml.py** is a script that generates configuration options from an\r
+**EDK II Platform Description (DSC)** file or **a Boot Settings File (BSF)** file.\r
+\r
+It generates a **YAML file** that can be used by the **Config Editor** to provide\r
+a graphical user interface for manipulating settings in the UPD regions.\r
+\r
+The following sections explain the usage of this script.\r
+\r
+## 1. FspDscBsf2Yaml.py DscFile YamlFile\r
+\r
+The **DscFile** option is an input DSC file.\r
+\r
+The **YamlFile** option is an output YAML file.\r
+\r
+The script takes the FSP DSC file consisting BSF syntax and generates a YAML\r
+output file describing the boot settings.\r
+\r
+## 2. FspDscBsf2Yaml.py BsfFile YamlFile\r
+\r
+The **BsfFile** option is an input BSF file.\r
+\r
+The **YamlFile** option is an output YAML file.\r
+\r
+The script generates a YAML output file from a BSF file. The BSF file\r
+can be generated using GenCfgOpt tool.\r