\r
// ID_AA64PFR0 - AArch64 Processor Feature Register 0 definitions\r
#define AARCH64_PFR0_FP (0xF << 16)\r
+#define AARCH64_PFR0_GIC (0xF << 24)\r
\r
// SCR - Secure Configuration Register definitions\r
#define SCR_NS (1 << 0)\r
// ARM Interrupt ID in Exception Table\r
#define ARM_ARCH_EXCEPTION_IRQ EXCEPT_ARM_IRQ\r
\r
+// ID_PFR1 - ARM Processor Feature Register 1 definitions\r
+#define ARM_PFR1_SEC (0xFUL << 4)\r
+#define ARM_PFR1_TIMER (0xFUL << 16)\r
+#define ARM_PFR1_GIC (0xFUL << 28)\r
+\r
// Domain Access Control Register\r
#define DOMAIN_ACCESS_CONTROL_MASK(a) (3UL << (2 * (a)))\r
#define DOMAIN_ACCESS_CONTROL_NONE(a) (0UL << (2 * (a)))\r
/** @file\r
Generic ARM implementation of TimerLib.h\r
\r
- Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r
- \r
+ Copyright (c) 2011-2014, ARM Limited. All rights reserved.\r
+\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
#ifdef MDE_CPU_ARM\r
// Only set the frequency for ARMv7. We expect the secure firmware to have already do it\r
// If the security extensions are not implemented set Timer Frequency\r
- if ((ArmReadIdPfr1 () & 0xF0) == 0x0) {\r
+ if ((ArmReadIdPfr1 () & ARM_PFR1_SEC) == 0x0) {\r
ArmArchTimerSetTimerFreq (PcdGet32 (PcdArmArchTimerFreqInHz));\r
}\r
#endif\r