IN UINTN BarOffsetEnd,\r
IN PCI_ROOT_BRIDGE_APERTURE *Io,\r
IN PCI_ROOT_BRIDGE_APERTURE *Mem,\r
- IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G,\r
- IN PCI_ROOT_BRIDGE_APERTURE *PMem,\r
- IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G\r
+ IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G\r
\r
)\r
{\r
//\r
Length = ((~Length) + 1) & 0xffffffff;\r
\r
- if ((Value & BIT3) == BIT3) {\r
- MemAperture = PMem;\r
- } else {\r
- MemAperture = Mem;\r
- }\r
+ MemAperture = Mem;\r
} else {\r
//\r
// 64bit\r
Length = Length | LShiftU64 ((UINT64) UpperValue, 32);\r
Length = (~Length) + 1;\r
\r
- if ((Value & BIT3) == BIT3) {\r
- MemAperture = PMemAbove4G;\r
- } else {\r
- MemAperture = MemAbove4G;\r
- }\r
+ MemAperture = MemAbove4G;\r
}\r
\r
Limit = Base + Length - 1;\r
}\r
}\r
\r
+STATIC PCI_ROOT_BRIDGE_APERTURE mNonExistAperture = { MAX_UINT64, 0 };\r
+\r
PCI_ROOT_BRIDGE *\r
ScanForRootBridges (\r
UINTN *NumberOfRootBridges\r
UINT64 Base;\r
UINT64 Limit;\r
UINT64 Value;\r
- PCI_ROOT_BRIDGE_APERTURE Io, Mem, MemAbove4G, PMem, PMemAbove4G, *MemAperture;\r
+ PCI_ROOT_BRIDGE_APERTURE Io, Mem, MemAbove4G, *MemAperture;\r
PCI_ROOT_BRIDGE *RootBridges;\r
UINTN BarOffsetEnd;\r
\r
ZeroMem (&Io, sizeof (Io));\r
ZeroMem (&Mem, sizeof (Mem));\r
ZeroMem (&MemAbove4G, sizeof (MemAbove4G));\r
- ZeroMem (&PMem, sizeof (PMem));\r
- ZeroMem (&PMemAbove4G, sizeof (PMemAbove4G));\r
- Io.Base = Mem.Base = MemAbove4G.Base = PMem.Base = PMemAbove4G.Base = MAX_UINT64;\r
+ Io.Base = Mem.Base = MemAbove4G.Base = MAX_UINT64;\r
//\r
// Scan all the PCI devices on the primary bus of the PCI root bridge\r
//\r
\r
//\r
// Get the Prefetchable Memory range that the PPB is decoding\r
+ // and merge it into Memory range\r
//\r
Value = Pci.Bridge.PrefetchableMemoryBase & 0x0f;\r
Base = ((UINT32) Pci.Bridge.PrefetchableMemoryBase & 0xfff0) << 16;\r
Limit = (((UINT32) Pci.Bridge.PrefetchableMemoryLimit & 0xfff0)\r
<< 16) | 0xfffff;\r
- MemAperture = &PMem;\r
+ MemAperture = &Mem;\r
if (Value == BIT0) {\r
Base |= LShiftU64 (Pci.Bridge.PrefetchableBaseUpper32, 32);\r
Limit |= LShiftU64 (Pci.Bridge.PrefetchableLimitUpper32, 32);\r
- MemAperture = &PMemAbove4G;\r
+ MemAperture = &MemAbove4G;\r
}\r
if (Base < Limit) {\r
if (MemAperture->Base > Base) {\r
OFFSET_OF (PCI_TYPE00, Device.Bar),\r
BarOffsetEnd,\r
&Io,\r
- &Mem, &MemAbove4G,\r
- &PMem, &PMemAbove4G\r
+ &Mem, &MemAbove4G\r
);\r
\r
//\r
InitRootBridge (\r
Attributes, Attributes, 0,\r
(UINT8) PrimaryBus, (UINT8) SubBus,\r
- &Io, &Mem, &MemAbove4G, &PMem, &PMemAbove4G,\r
+ &Io, &Mem, &MemAbove4G, &mNonExistAperture, &mNonExistAperture,\r
&RootBridges[*NumberOfRootBridges]\r
);\r
RootBridges[*NumberOfRootBridges].ResourceAssigned = TRUE;\r