Update the EFI_PCI_ADDRESS macro in PciRootBridgeIo.h to support PCI Express extended...

Signed-off-by:  rsun3
Reviewed-by:  mdkinney
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11848 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/MdePkg/Include/Protocol/PciRootBridgeIo.h b/MdePkg/Include/Protocol/PciRootBridgeIo.h
index 30645a560e9801e648c5343c8797ea5abd8ea56b..449dcba67a8ab225c48a3b5a4a923c99c85d05d2 100644 (file)
--- a/MdePkg/Include/Protocol/PciRootBridgeIo.h
+++ b/MdePkg/Include/Protocol/PciRootBridgeIo.h
@@ -5,7 +5,7 @@
   and PCI Configuration cycles on a PCI Root Bridge. It also provides services to perform \r
   defferent types of bus mastering DMA.\r
 \r
-  Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>\r
   This program and the accompanying materials                          \r
   are licensed and made available under the terms and conditions of the BSD License         \r
   which accompanies this distribution.  The full text of the license may be found at        \r
@@ -19,6 +19,8 @@
 #ifndef __PCI_ROOT_BRIDGE_IO_H__\r
 #define __PCI_ROOT_BRIDGE_IO_H__\r
 \r
+#include <Library/BaseLib.h>\r
+\r
 #define EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GUID \\r
   { \\r
     0x2f707ebb, 0x4a1a, 0x11d4, {0x9a, 0x38, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \\r
@@ -106,7 +108,11 @@ typedef enum {
 #define EFI_PCI_ATTRIBUTE_INVALID_FOR_ALLOCATE_BUFFER (~EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER)\r
 \r
 #define EFI_PCI_ADDRESS(bus, dev, func, reg) \\r
-    ((UINT64) ((((UINTN) bus) << 24) + (((UINTN) dev) << 16) + (((UINTN) func) << 8) + ((UINTN) reg)))\r
+  (UINT64) ( \\r
+  (((UINTN) bus) << 24) | \\r
+  (((UINTN) dev) << 16) | \\r
+  (((UINTN) func) << 8) | \\r
+  (((UINTN) (reg)) < 256 ? ((UINTN) (reg)) : (UINT64) (LShiftU64 ((UINT64) (reg), 32))))\r
 \r
 typedef struct {\r
   UINT8   Register;\r