MdeModulePkg/DxeIplPeim : LoongArch DxeIPL implementation.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053

Implement LoongArch DxeIPL instance.

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Guomin Jiang <guomin.jiang@intel.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
Co-authored-by: Baoqi Zhang <zhangbaoqi@loongson.cn>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>

diff --git a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
index 19b8a4c8aefa8616601ce210ef03c7654a25cbc3..052ea0ec1a6f27713fa584c16eae0da81b6ea26d 100644 (file)
--- a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
+++ b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
@@ -8,6 +8,7 @@
 #  Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>\r
 #  Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r
 #  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>\r
+#  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights reserved.<BR>\r
 #\r
 #  SPDX-License-Identifier: BSD-2-Clause-Patent\r
 #\r
@@ -26,7 +27,7 @@
 #\r
 # The following information is for reference only and not required by the build tools.\r
 #\r
-#  VALID_ARCHITECTURES           = IA32 X64 EBC (EBC is for build only) AARCH64 RISCV64\r
+#  VALID_ARCHITECTURES           = IA32 X64 EBC (EBC is for build only) AARCH64 RISCV64 LOONGARCH64\r
 #\r
 \r
 [Sources]\r
@@ -53,6 +54,9 @@
 [Sources.RISCV64]\r
   RiscV64/DxeLoadFunc.c\r
 \r
+[Sources.LOONGARCH64]\r
+  LoongArch64/DxeLoadFunc.c\r
+\r
 [Packages]\r
   MdePkg/MdePkg.dec\r
   MdeModulePkg/MdeModulePkg.dec\r

diff --git a/MdeModulePkg/Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c b/MdeModulePkg/Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c
new file mode 100644 (file)
index 0000000..95d3af1
--- /dev/null
+++ b/MdeModulePkg/Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c
@@ -0,0 +1,63 @@
+/** @file\r
+  LoongArch specifc functionality for DxeLoad.\r
+\r
+  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights reserved.<BR>\r
+\r
+  SPDX-License-Identifier: BSD-2-Clause-Patent\r
+\r
+**/\r
+\r
+#include "DxeIpl.h"\r
+\r
+/**\r
+   Transfers control to DxeCore.\r
+\r
+   This function performs a CPU architecture specific operations to execute\r
+   the entry point of DxeCore with the parameters of HobList.\r
+   It also installs EFI_END_OF_PEI_PPI to signal the end of PEI phase.\r
+\r
+   @param[in] DxeCoreEntryPoint         The entry point of DxeCore.\r
+   @param[in] HobList                   The start of HobList passed to DxeCore.\r
+\r
+**/\r
+VOID\r
+HandOffToDxeCore (\r
+  IN EFI_PHYSICAL_ADDRESS  DxeCoreEntryPoint,\r
+  IN EFI_PEI_HOB_POINTERS  HobList\r
+  )\r
+{\r
+  VOID        *BaseOfStack;\r
+  VOID        *TopOfStack;\r
+  EFI_STATUS  Status;\r
+\r
+  //\r
+  // Allocate 128KB for the Stack\r
+  //\r
+  BaseOfStack = AllocatePages (EFI_SIZE_TO_PAGES (STACK_SIZE));\r
+  ASSERT (BaseOfStack != NULL);\r
+\r
+  //\r
+  // Compute the top of the stack we were allocated. Pre-allocate a UINTN\r
+  // for safety.\r
+  //\r
+  TopOfStack = (VOID *)((UINTN)BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT);\r
+  TopOfStack = ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);\r
+\r
+  //\r
+  // End of PEI phase signal\r
+  //\r
+  Status = PeiServicesInstallPpi (&gEndOfPeiSignalPpi);\r
+  ASSERT_EFI_ERROR (Status);\r
+\r
+  //\r
+  // Update the contents of BSP stack HOB to reflect the real stack info passed to DxeCore.\r
+  //\r
+  UpdateStackHob ((EFI_PHYSICAL_ADDRESS)(UINTN)BaseOfStack, STACK_SIZE);\r
+\r
+  SwitchStack (\r
+    (SWITCH_STACK_ENTRY_POINT)(UINTN)DxeCoreEntryPoint,\r
+    HobList.Raw,\r
+    NULL,\r
+    TopOfStack\r
+    );\r
+}\r