If there are any logical processor reporting an APIC ID of 255 or greater, set
X2ApicEnable flag.
GetInitialApicId() will return x2APIC ID if CPUID leaf B supported.
Cc: Feng Tian <feng.tian@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18933
6f19259b-4bc3-4df7-8a09-
765794883524
PeiCpuMpData = ExchangeInfo->PeiCpuMpData;\r
if (PeiCpuMpData->InitFlag) {\r
//\r
PeiCpuMpData = ExchangeInfo->PeiCpuMpData;\r
if (PeiCpuMpData->InitFlag) {\r
//\r
- // This is first time AP wakeup, get BIST inforamtion from AP stack\r
+ // This is first time AP wakeup, get BIST information from AP stack\r
//\r
BistData = *(UINTN *) (PeiCpuMpData->Buffer + NumApsExecuting * PeiCpuMpData->CpuApStackSize - sizeof (UINTN));\r
//\r
BistData = *(UINTN *) (PeiCpuMpData->Buffer + NumApsExecuting * PeiCpuMpData->CpuApStackSize - sizeof (UINTN));\r
- PeiCpuMpData->CpuData[NumApsExecuting].ApicId = GetInitialApicId ();\r
PeiCpuMpData->CpuData[NumApsExecuting].Health.Uint32 = (UINT32) BistData;\r
PeiCpuMpData->CpuData[NumApsExecuting].Health.Uint32 = (UINT32) BistData;\r
+ PeiCpuMpData->CpuData[NumApsExecuting].ApicId = GetInitialApicId ();\r
+ if (PeiCpuMpData->CpuData[NumApsExecuting].ApicId >= 0xFF) {\r
+ //\r
+ // Set x2APIC mode if there are any logical processor reporting\r
+ // an APIC ID of 255 or greater.\r
+ //\r
+ AcquireSpinLock(&PeiCpuMpData->MpLock);\r
+ PeiCpuMpData->X2ApicEnable = TRUE;\r
+ ReleaseSpinLock(&PeiCpuMpData->MpLock);\r
+ }\r
//\r
// Sync BSP's Mtrr table to all wakeup APs and load microcode on APs.\r
//\r
//\r
// Sync BSP's Mtrr table to all wakeup APs and load microcode on APs.\r
//\r
//\r
if (PcdGet32 (PcdCpuMaxLogicalProcessorNumber) > 1) {\r
//\r
//\r
if (PcdGet32 (PcdCpuMaxLogicalProcessorNumber) > 1) {\r
//\r
- // Send broadcast IPI to APs to wakeup APs\r
+ // Send 1st broadcast IPI to APs to wakeup APs\r
- PeiCpuMpData->InitFlag = 1;\r
+ PeiCpuMpData->InitFlag = TRUE;\r
+ PeiCpuMpData->X2ApicEnable = FALSE;\r
WakeUpAP (PeiCpuMpData, TRUE, 0, NULL, NULL);\r
//\r
// Wait for AP task to complete and then exit.\r
//\r
MicroSecondDelay (PcdGet32 (PcdCpuApInitTimeOutInMicroSeconds));\r
WakeUpAP (PeiCpuMpData, TRUE, 0, NULL, NULL);\r
//\r
// Wait for AP task to complete and then exit.\r
//\r
MicroSecondDelay (PcdGet32 (PcdCpuApInitTimeOutInMicroSeconds));\r
- PeiCpuMpData->InitFlag = 0;\r
+ PeiCpuMpData->InitFlag = FALSE;\r
PeiCpuMpData->CpuCount += (UINT32)PeiCpuMpData->MpCpuExchangeInfo->NumApsExecuting;\r
ASSERT (PeiCpuMpData->CpuCount <= PcdGet32 (PcdCpuMaxLogicalProcessorNumber));\r
//\r
PeiCpuMpData->CpuCount += (UINT32)PeiCpuMpData->MpCpuExchangeInfo->NumApsExecuting;\r
ASSERT (PeiCpuMpData->CpuCount <= PcdGet32 (PcdCpuMaxLogicalProcessorNumber));\r
//\r
PeiCpuMpData->CpuData[0].ApicId = GetInitialApicId ();\r
PeiCpuMpData->CpuData[0].Health.Uint32 = 0;\r
PeiCpuMpData->EndOfPeiFlag = FALSE;\r
PeiCpuMpData->CpuData[0].ApicId = GetInitialApicId ();\r
PeiCpuMpData->CpuData[0].Health.Uint32 = 0;\r
PeiCpuMpData->EndOfPeiFlag = FALSE;\r
+ InitializeSpinLock(&PeiCpuMpData->MpLock);\r
CopyMem (&PeiCpuMpData->AddressMap, &AddressMap, sizeof (MP_ASSEMBLY_ADDRESS_MAP));\r
\r
//\r
CopyMem (&PeiCpuMpData->AddressMap, &AddressMap, sizeof (MP_ASSEMBLY_ADDRESS_MAP));\r
\r
//\r
// PEI CPU MP Data save in memory\r
//\r
struct _PEI_CPU_MP_DATA {\r
// PEI CPU MP Data save in memory\r
//\r
struct _PEI_CPU_MP_DATA {\r
UINT32 CpuCount;\r
UINT32 BspNumber;\r
UINTN Buffer;\r
UINT32 CpuCount;\r
UINT32 BspNumber;\r
UINTN Buffer;\r
volatile UINT32 FinishedCount;\r
BOOLEAN EndOfPeiFlag;\r
BOOLEAN InitFlag;\r
volatile UINT32 FinishedCount;\r
BOOLEAN EndOfPeiFlag;\r
BOOLEAN InitFlag;\r
+ BOOLEAN X2ApicEnable;\r
CPU_EXCHANGE_ROLE_INFO BSPInfo;\r
CPU_EXCHANGE_ROLE_INFO APInfo;\r
MTRR_SETTINGS MtrrTable;\r
CPU_EXCHANGE_ROLE_INFO BSPInfo;\r
CPU_EXCHANGE_ROLE_INFO APInfo;\r
MTRR_SETTINGS MtrrTable;\r