IntelFsp2Pkg: Support FSP private temporary memory.

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3153

In FSP the temporary memory provided by bootloader typically will be
totally given to PeiCore as Heap, but in some cases FSP may have to
reserve some more temporary memory for private usage.

This commit adds this flexibility for FSP to reserve some
temporary memory before giving them to PeiCore.

Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>

diff --git a/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf b/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
index 61b7ddca4c146276f8cb23d2ac91eff3b30b82a6..7b05cae64130e21b3a613dcc9541408b79dd57a5 100644 (file)
--- a/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
+++ b/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
@@ -1,7 +1,7 @@
 ## @file\r
 #  Sec Core for FSP\r
 #\r
-#  Copyright (c) 2016 - 2019, Intel Corporation. All rights reserved.<BR>\r
+#  Copyright (c) 2016 - 2021, Intel Corporation. All rights reserved.<BR>\r
 #\r
 #  SPDX-License-Identifier: BSD-2-Clause-Patent\r
 #\r
@@ -59,6 +59,7 @@
   gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize           ## CONSUMES\r
   gIntelFsp2PkgTokenSpaceGuid.PcdFspHeapSizePercentage         ## CONSUMES\r
   gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxInterruptSupported      ## CONSUMES\r
+  gIntelFsp2PkgTokenSpaceGuid.PcdFspPrivateTemporaryRamSize    ## CONSUMES\r
 \r
 [Ppis]\r
   gEfiTemporaryRamSupportPpiGuid                              ## PRODUCES\r

diff --git a/IntelFsp2Pkg/FspSecCore/SecMain.c b/IntelFsp2Pkg/FspSecCore/SecMain.c
index c8de52e1d5f7d23d010089fd41a1c3fdf86b4ad6..540571187af171648272ffc49b11444b506cf7f6 100644 (file)
--- a/IntelFsp2Pkg/FspSecCore/SecMain.c
+++ b/IntelFsp2Pkg/FspSecCore/SecMain.c
@@ -1,6 +1,6 @@
 /** @file\r
 \r
-  Copyright (c) 2014 - 2020, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2014 - 2021, Intel Corporation. All rights reserved.<BR>\r
   SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r
@@ -150,15 +150,18 @@ SecStartup (
   SecCoreData.BootFirmwareVolumeBase = BootFirmwareVolume;\r
   SecCoreData.BootFirmwareVolumeSize = (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *)BootFirmwareVolume)->FvLength;\r
 \r
-  SecCoreData.TemporaryRamBase       = (VOID*)(UINTN) TempRamBase;\r
+  //\r
+  // Support FSP reserved temporary memory from the whole temporary memory provided by bootloader.\r
+  // FSP reserved temporary memory will not be given to PeiCore.\r
+  //\r
+  SecCoreData.TemporaryRamBase       = (UINT8 *)(UINTN) TempRamBase  + PcdGet32 (PcdFspPrivateTemporaryRamSize);\r
+  SecCoreData.TemporaryRamSize       = SizeOfRam - PcdGet32 (PcdFspPrivateTemporaryRamSize);\r
   if (PcdGet8 (PcdFspHeapSizePercentage) == 0) {\r
-    SecCoreData.TemporaryRamSize       = SizeOfRam; // stack size that is going to be copied to the permanent memory\r
     SecCoreData.PeiTemporaryRamBase    = SecCoreData.TemporaryRamBase;\r
     SecCoreData.PeiTemporaryRamSize    = SecCoreData.TemporaryRamSize;\r
     SecCoreData.StackBase              = (VOID *)GetFspEntryStack(); // Share the same boot loader stack\r
     SecCoreData.StackSize              = 0;\r
   } else {\r
-    SecCoreData.TemporaryRamSize       = SizeOfRam;\r
     SecCoreData.PeiTemporaryRamBase    = SecCoreData.TemporaryRamBase;\r
     SecCoreData.PeiTemporaryRamSize    = SecCoreData.TemporaryRamSize * PcdGet8 (PcdFspHeapSizePercentage) / 100;\r
     SecCoreData.StackBase              = (VOID*)(UINTN)((UINTN)SecCoreData.TemporaryRamBase + SecCoreData.PeiTemporaryRamSize);\r

diff --git a/IntelFsp2Pkg/IntelFsp2Pkg.dec b/IntelFsp2Pkg/IntelFsp2Pkg.dec
index 60d40ab6b9f527f08e960efa2cd55f29e938455d..ec7b9a770240692e6c7db49ffa29c7f1a2994167 100644 (file)
--- a/IntelFsp2Pkg/IntelFsp2Pkg.dec
+++ b/IntelFsp2Pkg/IntelFsp2Pkg.dec
@@ -1,7 +1,7 @@
 ## @file\r
 # Provides driver and definitions to build fsp in EDKII bios.\r
 #\r
-# Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2014 - 2021, Intel Corporation. All rights reserved.<BR>\r
 # SPDX-License-Identifier: BSD-2-Clause-Patent\r
 #\r
 ##\r
@@ -98,6 +98,11 @@
   # Maximal Interrupt supported in IDT table.\r
   #\r
   gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxInterruptSupported |        34| UINT8|0x10000005\r
+  #\r
+  # Allows FSP-M to reserve a section of Temporary RAM for implementation specific use.\r
+  # Reduces the amount of memory available for the PeiCore heap.\r
+  #\r
+  gIntelFsp2PkgTokenSpaceGuid.PcdFspPrivateTemporaryRamSize |0x00000000|UINT32|0x10000006\r
 \r
 [PcdsFixedAtBuild,PcdsDynamic,PcdsDynamicEx]\r
   gIntelFsp2PkgTokenSpaceGuid.PcdFspReservedMemoryLength |0x00100000|UINT32|0x46530000\r