]> git.proxmox.com Git - mirror_edk2.git/commitdiff
UefiPayloadPkg/Pci: Use the PCIE Base Addr stored in AcpiBoardInfo HOB
authorRay Ni <ray.ni@intel.com>
Wed, 17 Jun 2020 08:34:29 +0000 (16:34 +0800)
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
Wed, 24 Jun 2020 05:46:27 +0000 (05:46 +0000)
Today's UefiPayloadPkg always uses 0xE0000000 as the PCIE base address
and ignores the value set in AcpiBoardInfo HOB created by the boot
loader. This makes the payload binary cannot work in environment
where the PCIE base address set by boot loader doesn't equal to
0xE0000000.

The patch enhances UefiPayloadPkg so that the PCIE base address
set by boot loader in the AcpiBoardInfo HOB is used.

Signed-off-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Guo Dong <guo.dong@intel.com>
Cc: Benjamin You <benjamin.you@intel.com>
UefiPayloadPkg/BlSupportDxe/BlSupportDxe.c
UefiPayloadPkg/BlSupportDxe/BlSupportDxe.inf
UefiPayloadPkg/Library/PciSegmentInfoLibAcpiBoardInfo/PciSegmentInfoLibAcpiBoardInfo.c [new file with mode: 0644]
UefiPayloadPkg/Library/PciSegmentInfoLibAcpiBoardInfo/PciSegmentInfoLibAcpiBoardInfo.inf [new file with mode: 0644]
UefiPayloadPkg/UefiPayloadPkgIa32.dsc
UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc

index 28dfc8fc5545c8754c8a334a325549bc25f2df05..a3974dcc02f8c0d25b80101f32f545e57544c5ad 100644 (file)
@@ -2,7 +2,7 @@
   This driver will report some MMIO/IO resources to dxe core, extract smbios and acpi\r
   tables from bootloader.\r
 \r
-  Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2014 - 2020, Intel Corporation. All rights reserved.<BR>\r
   SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r
@@ -101,6 +101,7 @@ BlDxeEntryPoint (
   EFI_HOB_GUID_TYPE          *GuidHob;\r
   SYSTEM_TABLE_INFO          *SystemTableInfo;\r
   EFI_PEI_GRAPHICS_INFO_HOB  *GfxInfo;\r
+  ACPI_BOARD_INFO            *AcpiBoardInfo;\r
 \r
   Status = EFI_SUCCESS;\r
   //\r
@@ -153,6 +154,16 @@ BlDxeEntryPoint (
     ASSERT_EFI_ERROR (Status);\r
   }\r
 \r
+  //\r
+  // Set PcdPciExpressBaseAddress by HOB info\r
+  //\r
+  GuidHob = GetFirstGuidHob (&gUefiAcpiBoardInfoGuid);\r
+  if (GuidHob != NULL) {\r
+    AcpiBoardInfo = (ACPI_BOARD_INFO *)GET_GUID_HOB_DATA (GuidHob);\r
+    Status = PcdSet64S (PcdPciExpressBaseAddress, AcpiBoardInfo->PcieBaseAddress);\r
+    ASSERT_EFI_ERROR (Status);\r
+  }\r
+\r
   return EFI_SUCCESS;\r
 }\r
 \r
index 4c2b4670af82dbdb11de2e50cabf398b4eecc78b..1371d5eb795206efe9ed2f4cca3108d8662e3f35 100644 (file)
@@ -3,7 +3,7 @@
 #\r
 # Report some MMIO/IO resources to dxe core, extract smbios and acpi tables\r
 #\r
-#  Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved.<BR>\r
+#  Copyright (c) 2014 - 2020, Intel Corporation. All rights reserved.<BR>\r
 #\r
 #  SPDX-License-Identifier: BSD-2-Clause-Patent\r
 #\r
@@ -53,6 +53,7 @@
   gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution\r
   gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoHorizontalResolution\r
   gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoVerticalResolution\r
+  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress\r
 \r
 [Depex]\r
   TRUE\r
diff --git a/UefiPayloadPkg/Library/PciSegmentInfoLibAcpiBoardInfo/PciSegmentInfoLibAcpiBoardInfo.c b/UefiPayloadPkg/Library/PciSegmentInfoLibAcpiBoardInfo/PciSegmentInfoLibAcpiBoardInfo.c
new file mode 100644 (file)
index 0000000..d37c91c
--- /dev/null
@@ -0,0 +1,59 @@
+/** @file\r
+  PCI Segment Information Library that returns one segment whose\r
+  segment base address is retrieved from AcpiBoardInfo HOB.\r
+\r
+  Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>\r
+  SPDX-License-Identifier: BSD-2-Clause-Patent\r
+\r
+**/\r
+\r
+#include <PiDxe.h>\r
+#include <Guid/AcpiBoardInfoGuid.h>\r
+\r
+#include <Library/HobLib.h>\r
+#include <Library/PciSegmentInfoLib.h>\r
+#include <Library/DebugLib.h>\r
+\r
+STATIC PCI_SEGMENT_INFO mPciSegment0 = {\r
+  0,  // Segment number\r
+  0,  // To be fixed later\r
+  0,  // Start bus number\r
+  255 // End bus number\r
+};\r
+\r
+/**\r
+  Return an array of PCI_SEGMENT_INFO holding the segment information.\r
+\r
+  Note: The returned array/buffer is owned by callee.\r
+\r
+  @param  Count  Return the count of segments.\r
+\r
+  @retval A callee owned array holding the segment information.\r
+**/\r
+PCI_SEGMENT_INFO *\r
+EFIAPI\r
+GetPciSegmentInfo (\r
+  UINTN  *Count\r
+  )\r
+{\r
+  EFI_HOB_GUID_TYPE  *GuidHob;\r
+  ACPI_BOARD_INFO    *AcpiBoardInfo;\r
+\r
+  ASSERT (Count != NULL);\r
+  if (Count == NULL) {\r
+    return NULL;\r
+  }\r
+\r
+  if (mPciSegment0.BaseAddress == 0) {\r
+    //\r
+    // Find the acpi board information guid hob\r
+    //\r
+    GuidHob = GetFirstGuidHob (&gUefiAcpiBoardInfoGuid);\r
+    ASSERT (GuidHob != NULL);\r
+\r
+    AcpiBoardInfo = (ACPI_BOARD_INFO *) GET_GUID_HOB_DATA (GuidHob);\r
+    mPciSegment0.BaseAddress = AcpiBoardInfo->PcieBaseAddress;\r
+  }\r
+  *Count = 1;\r
+  return &mPciSegment0;\r
+}\r
diff --git a/UefiPayloadPkg/Library/PciSegmentInfoLibAcpiBoardInfo/PciSegmentInfoLibAcpiBoardInfo.inf b/UefiPayloadPkg/Library/PciSegmentInfoLibAcpiBoardInfo/PciSegmentInfoLibAcpiBoardInfo.inf
new file mode 100644 (file)
index 0000000..ec4dbaa
--- /dev/null
@@ -0,0 +1,36 @@
+## @file\r
+#   PCI Segment Information Library that returns one segment whose\r
+#   segment base address is retrieved from AcpiBoardInfo HOB.\r
+#\r
+# Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>\r
+#\r
+#  SPDX-License-Identifier: BSD-2-Clause-Patent\r
+#\r
+#\r
+##\r
+\r
+[Defines]\r
+  INF_VERSION                    = 0x00010005\r
+  BASE_NAME                      = PciSegmentInfoLibAcpiBoardInfo\r
+  FILE_GUID                      = 0EA82AA2-6C36-4FD5-BC90-FFA3ECB5E0CE\r
+  MODULE_TYPE                    = BASE\r
+  VERSION_STRING                 = 1.0\r
+  LIBRARY_CLASS                  = PciSegmentInfoLib | DXE_DRIVER\r
+\r
+#\r
+# The following information is for reference only and not required by the build tools.\r
+#\r
+#  VALID_ARCHITECTURES           = IA32 X64 EBC\r
+#\r
+\r
+[Sources]\r
+  PciSegmentInfoLibAcpiBoardInfo.c\r
+\r
+[Packages]\r
+  MdePkg/MdePkg.dec\r
+  UefiPayloadPkg/UefiPayloadPkg.dec\r
+\r
+[LibraryClasses]\r
+  PcdLib\r
+  HobLib\r
+  DebugLib\r
index c6c47833871b148ea08f0e945a17c2dd4fbb3347..0efcfa8fb2f47ee19732717ed0f9dfafef4c711f 100644 (file)
@@ -40,7 +40,7 @@
   #\r
   # PCI options\r
   #\r
-  DEFINE PCIE_BASE                    = 0xE0000000\r
+  DEFINE PCIE_BASE_SUPPORT            = TRUE\r
 \r
   #\r
   # Serial port set up\r
   PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf\r
   CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf\r
   IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf\r
-!if $(PCIE_BASE) == 0\r
+!if $(PCIE_BASE_SUPPORT) == FALSE\r
   PciLib|MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf\r
   PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf\r
 !else\r
   PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf\r
   PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf\r
 !endif\r
-  PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf\r
+  PciSegmentLib|MdePkg/Library/PciSegmentLibSegmentInfo/BasePciSegmentLibSegmentInfo.inf\r
+  PciSegmentInfoLib|UefiPayloadPkg/Library/PciSegmentInfoLibAcpiBoardInfo/PciSegmentInfoLibAcpiBoardInfo.inf\r
   PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf\r
   PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf\r
   CacheMaintenanceLib|MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf\r
 \r
   gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow|31\r
   gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn|100\r
+  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0\r
 \r
 ################################################################################\r
 #\r
index 5559b1258521f2eaff3f15d3af6e58e2bcac5836..d645d233cd08ded52cac2ddf82b4dc460abdd60e 100644 (file)
@@ -41,7 +41,7 @@
   #\r
   # PCI options\r
   #\r
-  DEFINE PCIE_BASE                    = 0xE0000000\r
+  DEFINE PCIE_BASE_SUPPORT            = TRUE\r
 \r
   #\r
   # Serial port set up\r
   PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf\r
   CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf\r
   IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf\r
-!if $(PCIE_BASE) == 0\r
+!if $(PCIE_BASE_SUPPORT) == FALSE\r
   PciLib|MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf\r
   PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf\r
 !else\r
   PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf\r
   PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf\r
 !endif\r
-  PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf\r
+  PciSegmentLib|MdePkg/Library/PciSegmentLibSegmentInfo/BasePciSegmentLibSegmentInfo.inf\r
+  PciSegmentInfoLib|UefiPayloadPkg/Library/PciSegmentInfoLibAcpiBoardInfo/PciSegmentInfoLibAcpiBoardInfo.inf\r
   PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf\r
   PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf\r
   CacheMaintenanceLib|MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf\r
   gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable|TRUE\r
   gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }\r
 \r
-  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|$(PCIE_BASE)\r
 \r
 !if $(SOURCE_DEBUG_ENABLE)\r
   gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2\r
 \r
   gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow|31\r
   gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn|100\r
+  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0\r
 \r
 ################################################################################\r
 #\r