]> git.proxmox.com Git - mirror_edk2.git/commitdiff
OvmfPkg: PciHostBridgeLib: set bus, IO and 32-bit MMIO windows in RootBus
authorLaszlo Ersek <lersek@redhat.com>
Mon, 25 Jan 2016 23:36:46 +0000 (00:36 +0100)
committerLaszlo Ersek <lersek@redhat.com>
Thu, 3 Mar 2016 17:18:39 +0000 (18:18 +0100)
The bus aperture is copied verbatim from InitRootBridge()
[OvmfPkg/PciHostBridgeDxe/PciHostBridge.c].

The IO and 32-bit MMIO apertures are matched to PlatformPei's settings.
PciHostBridgeLibDxe expects PciHostBridgeLib instances to advertize the
exact apertures.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Marcel Apfelbaum <marcel@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c
OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf

index b238a8544d81640e2b10d29ec3df18855f56401f..b23939d166c11ff76b140bca5f44ea4f82c399f4 100644 (file)
@@ -93,6 +93,14 @@ InitRootBridge (
   RootBus->MemAbove4G.Base      = 0;\r
   RootBus->MemAbove4G.Limit     = 0;\r
 \r
   RootBus->MemAbove4G.Base      = 0;\r
   RootBus->MemAbove4G.Limit     = 0;\r
 \r
+  RootBus->Bus.Base  = RootBusNumber;\r
+  RootBus->Bus.Limit = MaxSubBusNumber;\r
+  RootBus->Io.Base   = PcdGet64 (PcdPciIoBase);\r
+  RootBus->Io.Limit  = PcdGet64 (PcdPciIoBase) + (PcdGet64 (PcdPciIoSize) - 1);\r
+  RootBus->Mem.Base  = PcdGet64 (PcdPciMmio32Base);\r
+  RootBus->Mem.Limit = PcdGet64 (PcdPciMmio32Base) +\r
+                       (PcdGet64 (PcdPciMmio32Size) - 1);\r
+\r
   return EFI_OUT_OF_RESOURCES;\r
 }\r
 \r
   return EFI_OUT_OF_RESOURCES;\r
 }\r
 \r
index 096d728f3c615f32d84bef36f89ec757ffd1bdb2..e95ebfdc9326d2a8c8e4ad1410b01f13b4d744fb 100644 (file)
@@ -44,3 +44,9 @@
   MemoryAllocationLib\r
   PciLib\r
   QemuFwCfgLib\r
   MemoryAllocationLib\r
   PciLib\r
   QemuFwCfgLib\r
+\r
+[Pcd]\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdPciIoBase\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdPciIoSize\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Base\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Size\r