The bus aperture is copied verbatim from InitRootBridge()
[OvmfPkg/PciHostBridgeDxe/PciHostBridge.c].
The IO and 32-bit MMIO apertures are matched to PlatformPei's settings.
PciHostBridgeLibDxe expects PciHostBridgeLib instances to advertize the
exact apertures.
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Marcel Apfelbaum <marcel@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
RootBus->MemAbove4G.Base = 0;\r
RootBus->MemAbove4G.Limit = 0;\r
\r
+ RootBus->Bus.Base = RootBusNumber;\r
+ RootBus->Bus.Limit = MaxSubBusNumber;\r
+ RootBus->Io.Base = PcdGet64 (PcdPciIoBase);\r
+ RootBus->Io.Limit = PcdGet64 (PcdPciIoBase) + (PcdGet64 (PcdPciIoSize) - 1);\r
+ RootBus->Mem.Base = PcdGet64 (PcdPciMmio32Base);\r
+ RootBus->Mem.Limit = PcdGet64 (PcdPciMmio32Base) +\r
+ (PcdGet64 (PcdPciMmio32Size) - 1);\r
+\r
return EFI_OUT_OF_RESOURCES;\r
}\r
\r
MemoryAllocationLib\r
PciLib\r
QemuFwCfgLib\r
+\r
+[Pcd]\r
+ gUefiOvmfPkgTokenSpaceGuid.PcdPciIoBase\r
+ gUefiOvmfPkgTokenSpaceGuid.PcdPciIoSize\r
+ gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Base\r
+ gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Size\r