for (RateNo = 0; RateNo < NUM_RATES (DescribeRates->NumRatesFlags); RateNo++) {\r
Rate = &DescribeRates->Rates[RateOffset++];\r
// Non-linear discrete rates.\r
- RateArray[RateIndex++].Rate = ConvertTo64Bit (Rate->Low, Rate->High);\r
+ RateArray[RateIndex++].DiscreteRate.Rate =\r
+ ConvertTo64Bit (Rate->Low, Rate->High);\r
}\r
} else {\r
for (RateNo = 0; RateNo < NUM_RATES (DescribeRates->NumRatesFlags); RateNo++) {\r
// Linear clock rates from minimum to maximum in steps\r
// Minimum clock rate.\r
Rate = &DescribeRates->Rates[RateOffset++];\r
- RateArray[RateIndex].Min = ConvertTo64Bit (Rate->Low, Rate->High);\r
+ RateArray[RateIndex].ContinuousRate.Min =\r
+ ConvertTo64Bit (Rate->Low, Rate->High);\r
\r
Rate = &DescribeRates->Rates[RateOffset++];\r
// Maximum clock rate.\r
- RateArray[RateIndex].Max = ConvertTo64Bit (Rate->Low, Rate->High);\r
+ RateArray[RateIndex].ContinuousRate.Max =\r
+ ConvertTo64Bit (Rate->Low, Rate->High);\r
\r
Rate = &DescribeRates->Rates[RateOffset++];\r
// Step.\r
- RateArray[RateIndex++].Step = ConvertTo64Bit (Rate->Low, Rate->High);\r
+ RateArray[RateIndex++].ContinuousRate.Step =\r
+ ConvertTo64Bit (Rate->Low, Rate->High);\r
}\r
}\r
} while (NUM_REMAIN_RATES (DescribeRates->NumRatesFlags) != 0);\r
/** @file\r
\r
- Copyright (c) 2017-2018, Arm Limited. All rights reserved.\r
+ Copyright (c) 2017-2021, Arm Limited. All rights reserved.\r
\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
either Rate or Min/Max/Step triplet is valid.\r
*/\r
typedef struct {\r
- union {\r
UINT64 Min;\r
- UINT64 Rate;\r
- };\r
UINT64 Max;\r
UINT64 Step;\r
+} SCMI_CLOCK_RATE_CONTINUOUS;\r
+\r
+typedef struct {\r
+ UINT64 Rate;\r
+} SCMI_CLOCK_RATE_DISCRETE;\r
+\r
+typedef union {\r
+ SCMI_CLOCK_RATE_CONTINUOUS ContinuousRate;\r
+ SCMI_CLOCK_RATE_DISCRETE DiscreteRate;\r
} SCMI_CLOCK_RATE;\r
\r
#pragma pack()\r