}\r
\r
/**\r
- This funciton sets DR6 & DR7 according to SMM save state, before running SMM C code.\r
+ This function sets DR6 & DR7 according to SMM save state, before running SMM C code.\r
They are useful when you want to enable hardware breakpoints in SMM without entry SMM mode.\r
\r
NOTE: It might not be appreciated in runtime since it might\r
SMRAM_SAVE_STATE_MAP *CpuSaveState;\r
\r
if (FeaturePcdGet (PcdCpuSmmDebug)) {\r
- CpuSaveState = (SMRAM_SAVE_STATE_MAP *)gSmst->CpuSaveState[CpuIndex];\r
+ CpuSaveState = (SMRAM_SAVE_STATE_MAP *)gSmmCpuPrivate->CpuSaveState[CpuIndex];\r
if (mSmmSaveStateRegisterLma == EFI_SMM_SAVE_STATE_REGISTER_LMA_32BIT) {\r
AsmWriteDr6 (CpuSaveState->x86._DR6);\r
AsmWriteDr7 (CpuSaveState->x86._DR7);\r
}\r
\r
/**\r
- This funciton restores DR6 & DR7 to SMM save state.\r
+ This function restores DR6 & DR7 to SMM save state.\r
\r
NOTE: It might not be appreciated in runtime since it might\r
conflict with OS debugging facilities. Turn them off in RELEASE.\r
SMRAM_SAVE_STATE_MAP *CpuSaveState;\r
\r
if (FeaturePcdGet (PcdCpuSmmDebug)) {\r
- CpuSaveState = (SMRAM_SAVE_STATE_MAP *)gSmst->CpuSaveState[CpuIndex];\r
+ CpuSaveState = (SMRAM_SAVE_STATE_MAP *)gSmmCpuPrivate->CpuSaveState[CpuIndex];\r
if (mSmmSaveStateRegisterLma == EFI_SMM_SAVE_STATE_REGISTER_LMA_32BIT) {\r
CpuSaveState->x86._DR7 = (UINT32)AsmReadDr7 ();\r
CpuSaveState->x86._DR6 = (UINT32)AsmReadDr6 ();\r