MdeModulePkg/DxeIplPeim: fix incorrect page table split during protecting

The root cause of this issue is that, during splitting page table, the page
size should be the value of next level (smaller one) instead of current level.
The wrong page size will then cause wrong page table introduced, which will
break the normal boot.

Validation works include booting to Windows 10 and Fedora 26 on real Intel
platform and OVMF emulated platform in addition to manual checks on page
table with JTAG tool.

Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>

diff --git a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
index 26116e420ca4f1c7873a4f4b2ca9fc67058e8fcc..bbdfa2bb8ecdb57a4d7f5bd6115c525a4f593072 100644 (file)
--- a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
+++ b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
@@ -472,6 +472,8 @@ SetPageTablePoolReadOnly (
       //\r
       // The smaller granularity of page must be needed.\r
       //\r
+      ASSERT (Level > 1);\r
+\r
       NewPageTable = AllocatePageTableMemory (1);\r
       ASSERT (NewPageTable != NULL);\r
 \r
@@ -481,10 +483,10 @@ SetPageTablePoolReadOnly (
             ++EntryIndex) {\r
         NewPageTable[EntryIndex] = PhysicalAddress  | AddressEncMask |\r
                                    IA32_PG_P | IA32_PG_RW;\r
-        if (Level > 1) {\r
+        if (Level > 2) {\r
           NewPageTable[EntryIndex] |= IA32_PG_PS;\r
         }\r
-        PhysicalAddress += LevelSize[Level];\r
+        PhysicalAddress += LevelSize[Level - 1];\r
       }\r
 \r
       PageTable[Index] = (UINT64)(UINTN)NewPageTable | AddressEncMask |\r