-/** \r
- @file \r
+/** @file \r
ACPI 1.0b definitions from the ACPI Specification, revision 1.0b\r
\r
Copyright (c) 2006 - 2007, Intel Corporation\r
-/** \r
- @file \r
+/** @file \r
ACPI 2.0 definitions from the ACPI Specification, revision 2.0\r
\r
Copyright (c) 2006 - 2007, Intel Corporation\r
-/** \r
- @file \r
+/** @file \r
ACPI 3.0 definitions from the ACPI Specification Revision 3.0 September 2, 2004\r
\r
Copyright (c) 2006 - 2008, Intel Corporation\r
-/** \r
- @file \r
+/** @file \r
ACPI Alert Standard Format Description Table ASF! as described in the ASF2.0 Specification\r
\r
Copyright (c) 2006 - 2007, Intel Corporation\r
\r
**/\r
\r
-#ifndef _ATAPI_H\r
-#define _ATAPI_H\r
+#ifndef _ATAPI_H_\r
+#define _ATAPI_H_\r
\r
#pragma pack(1)\r
\r
-/**@file\r
+/** @file\r
ACPI high precision event timer table definition, defined at \r
ftp://download.intel.com/labs/platcomp/hpet/download/hpetspec098a.pdf.\r
Specification name is IA-PC HPET (High Precision Event Timers) Specification.\r
#define EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_REVISION 0x01\r
#define EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_STRUCTURE_ALIGNMENT 8\r
\r
-enum {\r
+typedef enum {\r
EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_RESERVED_STRUCTURE_ID = 0,\r
EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_CONTROL_STRUCTURE_ID,\r
EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_INITIATOR_STRUCTURE_ID,\r
EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_NIC_STRUCTURE_ID,\r
EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_TARGET_STRUCTURE_ID,\r
EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_EXTERNSIONS_STRUCTURE_ID\r
-};\r
+} EFI_ACPI_ISCSI_ID_DEFINITIONS;\r
\r
-enum {\r
+typedef enum {\r
IpPrefixOriginOther = 0,\r
IpPrefixOriginManual,\r
IpPrefixOriginWellKnown,\r
IpPrefixOriginDhcp,\r
IpPrefixOriginRouterAdvertisement,\r
IpPrefixOriginUnchanged = 16\r
-};\r
+} IP_PREFIX_VALUE;\r
\r
#pragma pack(1)\r
\r
-/**@file\r
+/** @file\r
ACPI memory mapped configuration space access table definition, defined at \r
in the PCI Firmware Specification, version 3.0 draft version 0.5.\r
Specification is available at http://www.pcisig.com.\r
\r
**/\r
\r
-#ifndef _PCI_H\r
-#define _PCI_H\r
+#ifndef _PCI_H_\r
+#define _PCI_H_\r
\r
#include <IndustryStandard/Pci30.h>\r
\r
\r
**/\r
\r
-#ifndef _PCI22_H\r
-#define _PCI22_H\r
+#ifndef _PCI22_H_\r
+#define _PCI22_H_\r
\r
#define PCI_MAX_SEGMENT 0\r
\r
\r
**/\r
\r
-#ifndef _PCI23_H\r
-#define _PCI23_H\r
+#ifndef _PCI23_H_\r
+#define _PCI23_H_\r
\r
\r
#define PCI_EXP_MAX_CONFIG_OFFSET 0x1000\r
-/**@file\r
+/** @file\r
This file contains definitions for the SPD fields on an SDRAM.\r
\r
Copyright (c) 2007, Intel Corporation\r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
**/\r
\r
-#ifndef _SDRAM_SPD_H\r
-#define _SDRAM_SPD_H\r
+#ifndef _SDRAM_SPD_H_\r
+#define _SDRAM_SPD_H_\r
\r
//\r
// SDRAM SPD field definitions\r
-/**@file\r
+/** @file\r
ACPI Serial Port Console Redirection Table as defined by Microsoft in\r
http://www.microsoft.com/whdc/system/platform/server/spcr.mspx\r
\r
-/** \r
- @file \r
+/** @file \r
TPM Specification data structures (TCG TPM Specification Version 1.2 Revision 94)\r
See http://trustedcomputinggroup.org for latest specification updates\r
\r
#pragma pack()\r
\r
\r
-enum {\r
+typedef enum {\r
//\r
// USB request type\r
//\r
//Use 200 ms to increase the error handling response time\r
//\r
EFI_USB_INTERRUPT_DELAY = 2000000\r
-};\r
+} USB_TYPES_DEFINITION;\r
\r
\r
//\r
-/** \r
- @file \r
+/** @file \r
ACPI Watchdog Action Table as defined at\r
Microsoft Hardware Watchdog Timer Specification.\r
\r
-/** \r
- @file \r
+/** @file \r
ACPI Watchdog Resource Table as defined at\r
Microsoft Hardware Watchdog Timer Specification.\r
\r
function.\r
@param NewStack A pointer to the new stack to use for the EntryPoint\r
function.\r
+ @param ... Extended parameters.\r
+\r
\r
**/\r
VOID\r
@param PalEntryPoint The entry point address of PAL. The address in ar.kr5\r
would be used if this parameter were NULL on input.\r
@param Arg1 The first argument of a PAL call.\r
- @param Arg1 The second argument of a PAL call.\r
- @param Arg1 The third argument of a PAL call.\r
- @param Arg1 The fourth argument of a PAL call.\r
+ @param Arg2 The second argument of a PAL call.\r
+ @param Arg3 The third argument of a PAL call.\r
+ @param Arg4 The fourth argument of a PAL call.\r
\r
@return The values returned in r8, r9, r10 and r11.\r
\r
If EntryPoint is 0, then ASSERT().\r
If NewStack is 0, then ASSERT().\r
\r
- @param Cs The 16-bit selector to load in the CS before EntryPoint\r
+ @param CodeSelector The 16-bit selector to load in the CS before EntryPoint\r
is called. The descriptor in the GDT that this selector\r
references must be setup for long mode.\r
@param EntryPoint The 64-bit virtual address of the function to call with\r
If EntryPoint is 0, then ASSERT().\r
If NewStack is 0, then ASSERT().\r
\r
- @param Cs The 16-bit selector to load in the CS before EntryPoint\r
+ @param CodeSelector The 16-bit selector to load in the CS before EntryPoint\r
is called. The descriptor in the GDT that this selector\r
references must be setup for 32-bit protected mode.\r
@param EntryPoint The 64-bit virtual address of the function to call with\r
The data and size is returned by Buffer and Size. The caller is responsible to free the Buffer allocated \r
by this function. This function can only be called at TPL_NOTIFY and below.\r
\r
- If FvHandle is NULL and WithinImage is TRUE, then ASSERT ();\r
- If NameGuid is NULL, then ASSERT();\r
If Buffer is NULL, then ASSERT();\r
If Size is NULL, then ASSERT().\r
\r
- @param NameGuid The GUID name of a Firmware File.\r
@param SectionType The Firmware Section type.\r
+ @param Instance Instance number of a section.\r
@param Buffer On output, Buffer contains the the data read from the section in the Firmware File found.\r
@param Size On output, the size of Buffer.\r
\r
\r
@param[in] BmpImage Pointer to BMP file\r
@param[in] BmpImageSize Number of bytes in BmpImage\r
- @param[in,out] UgaBlt Buffer containing UGA version of BmpImage.\r
- @param[in,out] UgaBltSize Size of UgaBlt in bytes.\r
+ @param[in out] UgaBlt Buffer containing UGA version of BmpImage.\r
+ @param[in out] UgaBltSize Size of UgaBlt in bytes.\r
@param[out] PixelHeight Height of UgaBlt/BmpImage in pixels\r
@param[out] PixelWidth Width of UgaBlt/BmpImage in pixels\r
\r
If any reserved bits in Address are set, then ASSERT().\r
\r
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
- @param Andata The value to AND with the PCI configuration register.\r
+ @param AndData The value to AND with the PCI configuration register.\r
@param OrData The value to OR with the PCI configuration register.\r
\r
@return The value written to the PCI configuration register.\r
If any reserved bits in Address are set, then ASSERT().\r
\r
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
- @param Andata The value to AND with the PCI configuration register.\r
+ @param AndData The value to AND with the PCI configuration register.\r
@param OrData The value to OR with the PCI configuration register.\r
\r
@return The value written to the PCI configuration register.\r
from a firmware file, these should be NULL\r
\r
\r
- **/\r
-\r
+**/\r
VOID\r
EFIAPI\r
PiLibInstallFvInfoPpi (\r
\r
**/\r
\r
-#ifndef _SCSI_LIB_H\r
-#define _SCSI_LIB_H\r
+#ifndef _SCSI_LIB_H_\r
+#define _SCSI_LIB_H_\r
\r
#include <Protocol/ScsiIo.h>\r
\r
// since the value output by this macro is in 100ns unit,\r
// not 1us unit (1us = 1000ns)\r
//\r
-#define EfiScsiStallSeconds(a) (a) * EFI_SCSI_STALL_1_SECOND\r
+#define EfiScsiStallSeconds(a) ((a) * EFI_SCSI_STALL_1_SECOND)\r
\r
\r
/**
@param[in] ScsiIo SCSI IO Protocol to use
@param[in] Timeout The length of timeout period.
- @param[out] SenseData A pointer to output sense data.
- @param[in,out] SenseDataLength The length of output sense data.
+ @param[in] SenseData A pointer to output sense data.
+ @param[in out] SenseDataLength The length of output sense data.
@param[out] HostAdapterStatus The status of Host Adapter.
@param[out] TargetStatus The status of the target.
- @param[in,out] InquirydataBuffer A pointer to inquiry data buffer.
- @param[in,out] InquiryDataLength The length of inquiry data buffer.
+ @param[in out] InquirydataBuffer A pointer to inquiry data buffer.
+ @param[in out] InquiryDataLength The length of inquiry data buffer.
@param[in] EnableVitalProductData Boolean to enable Vital Product Data.
@retval EFI_SUCCESS The status of the unit is tested successfully.\r
@param[in] ScsiIo A pointer to SCSI IO protocol.
@param[in] Timeout The length of timeout period.
- @param[out] SenseData A pointer to output sense data.
- @param[in,out] SenseDataLength The length of output sense data.
+ @param[in] SenseData A pointer to output sense data.
+ @param[in out] SenseDataLength The length of output sense data.
@param[out] HostAdapterStatus The status of Host Adapter.
@param[out] TargetStatus The status of the target.
@param[in] DataBuffer A pointer to input data buffer.
- @param[in,out] DataLength The length of input data buffer.
+ @param[in out] DataLength The length of input data buffer.
@param[in] DBDField The DBD Field (Optional).
@param[in] PageControl Page Control.
@param[in] PageCode Page code.
@param[in] ScsiIo SCSI IO Protocol to use
@param[in] Timeout TODO:
- @param[out] SenseData TODO:
- @param[in,out] SenseDataLength TODO:
+ @param[in] SenseData TODO:
+ @param[in out] SenseDataLength TODO:
@param[out] HostAdapterStatus TODO:
@param[out] TargetStatus TODO:
\r
@param[in] ScsiIo A pointer to SCSI IO protocol.
@param[in] Timeout The length of timeout period.
- @param[out] SenseData A pointer to output sense data.
- @param[in,out] SenseDataLength The length of output sense data.
+ @param[in] SenseData A pointer to output sense data.
+ @param[in out] SenseDataLength The length of output sense data.
@param[out] HostAdapterStatus The status of Host Adapter.
@param[out] TargetStatus The status of the target.
@param[out] DataBuffer A pointer to a data buffer.
- @param[in,out] DataLength The length of data buffer.
+ @param[in out] DataLength The length of data buffer.
@param[in] PMI Partial medium indicator.
@retval EFI_SUCCESS The status of the unit is tested successfully.\r
@param[in] ScsiIo A pointer to SCSI IO protocol.
@param[in] Timeout The length of timeout period.
- @param[out] SenseData A pointer to output sense data.
- @param[in,out] SenseDataLength The length of output sense data.
+ @param[in] SenseData A pointer to output sense data.
+ @param[in out] SenseDataLength The length of output sense data.
@param[out] HostAdapterStatus The status of Host Adapter.
@param[out] TargetStatus The status of the target.
@param[out] DataBuffer Read 10 command data.
- @param[in,out] DataLength The length of data buffer.
+ @param[in out] DataLength The length of data buffer.
@param[in] StartLba The start address of LBA.
@param[in] SectorSize The sector size.
@param[in] ScsiIo SCSI IO Protocol to use
@param[in] Timeout The length of timeout period.
- @param[out] SenseData A pointer to output sense data.
- @param[in,out] SenseDataLength The length of output sense data.
+ @param[in] SenseData A pointer to output sense data.
+ @param[in out] SenseDataLength The length of output sense data.
@param[out] HostAdapterStatus The status of Host Adapter.
@param[out] TargetStatus The status of the target.
@param[out] DataBuffer A pointer to a data buffer.
- @param[in,out] DataLength The length of data buffer.
+ @param[in out] DataLength The length of data buffer.
@param[in] StartLba The start address of LBA.
@param[in] SectorSize The sector size.
the user. \r
\r
**/\r
-\r
EFI_STATUS\r
EFIAPI\r
ProcessModuleEntryPointList (\r
\r
**/\r
\r
+/**\r
+ Call the list of driver entry points. Automatics Generated by tool.\r
+\r
+ @param ImageHandle ImageHandle of the loaded driver.\r
+ @param SystemTable Pointer to the EFI System Table.\r
+\r
+ @return Status returned by entry points of drivers. \r
+ \r
+**/\r
EFI_STATUS\r
EFIAPI\r
ProcessModuleEntryPointList (\r
stored in contiguous virtual memory.\r
@param CapsuleCount Number of pointers to EFI_CAPSULE_HEADER in\r
CaspuleHeaderArray.\r
- @param MaxiumCapsuleSize On output the maximum size that UpdateCapsule() can\r
+ @param MaximumCapsuleSize On output the maximum size that UpdateCapsule() can\r
support as an argument to UpdateCapsule() via\r
CapsuleHeaderArray and ScatterGatherList.\r
Undefined on input.\r
EFI_STATUS\r
EFIAPI\r
EfiQueryVariableInfo (\r
- IN UINT32 Attrubutes,\r
+ IN UINT32 Attributes,\r
OUT UINT64 *MaximumVariableStorageSize,\r
OUT UINT64 *RemainingVariableStorageSize,\r
OUT UINT64 *MaximumVariableSize\r
-/**@file\r
+/** @file\r
Common header file shared by all source files.\r
\r
This file includes package header files, dependent library classes.\r
operations are serialized.\r
\r
@param Port The I/O port to write.\r
- @param Value The value to write to the I/O port.\r
+ @param Data The value to write to the I/O port.\r
\r
@return The value written to the I/O port. It equals to the\r
input Value instead of the actual value read back from\r
operations are serialized.\r
\r
@param Port The I/O port to write.\r
- @param Value The value to write to the I/O port.\r
+ @param Data The value to write to the I/O port.\r
\r
@return The value written to the I/O port. It equals to the\r
input Value instead of the actual value read back from\r
operations are serialized.\r
\r
@param Port The I/O port to write.\r
- @param Value The value to write to the I/O port.\r
+ @param Data The value to write to the I/O port.\r
\r
@return The value written to the I/O port. It equals to the\r
input Value instead of the actual value read back from\r
\r
ReturnBuffer = Buffer;\r
\r
- while (Length--) {\r
+ while (Length-- != 0) {\r
*(Buffer++) = MmioRead8 (StartAddress++);\r
}\r
\r
\r
ReturnBuffer = Buffer;\r
\r
- while (Length) {\r
+ while (Length != 0) {\r
*(Buffer++) = MmioRead16 (StartAddress);\r
StartAddress += sizeof (UINT16);\r
Length -= sizeof (UINT16);\r
\r
ReturnBuffer = Buffer;\r
\r
- while (Length) {\r
+ while (Length != 0) {\r
*(Buffer++) = MmioRead32 (StartAddress);\r
StartAddress += sizeof (UINT32);\r
Length -= sizeof (UINT32);\r
\r
ReturnBuffer = Buffer;\r
\r
- while (Length) {\r
+ while (Length != 0) {\r
*(Buffer++) = MmioRead64 (StartAddress);\r
StartAddress += sizeof (UINT64);\r
Length -= sizeof (UINT64);\r
\r
ReturnBuffer = (UINT8 *) Buffer;\r
\r
- while (Length--) {\r
+ while (Length-- != 0) {\r
MmioWrite8 (StartAddress++, *(Buffer++));\r
}\r
\r
\r
ReturnBuffer = (UINT16 *) Buffer;\r
\r
- while (Length) {\r
+ while (Length != 0) {\r
MmioWrite16 (StartAddress, *(Buffer++));\r
\r
StartAddress += sizeof (UINT16);\r
\r
ReturnBuffer = (UINT32 *) Buffer;\r
\r
- while (Length) {\r
+ while (Length != 0) {\r
MmioWrite32 (StartAddress, *(Buffer++));\r
\r
StartAddress += sizeof (UINT32);\r
\r
ReturnBuffer = (UINT64 *) Buffer;\r
\r
- while (Length) {\r
+ while (Length != 0) {\r
MmioWrite64 (StartAddress, *(Buffer++));\r
\r
StartAddress += sizeof (UINT64);\r
#include "BaseIoLibIntrinsicInternal.h"\r
\r
//\r
-// Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics\r
+// Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics.\r
//\r
+\r
int _inp (unsigned short port);\r
unsigned short _inpw (unsigned short port);\r
unsigned long _inpd (unsigned short port);\r
InternalMathDivRemU64x32 (\r
IN UINT64 Dividend,\r
IN UINT32 Divisor,\r
- OUT UINT32 *Remainder\r
+ OUT UINT32 *Remainder OPTIONAL\r
);\r
\r
/**\r
InternalMathDivRemU64x64 (\r
IN UINT64 Dividend,\r
IN UINT64 Divisor,\r
- OUT UINT64 *Remainder\r
+ OUT UINT64 *Remainder OPTIONAL\r
);\r
\r
/**\r
\r
\r
#include "BaseLibInternals.h"\r
-\r
-VOID __chkstk() {\r
+/**\r
+ Hack function for passing GCC build.\r
+**/\r
+VOID \r
+__chkstk() \r
+{\r
}\r
\r
//\r
\r
\r
+/**\r
+ Shifts a 64-bit integer right between 0 and 63 bits. The high bits\r
+ are filled with original integer's bit 63. The shifted value is returned.\r
+\r
+ This function shifts the 64-bit value Operand to the right by Count bits. The\r
+ high Count bits are set to bit 63 of Operand. The shifted value is returned.\r
+\r
+ @param Operand The 64-bit operand to shift right.\r
+ @param Count The number of bits to shift right.\r
+\r
+ @return Operand arithmetically shifted right by Count\r
+\r
+**/\r
UINT64\r
EFIAPI\r
InternalMathARShiftU64 (\r
//\r
\r
\r
-//\r
-// Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics\r
-//\r
+/**\r
+ Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics.\r
+**/\r
void __debugbreak ();\r
\r
#pragma intrinsic(__debugbreak)\r
\r
+/**\r
+ Generates a breakpoint on the CPU.\r
+\r
+ Generates a breakpoint on the CPU. The breakpoint must be implemented such\r
+ that code can resume normal execution after the breakpoint.\r
+\r
+**/\r
VOID\r
EFIAPI\r
CpuBreakpoint (\r
//\r
\r
\r
+/**\r
+ Retrieves CPUID information.\r
+\r
+ Executes the CPUID instruction with EAX set to the value specified by Index.\r
+ This function always returns Index.\r
+ If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.\r
+ If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.\r
+ If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.\r
+ If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.\r
+ This function is only available on IA-32 and X64.\r
+\r
+ @param Index The 32-bit value to load into EAX prior to invoking the CPUID\r
+ instruction.\r
+ @param Eax Pointer to the 32-bit EAX value returned by the CPUID\r
+ instruction. This is an optional parameter that may be NULL.\r
+ @param Ebx Pointer to the 32-bit EBX value returned by the CPUID\r
+ instruction. This is an optional parameter that may be NULL.\r
+ @param Ecx Pointer to the 32-bit ECX value returned by the CPUID\r
+ instruction. This is an optional parameter that may be NULL.\r
+ @param Edx Pointer to the 32-bit EDX value returned by the CPUID\r
+ instruction. This is an optional parameter that may be NULL.\r
+\r
+ @return Index\r
+\r
+**/\r
UINT32\r
EFIAPI\r
AsmCpuid (\r
//\r
\r
\r
+/**\r
+ Retrieves CPUID information using an extended leaf identifier.\r
+\r
+ Executes the CPUID instruction with EAX set to the value specified by Index\r
+ and ECX set to the value specified by SubIndex. This function always returns\r
+ Index. This function is only available on IA-32 and x64.\r
+\r
+ If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.\r
+ If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.\r
+ If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.\r
+ If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.\r
+\r
+ @param Index The 32-bit value to load into EAX prior to invoking the\r
+ CPUID instruction.\r
+ @param SubIndex The 32-bit value to load into ECX prior to invoking the\r
+ CPUID instruction.\r
+ @param Eax Pointer to the 32-bit EAX value returned by the CPUID\r
+ instruction. This is an optional parameter that may be\r
+ NULL.\r
+ @param Ebx Pointer to the 32-bit EBX value returned by the CPUID\r
+ instruction. This is an optional parameter that may be\r
+ NULL.\r
+ @param Ecx Pointer to the 32-bit ECX value returned by the CPUID\r
+ instruction. This is an optional parameter that may be\r
+ NULL.\r
+ @param Edx Pointer to the 32-bit EDX value returned by the CPUID\r
+ instruction. This is an optional parameter that may be\r
+ NULL.\r
+\r
+ @return Index\r
+\r
+**/\r
UINT32\r
EFIAPI\r
AsmCpuidEx (\r
//\r
\r
\r
+/**\r
+ Requests CPU to pause for a short period of time.\r
+\r
+ Requests CPU to pause for a short period of time. Typically used in MP\r
+ systems to prevent memory starvation while waiting for a spin lock.\r
+\r
+**/\r
VOID\r
EFIAPI\r
CpuPause (\r
//\r
\r
\r
+/**\r
+ Places the CPU in a sleep state until an interrupt is received.\r
+\r
+ Places the CPU in a sleep state until an interrupt is received. If interrupts\r
+ are disabled prior to calling this function, then the CPU will be placed in a\r
+ sleep state indefinitely.\r
+\r
+**/\r
VOID\r
EFIAPI\r
CpuSleep (\r
//\r
\r
\r
+/**\r
+ Disables CPU interrupts.\r
+\r
+**/\r
VOID\r
EFIAPI\r
DisableInterrupts (\r
\r
#if _MSC_EXTENSIONS\r
\r
+/**\r
+ Disables the 32-bit paging mode on the CPU.\r
+\r
+ Disables the 32-bit paging mode on the CPU and returns to 32-bit protected\r
+ mode. This function assumes the current execution mode is 32-paged protected\r
+ mode. This function is only available on IA-32. After the 32-bit paging mode\r
+ is disabled, control is transferred to the function specified by EntryPoint\r
+ using the new stack specified by NewStack and passing in the parameters\r
+ specified by Context1 and Context2. Context1 and Context2 are optional and\r
+ may be NULL. The function EntryPoint must never return.\r
+\r
+ There are a number of constraints that must be followed before calling this\r
+ function:\r
+ 1) Interrupts must be disabled.\r
+ 2) The caller must be in 32-bit paged mode.\r
+ 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.\r
+ 4) CR3 must point to valid page tables that guarantee that the pages for\r
+ this function and the stack are identity mapped.\r
+\r
+ @param EntryPoint A pointer to function to call with the new stack after\r
+ paging is disabled.\r
+ @param Context1 A pointer to the context to pass into the EntryPoint\r
+ function as the first parameter after paging is disabled.\r
+ @param Context2 A pointer to the context to pass into the EntryPoint\r
+ function as the second parameter after paging is\r
+ disabled.\r
+ @param NewStack A pointer to the new stack to use for the EntryPoint\r
+ function after paging is disabled.\r
+\r
+**/\r
__declspec (naked)\r
VOID\r
EFIAPI\r
//\r
\r
\r
+/**\r
+ Divides a 64-bit unsigned integer by a 32-bit unsigned integer and\r
+ generates a 64-bit unsigned result.\r
+\r
+ This function divides the 64-bit unsigned value Dividend by the 32-bit\r
+ unsigned value Divisor and generates a 64-bit unsigned quotient. This\r
+ function returns the 64-bit unsigned quotient.\r
+\r
+ @param Dividend A 64-bit unsigned value.\r
+ @param Divisor A 32-bit unsigned value.\r
+\r
+ @return Dividend / Divisor\r
+\r
+**/\r
UINT64\r
EFIAPI\r
InternalMathDivU64x32 (\r
//\r
\r
\r
+/**\r
+ Divides a 64-bit unsigned integer by a 32-bit unsigned integer and\r
+ generates a 64-bit unsigned result and an optional 32-bit unsigned remainder.\r
+\r
+ This function divides the 64-bit unsigned value Dividend by the 32-bit\r
+ unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r
+ is not NULL, then the 32-bit unsigned remainder is returned in Remainder.\r
+ This function returns the 64-bit unsigned quotient.\r
+\r
+ @param Dividend A 64-bit unsigned value.\r
+ @param Divisor A 32-bit unsigned value.\r
+ @param Remainder A pointer to a 32-bit unsigned value. This parameter is\r
+ optional and may be NULL.\r
+\r
+ @return Dividend / Divisor\r
+\r
+**/\r
UINT64\r
EFIAPI\r
InternalMathDivRemU64x32 (\r
//\r
\r
\r
+/**\r
+ Enables CPU interrupts for the smallest window required to capture any\r
+ pending interrupts.\r
+\r
+**/\r
VOID\r
EFIAPI\r
EnableDisableInterrupts (\r
//\r
\r
\r
+/**\r
+ Enables CPU interrupts.\r
+\r
+**/\r
VOID\r
EFIAPI\r
EnableInterrupts (\r
\r
#if _MSC_EXTENSIONS\r
\r
+/**\r
+ Enables the 32-bit paging mode on the CPU.\r
+\r
+ Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r
+ must be properly initialized prior to calling this service. This function\r
+ assumes the current execution mode is 32-bit protected mode. This function is\r
+ only available on IA-32. After the 32-bit paging mode is enabled, control is\r
+ transferred to the function specified by EntryPoint using the new stack\r
+ specified by NewStack and passing in the parameters specified by Context1 and\r
+ Context2. Context1 and Context2 are optional and may be NULL. The function\r
+ EntryPoint must never return.\r
+\r
+ There are a number of constraints that must be followed before calling this\r
+ function:\r
+ 1) Interrupts must be disabled.\r
+ 2) The caller must be in 32-bit protected mode with flat descriptors. This\r
+ means all descriptors must have a base of 0 and a limit of 4GB.\r
+ 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat\r
+ descriptors.\r
+ 4) CR3 must point to valid page tables that will be used once the transition\r
+ is complete, and those page tables must guarantee that the pages for this\r
+ function and the stack are identity mapped.\r
+\r
+ @param EntryPoint A pointer to function to call with the new stack after\r
+ paging is enabled.\r
+ @param Context1 A pointer to the context to pass into the EntryPoint\r
+ function as the first parameter after paging is enabled.\r
+ @param Context2 A pointer to the context to pass into the EntryPoint\r
+ function as the second parameter after paging is enabled.\r
+ @param NewStack A pointer to the new stack to use for the EntryPoint\r
+ function after paging is enabled.\r
+\r
+**/\r
__declspec (naked)\r
VOID\r
EFIAPI\r
//\r
\r
\r
+/**\r
+ Flushes a cache line from all the instruction and data caches within the\r
+ coherency domain of the CPU.\r
+\r
+ Flushed the cache line specified by LinearAddress, and returns LinearAddress.\r
+ This function is only available on IA-32 and X64.\r
+\r
+ @param LinearAddress The address of the cache line to flush. If the CPU is\r
+ in a physical addressing mode, then LinearAddress is a\r
+ physical address. If the CPU is in a virtual\r
+ addressing mode, then LinearAddress is a virtual\r
+ address.\r
+\r
+ @return LinearAddress\r
+**/\r
VOID *\r
EFIAPI\r
AsmFlushCacheLine (\r
#include <BaseLibInternals.h>\r
\r
\r
+/**\r
+ Restores the current floating point/SSE/SSE2 context from a buffer.\r
+\r
+ Restores the current floating point/SSE/SSE2 state from the buffer specified\r
+ by Buffer. Buffer must be aligned on a 16-byte boundary. This function is\r
+ only available on IA-32 and X64.\r
+\r
+ @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.\r
+\r
+**/\r
VOID\r
EFIAPI\r
InternalX86FxRestore (\r
#include <BaseLibInternals.h>\r
\r
\r
+/**\r
+ Save the current floating point/SSE/SSE2 context to a buffer.\r
+\r
+ Saves the current floating point/SSE/SSE2 state to the buffer specified by\r
+ Buffer. Buffer must be aligned on a 16-byte boundary. This function is only\r
+ available on IA-32 and X64.\r
+\r
+ @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.\r
+\r
+**/\r
VOID\r
EFIAPI\r
InternalX86FxSave (\r
//\r
\r
\r
+/**\r
+ Performs an atomic compare exchange operation on a 32-bit unsigned integer.\r
+\r
+ Performs an atomic compare exchange operation on the 32-bit unsigned integer\r
+ specified by Value. If Value is equal to CompareValue, then Value is set to\r
+ ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue,\r
+ then Value is returned. The compare exchange operation must be performed using\r
+ MP safe mechanisms.\r
+\r
+ @param Value A pointer to the 32-bit value for the compare exchange\r
+ operation.\r
+ @param CompareValue 32-bit value used in compare operation.\r
+ @param ExchangeValue 32-bit value used in exchange operation.\r
+\r
+ @return The original *Value before exchange.\r
+\r
+**/\r
UINT32\r
EFIAPI\r
InternalSyncCompareExchange32 (\r
//\r
\r
\r
+/**\r
+ Performs an atomic compare exchange operation on a 64-bit unsigned integer.\r
+\r
+ Performs an atomic compare exchange operation on the 64-bit unsigned integer specified\r
+ by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and\r
+ CompareValue is returned. If Value is not equal to CompareValue, then Value is returned.\r
+ The compare exchange operation must be performed using MP safe mechanisms.\r
+\r
+ @param Value A pointer to the 64-bit value for the compare exchange\r
+ operation.\r
+ @param CompareValue 64-bit value used in compare operation.\r
+ @param ExchangeValue 64-bit value used in exchange operation.\r
+\r
+ @return The original *Value before exchange.\r
+\r
+**/\r
UINT64\r
EFIAPI\r
InternalSyncCompareExchange64 (\r
//\r
\r
\r
+/**\r
+ Performs an atomic decrement of an 32-bit unsigned integer.\r
+\r
+ Performs an atomic decrement of the 32-bit unsigned integer specified by\r
+ Value and returns the decrement value. The decrement operation must be\r
+ performed using MP safe mechanisms. The state of the return value is not\r
+ guaranteed to be MP safe.\r
+\r
+ @param Value A pointer to the 32-bit value to decrement.\r
+\r
+ @return The decrement value.\r
+\r
+**/\r
UINT32\r
EFIAPI\r
InternalSyncDecrement (\r
//\r
\r
\r
+/**\r
+ Performs an atomic increment of an 32-bit unsigned integer.\r
+\r
+ Performs an atomic increment of the 32-bit unsigned integer specified by\r
+ Value and returns the incremented value. The increment operation must be\r
+ performed using MP safe mechanisms. The state of the return value is not\r
+ guaranteed to be MP safe.\r
+\r
+ @param Value A pointer to the 32-bit value to increment.\r
+\r
+ @return The incremented value.\r
+\r
+**/\r
UINT32\r
EFIAPI\r
InternalSyncIncrement (\r
//\r
\r
\r
+/**\r
+ Executes a INVD instruction.\r
+\r
+ Executes a INVD instruction. This function is only available on IA-32 and\r
+ X64.\r
+\r
+**/\r
VOID\r
EFIAPI\r
AsmInvd (\r
//\r
\r
\r
+/**\r
+ Rotates a 64-bit integer left between 0 and 63 bits, filling\r
+ the low bits with the high bits that were rotated.\r
+\r
+ This function rotates the 64-bit value Operand to the left by Count bits. The\r
+ low Count bits are fill with the high Count bits of Operand. The rotated\r
+ value is returned.\r
+\r
+ @param Operand The 64-bit operand to rotate left.\r
+ @param Count The number of bits to rotate left.\r
+\r
+ @return Operand <<< Count\r
+\r
+**/\r
UINT64\r
EFIAPI\r
InternalMathLRotU64 (\r
//\r
\r
\r
+/**\r
+ Shifts a 64-bit integer left between 0 and 63 bits. The low bits\r
+ are filled with zeros. The shifted value is returned.\r
+\r
+ This function shifts the 64-bit value Operand to the left by Count bits. The\r
+ low Count bits are set to zero. The shifted value is returned.\r
+\r
+ @param Operand The 64-bit operand to shift left.\r
+ @param Count The number of bits to shift left.\r
+\r
+ @return Operand << Count\r
+\r
+**/\r
UINT64\r
EFIAPI\r
InternalMathLShiftU64 (\r
#include <BaseLibInternals.h>\r
\r
\r
+/**\r
+ Restores the CPU context that was saved with SetJump().\r
+\r
+ Restores the CPU context from the buffer specified by JumpBuffer.\r
+ This function never returns to the caller.\r
+ Instead is resumes execution based on the state of JumpBuffer.\r
+\r
+ @param JumpBuffer A pointer to CPU context buffer.\r
+ @param Value The value to return when the SetJump() context is restored.\r
+\r
+**/\r
__declspec (naked)\r
VOID\r
EFIAPI\r
//\r
\r
\r
+/**\r
+ Divides a 64-bit unsigned integer by a 32-bit unsigned integer and\r
+ generates a 32-bit unsigned remainder.\r
+\r
+ This function divides the 64-bit unsigned value Dividend by the 32-bit\r
+ unsigned value Divisor and generates a 32-bit remainder. This function\r
+ returns the 32-bit unsigned remainder.\r
+\r
+ @param Dividend A 64-bit unsigned value.\r
+ @param Divisor A 32-bit unsigned value.\r
+\r
+ @return Dividend % Divisor\r
+\r
+**/\r
UINT32\r
EFIAPI\r
InternalMathModU64x32 (\r
//\r
\r
\r
+/**\r
+ Sets up a monitor buffer that is used by AsmMwait().\r
+\r
+ Executes a MONITOR instruction with the register state specified by Eax, Ecx\r
+ and Edx. Returns Eax. This function is only available on IA-32 and X64.\r
+\r
+ @param Eax The value to load into EAX or RAX before executing the MONITOR\r
+ instruction.\r
+ @param Ecx The value to load into ECX or RCX before executing the MONITOR\r
+ instruction.\r
+ @param Edx The value to load into EDX or RDX before executing the MONITOR\r
+ instruction.\r
+\r
+ @return Eax\r
+\r
+**/\r
UINTN\r
EFIAPI\r
AsmMonitor (\r
//\r
\r
\r
+/**\r
+ Multiples a 64-bit unsigned integer by a 32-bit unsigned integer\r
+ and generates a 64-bit unsigned result.\r
+\r
+ This function multiples the 64-bit unsigned value Multiplicand by the 32-bit\r
+ unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r
+ bit unsigned result is returned.\r
+\r
+ @param Multiplicand A 64-bit unsigned value.\r
+ @param Multiplier A 32-bit unsigned value.\r
+\r
+ @return Multiplicand * Multiplier\r
+\r
+**/\r
UINT64\r
EFIAPI\r
InternalMathMultU64x32 (\r
//\r
\r
\r
+/**\r
+ Multiples a 64-bit unsigned integer by a 64-bit unsigned integer\r
+ and generates a 64-bit unsigned result.\r
+\r
+ This function multiples the 64-bit unsigned value Multiplicand by the 64-bit\r
+ unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r
+ bit unsigned result is returned.\r
+\r
+ @param Multiplicand A 64-bit unsigned value.\r
+ @param Multiplier A 64-bit unsigned value.\r
+\r
+ @return Multiplicand * Multiplier\r
+\r
+**/\r
UINT64\r
EFIAPI\r
InternalMathMultU64x64 (\r
//\r
\r
\r
+/**\r
+ Executes an MWAIT instruction.\r
+\r
+ Executes an MWAIT instruction with the register state specified by Eax and\r
+ Ecx. Returns Eax. This function is only available on IA-32 and X64.\r
+\r
+ @param Eax The value to load into EAX or RAX before executing the MONITOR\r
+ instruction.\r
+ @param Ecx The value to load into ECX or RCX before executing the MONITOR\r
+ instruction.\r
+\r
+ @return Eax\r
+\r
+**/\r
UINTN\r
EFIAPI\r
AsmMwait (\r
//\r
\r
\r
+/**\r
+ Rotates a 64-bit integer right between 0 and 63 bits, filling\r
+ the high bits with the high low bits that were rotated.\r
+\r
+ This function rotates the 64-bit value Operand to the right by Count bits.\r
+ The high Count bits are fill with the low Count bits of Operand. The rotated\r
+ value is returned.\r
+\r
+ @param Operand The 64-bit operand to rotate right.\r
+ @param Count The number of bits to rotate right.\r
+\r
+ @return Operand >>> Count\r
+\r
+**/\r
UINT64\r
EFIAPI\r
InternalMathRRotU64 (\r
//\r
\r
\r
+/**\r
+ Shifts a 64-bit integer right between 0 and 63 bits. This high bits\r
+ are filled with zeros. The shifted value is returned.\r
+\r
+ This function shifts the 64-bit value Operand to the right by Count bits. The\r
+ high Count bits are set to zero. The shifted value is returned.\r
+\r
+ @param Operand The 64-bit operand to shift right.\r
+ @param Count The number of bits to shift right.\r
+\r
+ @return Operand >> Count\r
+\r
+**/\r
UINT64\r
EFIAPI\r
InternalMathRShiftU64 (\r
//\r
\r
\r
+/**\r
+ Reads the current value of the Control Register 0 (CR0).\r
+\r
+ Reads and returns the current value of CR4. This function is only available\r
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
+ X64.\r
+\r
+ @return The value of the Control Register 0 (CR0).\r
+\r
+**/\r
UINTN\r
EFIAPI\r
AsmReadCr0 (\r
//\r
\r
\r
+/**\r
+ Reads the current value of the Control Register 2 (CR2).\r
+\r
+ Reads and returns the current value of CR2. This function is only available\r
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
+ X64.\r
+\r
+ @return The value of the Control Register 2 (CR2).\r
+\r
+**/\r
UINTN\r
EFIAPI\r
AsmReadCr2 (\r
//\r
\r
\r
+/**\r
+ Reads the current value of the Control Register 3 (CR3).\r
+\r
+ Reads and returns the current value of CR3. This function is only available\r
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
+ X64.\r
+\r
+ @return The value of the Control Register 3 (CR3).\r
+\r
+**/\r
UINTN\r
EFIAPI\r
AsmReadCr3 (\r
//\r
\r
\r
+/**\r
+ Reads the current value of the Control Register 4 (CR4).\r
+\r
+ Reads and returns the current value of CR4. This function is only available\r
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
+ X64.\r
+\r
+ @return The value of the Control Register 4 (CR4).\r
+\r
+**/\r
UINTN\r
EFIAPI\r
AsmReadCr4 (\r
//\r
\r
\r
+/**\r
+ Reads the current value of Code Segment Register (CS).\r
+\r
+ Reads and returns the current value of CS. This function is only available on\r
+ IA-32 and X64.\r
+\r
+ @return The current value of CS.\r
+\r
+**/\r
UINT16\r
EFIAPI\r
AsmReadCs (\r
//\r
\r
\r
+/**\r
+ Reads the current value of Debug Register 0 (DR0).\r
+\r
+ Reads and returns the current value of DR0. This function is only available\r
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
+ X64.\r
+\r
+ @return The value of Debug Register 0 (DR0).\r
+\r
+**/\r
UINTN\r
EFIAPI\r
AsmReadDr0 (\r
//\r
\r
\r
+/**\r
+ Reads the current value of Debug Register 1 (DR1).\r
+\r
+ Reads and returns the current value of DR1. This function is only available\r
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
+ X64.\r
+\r
+ @return The value of Debug Register 1 (DR1).\r
+\r
+**/\r
UINTN\r
EFIAPI\r
AsmReadDr1 (\r
//\r
\r
\r
+/**\r
+ Reads the current value of Debug Register 2 (DR2).\r
+\r
+ Reads and returns the current value of DR2. This function is only available\r
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
+ X64.\r
+\r
+ @return The value of Debug Register 2 (DR2).\r
+\r
+**/\r
UINTN\r
EFIAPI\r
AsmReadDr2 (\r
//\r
\r
\r
+/**\r
+ Reads the current value of Debug Register 3 (DR3).\r
+\r
+ Reads and returns the current value of DR3. This function is only available\r
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
+ X64.\r
+\r
+ @return The value of Debug Register 3 (DR3).\r
+\r
+**/\r
UINTN\r
EFIAPI\r
AsmReadDr3 (\r
//\r
\r
\r
+/**\r
+ Reads the current value of Debug Register 4 (DR4).\r
+\r
+ Reads and returns the current value of DR4. This function is only available\r
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
+ X64.\r
+\r
+ @return The value of Debug Register 4 (DR4).\r
+\r
+**/\r
UINTN\r
EFIAPI\r
AsmReadDr4 (\r
//\r
\r
\r
+/**\r
+ Reads the current value of Debug Register 5 (DR5).\r
+\r
+ Reads and returns the current value of DR5. This function is only available\r
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
+ X64.\r
+\r
+ @return The value of Debug Register 5 (DR5).\r
+\r
+**/\r
UINTN\r
EFIAPI\r
AsmReadDr5 (\r
//\r
\r
\r
+/**\r
+ Reads the current value of Debug Register 6 (DR6).\r
+\r
+ Reads and returns the current value of DR6. This function is only available\r
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
+ X64.\r
+\r
+ @return The value of Debug Register 6 (DR6).\r
+\r
+**/\r
UINTN\r
EFIAPI\r
AsmReadDr6 (\r
//\r
\r
\r
+/**\r
+ Reads the current value of Debug Register 7 (DR7).\r
+\r
+ Reads and returns the current value of DR7. This function is only available\r
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
+ X64.\r
+\r
+ @return The value of Debug Register 7 (DR7).\r
+\r
+**/\r
UINTN\r
EFIAPI\r
AsmReadDr7 (\r
//\r
\r
\r
+/**\r
+ Reads the current value of Data Segment Register (DS).\r
+\r
+ Reads and returns the current value of DS. This function is only available on\r
+ IA-32 and X64.\r
+\r
+ @return The current value of DS.\r
+\r
+**/\r
UINT16\r
EFIAPI\r
AsmReadDs (\r
//\r
\r
\r
+/**\r
+ Reads the current value of the EFLAGS register.\r
+\r
+ Reads and returns the current value of the EFLAGS register. This function is\r
+ only available on IA-32 and X64. This returns a 32-bit value on IA-32 and a\r
+ 64-bit value on X64.\r
+\r
+ @return EFLAGS on IA-32 or RFLAGS on X64.\r
+\r
+**/\r
UINTN\r
EFIAPI\r
AsmReadEflags (\r
//\r
\r
\r
+/**\r
+ Reads the current value of ES Data Segment Register (ES).\r
+\r
+ Reads and returns the current value of ES. This function is only available on\r
+ IA-32 and X64.\r
+\r
+ @return The current value of ES.\r
+\r
+**/\r
UINT16\r
EFIAPI\r
AsmReadEs (\r
//\r
\r
\r
+/**\r
+ Reads the current value of FS Data Segment Register (FS).\r
+\r
+ Reads and returns the current value of FS. This function is only available on\r
+ IA-32 and X64.\r
+\r
+ @return The current value of FS.\r
+\r
+**/\r
UINT16\r
EFIAPI\r
AsmReadFs (\r
#include <BaseLibInternals.h>\r
\r
\r
+/**\r
+ Reads the current Global Descriptor Table Register(GDTR) descriptor.\r
+\r
+ Reads and returns the current GDTR descriptor and returns it in Gdtr. This\r
+ function is only available on IA-32 and X64.\r
+\r
+ @param Gdtr Pointer to a GDTR descriptor.\r
+\r
+**/\r
VOID\r
EFIAPI\r
InternalX86ReadGdtr (\r
//\r
\r
\r
+/**\r
+ Reads the current value of GS Data Segment Register (GS).\r
+\r
+ Reads and returns the current value of GS. This function is only available on\r
+ IA-32 and X64.\r
+\r
+ @return The current value of GS.\r
+\r
+**/\r
UINT16\r
EFIAPI\r
AsmReadGs (\r
#include <BaseLibInternals.h>\r
\r
\r
+/**\r
+ Reads the current Interrupt Descriptor Table Register(GDTR) descriptor.\r
+\r
+ Reads and returns the current IDTR descriptor and returns it in Idtr. This\r
+ function is only available on IA-32 and X64.\r
+\r
+ @param Idtr Pointer to a IDTR descriptor.\r
+\r
+**/\r
VOID\r
EFIAPI\r
InternalX86ReadIdtr (\r
//\r
\r
\r
+/**\r
+ Reads the current Local Descriptor Table Register(LDTR) selector.\r
+\r
+ Reads and returns the current 16-bit LDTR descriptor value. This function is\r
+ only available on IA-32 and X64.\r
+\r
+ @return The current selector of LDT.\r
+\r
+**/\r
UINT16\r
EFIAPI\r
AsmReadLdtr (\r
//\r
\r
\r
+/**\r
+ Reads the current value of 64-bit MMX Register #0 (MM0).\r
+\r
+ Reads and returns the current value of MM0. This function is only available\r
+ on IA-32 and X64.\r
+\r
+ @return The current value of MM0.\r
+\r
+**/\r
UINT64\r
EFIAPI\r
AsmReadMm0 (\r
//\r
\r
\r
+/**\r
+ Reads the current value of 64-bit MMX Register #1 (MM1).\r
+\r
+ Reads and returns the current value of MM1. This function is only available\r
+ on IA-32 and X64.\r
+\r
+ @return The current value of MM1.\r
+\r
+**/\r
UINT64\r
EFIAPI\r
AsmReadMm1 (\r
//\r
\r
\r
+/**\r
+ Reads the current value of 64-bit MMX Register #2 (MM2).\r
+\r
+ Reads and returns the current value of MM2. This function is only available\r
+ on IA-32 and X64.\r
+\r
+ @return The current value of MM2.\r
+\r
+**/\r
UINT64\r
EFIAPI\r
AsmReadMm2 (\r
//\r
\r
\r
+/**\r
+ Reads the current value of 64-bit MMX Register #3 (MM3).\r
+\r
+ Reads and returns the current value of MM3. This function is only available\r
+ on IA-32 and X64.\r
+\r
+ @return The current value of MM3.\r
+\r
+**/\r
UINT64\r
EFIAPI\r
AsmReadMm3 (\r
//\r
\r
\r
+/**\r
+ Reads the current value of 64-bit MMX Register #4 (MM4).\r
+\r
+ Reads and returns the current value of MM4. This function is only available\r
+ on IA-32 and X64.\r
+\r
+ @return The current value of MM4.\r
+\r
+**/\r
UINT64\r
EFIAPI\r
AsmReadMm4 (\r
//\r
\r
\r
+/**\r
+ Reads the current value of 64-bit MMX Register #5 (MM5).\r
+\r
+ Reads and returns the current value of MM5. This function is only available\r
+ on IA-32 and X64.\r
+\r
+ @return The current value of MM5.\r
+\r
+**/\r
UINT64\r
EFIAPI\r
AsmReadMm5 (\r
//\r
\r
\r
+/**\r
+ Reads the current value of 64-bit MMX Register #6 (MM6).\r
+\r
+ Reads and returns the current value of MM6. This function is only available\r
+ on IA-32 and X64.\r
+\r
+ @return The current value of MM6.\r
+\r
+**/\r
UINT64\r
EFIAPI\r
AsmReadMm6 (\r
//\r
\r
\r
+/**\r
+ Reads the current value of 64-bit MMX Register #7 (MM7).\r
+\r
+ Reads and returns the current value of MM7. This function is only available\r
+ on IA-32 and X64.\r
+\r
+ @return The current value of MM7.\r
+\r
+**/\r
UINT64\r
EFIAPI\r
AsmReadMm7 (\r
//\r
\r
\r
+/**\r
+ Returns a 64-bit Machine Specific Register(MSR).\r
+\r
+ Reads and returns the 64-bit MSR specified by Index. No parameter checking is\r
+ performed on Index, and some Index values may cause CPU exceptions. The\r
+ caller must either guarantee that Index is valid, or the caller must set up\r
+ exception handlers to catch the exceptions. This function is only available\r
+ on IA-32 and X64.\r
+\r
+ @param Index The 32-bit MSR index to read.\r
+\r
+ @return The value of the MSR identified by Index.\r
+\r
+**/\r
UINT64\r
EFIAPI\r
AsmReadMsr64 (\r
//\r
\r
\r
+/**\r
+ Reads the current value of a Performance Counter (PMC).\r
+\r
+ Reads and returns the current value of performance counter specified by\r
+ Index. This function is only available on IA-32 and X64.\r
+\r
+ @param Index The 32-bit Performance Counter index to read.\r
+\r
+ @return The value of the PMC specified by Index.\r
+\r
+**/\r
UINT64\r
EFIAPI\r
AsmReadPmc (\r
//\r
\r
\r
+/**\r
+ Reads the current value of Stack Segment Register (SS).\r
+\r
+ Reads and returns the current value of SS. This function is only available on\r
+ IA-32 and X64.\r
+\r
+ @return The current value of SS.\r
+\r
+**/\r
UINT16\r
EFIAPI\r
AsmReadSs (\r
//\r
\r
\r
+/**\r
+ Reads the current value of Task Register (TR).\r
+\r
+ Reads and returns the current value of TR. This function is only available on\r
+ IA-32 and X64.\r
+\r
+ @return The current value of TR.\r
+\r
+**/\r
UINT16\r
EFIAPI\r
AsmReadTr (\r
//\r
\r
\r
+/**\r
+ Reads the current value of Time Stamp Counter (TSC).\r
+\r
+ Reads and returns the current value of TSC. This function is only available\r
+ on IA-32 and X64.\r
+\r
+ @return The current value of TSC\r
+\r
+**/\r
UINT64\r
EFIAPI\r
AsmReadTsc (\r
//\r
#include <BaseLibInternals.h>\r
\r
+/**\r
+ Worker function that checks ASSERT condition for JumpBuffer\r
\r
+ Checks ASSERT condition for JumpBuffer.\r
+\r
+ If JumpBuffer is NULL, then ASSERT().\r
+ For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r
+\r
+ @param JumpBuffer A pointer to CPU context buffer.\r
+\r
+**/\r
VOID\r
EFIAPI\r
InternalAssertJumpBuffer (\r
IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer\r
);\r
\r
+/**\r
+ Saves the current CPU context that can be restored with a call to LongJump()\r
+ and returns 0.\r
+\r
+ Saves the current CPU context in the buffer specified by JumpBuffer and\r
+ returns 0. The initial call to SetJump() must always return 0. Subsequent\r
+ calls to LongJump() cause a non-zero value to be returned by SetJump().\r
+\r
+ If JumpBuffer is NULL, then ASSERT().\r
+ For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r
+\r
+ @param JumpBuffer A pointer to CPU context buffer.\r
+\r
+ @retval 0 Indicates a return from SetJump().\r
+\r
+**/\r
_declspec (naked)\r
UINTN\r
EFIAPI\r
//\r
\r
\r
+/**\r
+ Switches the endianess of a 64-bit integer.\r
+\r
+ This function swaps the bytes in a 64-bit unsigned value to switch the value\r
+ from little endian to big endian or vice versa. The byte swapped value is\r
+ returned.\r
+\r
+ @param Operand A 64-bit unsigned value.\r
+\r
+ @return The byte swaped Operand.\r
+\r
+**/\r
UINT64\r
EFIAPI\r
InternalMathSwapBytes64 (\r
//\r
\r
\r
+/**\r
+ Executes a WBINVD instruction.\r
+\r
+ Executes a WBINVD instruction. This function is only available on IA-32 and\r
+ X64.\r
+\r
+**/\r
VOID\r
EFIAPI\r
AsmWbinvd (\r
//\r
\r
\r
+/**\r
+ Writes a value to Control Register 0 (CR0).\r
+\r
+ Writes and returns a new value to CR0. This function is only available on\r
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r
+\r
+ @param Cr0 The value to write to CR0.\r
+\r
+ @return The value written to CR0.\r
+\r
+**/\r
UINTN\r
EFIAPI\r
AsmWriteCr0 (\r
//\r
\r
\r
+/**\r
+ Writes a value to Control Register 2 (CR2).\r
+\r
+ Writes and returns a new value to CR2. This function is only available on\r
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r
+\r
+ @param Cr2 The value to write to CR2.\r
+\r
+ @return The value written to CR2.\r
+\r
+**/\r
UINTN\r
EFIAPI\r
AsmWriteCr2 (\r
//\r
\r
\r
+/**\r
+ Writes a value to Control Register 3 (CR3).\r
+\r
+ Writes and returns a new value to CR3. This function is only available on\r
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r
+\r
+ @param Cr3 The value to write to CR3.\r
+\r
+ @return The value written to CR3.\r
+\r
+**/\r
UINTN\r
EFIAPI\r
AsmWriteCr3 (\r
//\r
\r
\r
+/**\r
+ Writes a value to Control Register 4 (CR4).\r
+\r
+ Writes and returns a new value to CR4. This function is only available on\r
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r
+\r
+ @param Cr4 The value to write to CR4.\r
+\r
+ @return The value written to CR4.\r
+\r
+**/\r
UINTN\r
EFIAPI\r
AsmWriteCr4 (\r
//\r
\r
\r
+/**\r
+ Writes a value to Debug Register 0 (DR0).\r
+\r
+ Writes and returns a new value to DR0. This function is only available on\r
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r
+\r
+ @param Dr0 The value to write to Dr0.\r
+\r
+ @return The value written to Debug Register 0 (DR0).\r
+\r
+**/\r
UINTN\r
EFIAPI\r
AsmWriteDr0 (\r
//\r
\r
\r
+/**\r
+ Writes a value to Debug Register 1 (DR1).\r
+\r
+ Writes and returns a new value to DR1. This function is only available on\r
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r
+\r
+ @param Dr1 The value to write to Dr1.\r
+\r
+ @return The value written to Debug Register 1 (DR1).\r
+\r
+**/\r
UINTN\r
EFIAPI\r
AsmWriteDr1 (\r
//\r
\r
\r
+/**\r
+ Writes a value to Debug Register 2 (DR2).\r
+\r
+ Writes and returns a new value to DR2. This function is only available on\r
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r
+\r
+ @param Dr2 The value to write to Dr2.\r
+\r
+ @return The value written to Debug Register 2 (DR2).\r
+\r
+**/\r
UINTN\r
EFIAPI\r
AsmWriteDr2 (\r
//\r
\r
\r
+/**\r
+ Writes a value to Debug Register 3 (DR3).\r
+\r
+ Writes and returns a new value to DR3. This function is only available on\r
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r
+\r
+ @param Dr3 The value to write to Dr3.\r
+\r
+ @return The value written to Debug Register 3 (DR3).\r
+\r
+**/\r
UINTN\r
EFIAPI\r
AsmWriteDr3 (\r
//\r
\r
\r
+/**\r
+ Writes a value to Debug Register 4 (DR4).\r
+\r
+ Writes and returns a new value to DR4. This function is only available on\r
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r
+\r
+ @param Dr4 The value to write to Dr4.\r
+\r
+ @return The value written to Debug Register 4 (DR4).\r
+\r
+**/\r
UINTN\r
EFIAPI\r
AsmWriteDr4 (\r
//\r
\r
\r
+/**\r
+ Writes a value to Debug Register 5 (DR5).\r
+\r
+ Writes and returns a new value to DR5. This function is only available on\r
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r
+\r
+ @param Dr5 The value to write to Dr5.\r
+\r
+ @return The value written to Debug Register 5 (DR5).\r
+\r
+**/\r
UINTN\r
EFIAPI\r
AsmWriteDr5 (\r
//\r
\r
\r
+/**\r
+ Writes a value to Debug Register 6 (DR6).\r
+\r
+ Writes and returns a new value to DR6. This function is only available on\r
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r
+\r
+ @param Dr6 The value to write to Dr6.\r
+\r
+ @return The value written to Debug Register 6 (DR6).\r
+\r
+**/\r
UINTN\r
EFIAPI\r
AsmWriteDr6 (\r
//\r
\r
\r
+/**\r
+ Writes a value to Debug Register 7 (DR7).\r
+\r
+ Writes and returns a new value to DR7. This function is only available on\r
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r
+\r
+ @param Dr7 The value to write to Dr7.\r
+\r
+ @return The value written to Debug Register 7 (DR7).\r
+\r
+**/\r
UINTN\r
EFIAPI\r
AsmWriteDr7 (\r
#include <BaseLibInternals.h>\r
\r
\r
+/**\r
+ Writes the current Global Descriptor Table Register (GDTR) descriptor.\r
+\r
+ Writes and the current GDTR descriptor specified by Gdtr. This function is\r
+ only available on IA-32 and X64.\r
+\r
+ @param Gdtr Pointer to a GDTR descriptor.\r
+\r
+**/\r
VOID\r
EFIAPI\r
InternalX86WriteGdtr (\r
//\r
#include <BaseLibInternals.h>\r
\r
+/**\r
+ Writes the current Interrupt Descriptor Table Register(GDTR) descriptor.\r
+\r
+ Writes the current IDTR descriptor and returns it in Idtr. This function is\r
+ only available on IA-32 and X64.\r
+\r
+ @param Idtr Pointer to a IDTR descriptor.\r
+\r
+**/\r
VOID\r
EFIAPI\r
InternalX86WriteIdtr (\r
//\r
\r
\r
+/**\r
+ Writes the current Local Descriptor Table Register (GDTR) selector.\r
+\r
+ Writes and the current LDTR descriptor specified by Ldtr. This function is\r
+ only available on IA-32 and X64.\r
+\r
+ @param Ldtr 16-bit LDTR selector value.\r
+\r
+**/\r
VOID\r
EFIAPI\r
AsmWriteLdtr (\r
//\r
\r
\r
+/**\r
+ Writes the current value of 64-bit MMX Register #0 (MM0).\r
+\r
+ Writes the current value of MM0. This function is only available on IA32 and\r
+ X64.\r
+\r
+ @param Value The 64-bit value to write to MM0.\r
+\r
+**/\r
VOID\r
EFIAPI\r
AsmWriteMm0 (\r
//\r
\r
\r
+/**\r
+ Writes the current value of 64-bit MMX Register #1 (MM1).\r
+\r
+ Writes the current value of MM1. This function is only available on IA32 and\r
+ X64.\r
+\r
+ @param Value The 64-bit value to write to MM1.\r
+\r
+**/\r
VOID\r
EFIAPI\r
AsmWriteMm1 (\r
//\r
\r
\r
+/**\r
+ Writes the current value of 64-bit MMX Register #2 (MM2).\r
+\r
+ Writes the current value of MM2. This function is only available on IA32 and\r
+ X64.\r
+\r
+ @param Value The 64-bit value to write to MM2.\r
+\r
+**/\r
VOID\r
EFIAPI\r
AsmWriteMm2 (\r
//\r
\r
\r
+/**\r
+ Writes the current value of 64-bit MMX Register #3 (MM3).\r
+\r
+ Writes the current value of MM3. This function is only available on IA32 and\r
+ X64.\r
+\r
+ @param Value The 64-bit value to write to MM3.\r
+\r
+**/\r
VOID\r
EFIAPI\r
AsmWriteMm3 (\r
//\r
\r
\r
+/**\r
+ Writes the current value of 64-bit MMX Register #4 (MM4).\r
+\r
+ Writes the current value of MM4. This function is only available on IA32 and\r
+ X64.\r
+\r
+ @param Value The 64-bit value to write to MM4.\r
+\r
+**/\r
VOID\r
EFIAPI\r
AsmWriteMm4 (\r
//\r
\r
\r
+/**\r
+ Writes the current value of 64-bit MMX Register #5 (MM5).\r
+\r
+ Writes the current value of MM5. This function is only available on IA32 and\r
+ X64.\r
+\r
+ @param Value The 64-bit value to write to MM5.\r
+\r
+**/\r
VOID\r
EFIAPI\r
AsmWriteMm5 (\r
//\r
\r
\r
+/**\r
+ Writes the current value of 64-bit MMX Register #6 (MM6).\r
+\r
+ Writes the current value of MM6. This function is only available on IA32 and\r
+ X64.\r
+\r
+ @param Value The 64-bit value to write to MM6.\r
+\r
+**/\r
VOID\r
EFIAPI\r
AsmWriteMm6 (\r
//\r
\r
\r
+/**\r
+ Writes the current value of 64-bit MMX Register #7 (MM7).\r
+\r
+ Writes the current value of MM7. This function is only available on IA32 and\r
+ X64.\r
+\r
+ @param Value The 64-bit value to write to MM7.\r
+\r
+**/\r
VOID\r
EFIAPI\r
AsmWriteMm7 (\r
//\r
\r
\r
+/**\r
+ Writes a 64-bit value to a Machine Specific Register(MSR), and returns the\r
+ value.\r
+\r
+ Writes the 64-bit value specified by Value to the MSR specified by Index. The\r
+ 64-bit value written to the MSR is returned. No parameter checking is\r
+ performed on Index or Value, and some of these may cause CPU exceptions. The\r
+ caller must either guarantee that Index and Value are valid, or the caller\r
+ must establish proper exception handlers. This function is only available on\r
+ IA-32 and X64.\r
+\r
+ @param Index The 32-bit MSR index to write.\r
+ @param Value The 64-bit value to write to the MSR.\r
+\r
+ @return Value\r
+\r
+**/\r
UINT64\r
EFIAPI\r
AsmWriteMsr64 (\r
-/// @file\r
-/// This module contains generic macros for an assembly writer.\r
-///\r
-/// Copyright (c) 2006, Intel Corporation<BR>\r
-/// All rights reserved. This program and the accompanying materials\r
-/// are licensed and made available under the terms and conditions of the BSD License\r
-/// which accompanies this distribution. The full text of the license may be found at\r
-/// http://opensource.org/licenses/bsd-license.php\r
-///\r
-/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-///\r
-///\r
-#ifndef _ASM_H\r
-#define _ASM_H\r
+/** @file This module contains generic macros for an assembly writer.\r
+\r
+ Copyright (c) 2006, Intel Corporation<BR>\r
+ All rights reserved. This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+**/\r
+\r
+#ifndef _ASM_H_\r
+#define _ASM_H_\r
\r
#define TRUE 1\r
#define FALSE 0\r
-/// @file\r
-/// \r
-/// \r
-/// Copyright (c) 2006, Intel Corporation<BR>\r
-/// All rights reserved. This program and the accompanying materials\r
-/// are licensed and made available under the terms and conditions of the BSD License\r
-/// which accompanies this distribution. The full text of the license may be found at\r
-/// http://opensource.org/licenses/bsd-license.php\r
-///\r
-/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
-/// \r
-///\r
-#ifndef _IA64GEN_H\r
-#define _IA64GEN_H\r
+/** @file Register Definition for IPF.\r
+ \r
+ \r
+ Copyright (c) 2006, Intel Corporation<BR>\r
+ All rights reserved. This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+ \r
+**/\r
+#ifndef _IA64GEN_H_\r
+#define _IA64GEN_H_\r
\r
#define TT_UNAT 0\r
#define C_PSR 0\r
ASSERT ((UINTN)(Source - Destination) > StrLen (Source));\r
\r
ReturnValue = Destination;\r
- while (*Source) {\r
+ while (*Source != 0) {\r
*(Destination++) = *(Source++);\r
}\r
*Destination = 0;\r
@retval FALSE Otherwise.\r
\r
**/\r
-STATIC\r
BOOLEAN\r
+EFIAPI\r
InternalIsDecimalDigitCharacter (\r
IN CHAR16 Char\r
)\r
@retval Unchanged Otherwise.\r
\r
**/\r
-STATIC\r
CHAR16\r
+EFIAPI\r
InternalCharToUpper (\r
IN CHAR16 Char\r
)\r
@retval UINTN The numerical value converted.\r
\r
**/\r
-STATIC\r
UINTN\r
+EFIAPI\r
InternalHexCharToUintn (\r
IN CHAR16 Char\r
)\r
@retval FALSE Otherwise.\r
\r
**/\r
-STATIC\r
BOOLEAN\r
+EFIAPI\r
InternalIsHexaDecimalDigitCharacter (\r
IN CHAR16 Char\r
)\r
@retval FALSE Otherwise.\r
\r
**/\r
-STATIC\r
BOOLEAN\r
+EFIAPI\r
InternalAsciiIsDecimalDigitCharacter (\r
IN CHAR8 Char\r
)\r
@retval FALSE Otherwise.\r
\r
**/\r
-STATIC\r
BOOLEAN\r
+EFIAPI\r
InternalAsciiIsHexaDecimalDigitCharacter (\r
IN CHAR8 Char\r
)\r
ASSERT ((UINTN)(Source - Destination) > AsciiStrLen (Source));\r
\r
ReturnValue = Destination;\r
- while (*Source) {\r
+ while (*Source != 0) {\r
*(Destination++) = *(Source++);\r
}\r
*Destination = 0;\r
\r
ReturnValue = Destination;\r
\r
- while (*Source && Length > 0) {\r
+ while (*Source != 0 && Length > 0) {\r
*(Destination++) = *(Source++);\r
Length--;\r
}\r
If Value >= 0xA0, then ASSERT().\r
If (Value & 0x0F) >= 0x0A, then ASSERT().\r
\r
- @param chr one Ascii character\r
+ @param Chr one Ascii character\r
\r
@return The uppercase value of Ascii character \r
\r
**/\r
-STATIC\r
CHAR8\r
+EFIAPI\r
AsciiToUpper (\r
IN CHAR8 Chr\r
)\r
@retval UINTN The numerical value converted.\r
\r
**/\r
-STATIC\r
UINTN\r
+EFIAPI\r
InternalAsciiHexCharToUintn (\r
IN CHAR8 Char\r
)\r
function.\r
@param NewStack A pointer to the new stack to use for the EntryPoint\r
function.\r
+ @param ... Extended parameters.\r
\r
**/\r
VOID\r
\r
#include "BaseLibInternals.h"\r
\r
-//\r
-// Microsoft Visual Studio 7.1 Function Prototypes for read write barrier Intrinsics\r
-//\r
+/**\r
+ Microsoft Visual Studio 7.1 Function Prototypes for read write barrier Intrinsics.\r
+**/\r
void _ReadWriteBarrier (void);\r
#pragma intrinsic(_ReadWriteBarrier)\r
\r
**/\r
\r
\r
-//\r
-// Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics\r
-//\r
+/**\r
+ Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics.\r
+**/\r
void __debugbreak ();\r
\r
#pragma intrinsic(__debugbreak)\r
\r
+/**\r
+ Generates a breakpoint on the CPU.\r
+\r
+ Generates a breakpoint on the CPU. The breakpoint must be implemented such\r
+ that code can resume normal execution after the breakpoint.\r
+\r
+**/\r
VOID\r
EFIAPI\r
CpuBreakpoint (\r
\r
**/\r
\r
-//\r
-// Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics\r
-//\r
+/**\r
+ Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics.\r
+**/\r
long _InterlockedCompareExchange(\r
long volatile * Destination,\r
long Exchange,\r
\r
#pragma intrinsic(_InterlockedCompareExchange)\r
\r
+/**\r
+ Performs an atomic compare exchange operation on a 32-bit unsigned integer.\r
+\r
+ Performs an atomic compare exchange operation on the 32-bit unsigned integer\r
+ specified by Value. If Value is equal to CompareValue, then Value is set to\r
+ ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue,\r
+ then Value is returned. The compare exchange operation must be performed using\r
+ MP safe mechanisms.\r
+\r
+ @param Value A pointer to the 32-bit value for the compare exchange\r
+ operation.\r
+ @param CompareValue 32-bit value used in compare operation.\r
+ @param ExchangeValue 32-bit value used in exchange operation.\r
+\r
+ @return The original *Value before exchange.\r
+\r
+**/\r
UINT32\r
EFIAPI\r
InternalSyncCompareExchange32 (\r
\r
**/\r
\r
-//\r
-// Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics\r
-//\r
+/**\r
+ Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics.\r
+**/\r
__int64 _InterlockedCompareExchange64(\r
__int64 volatile * Destination,\r
__int64 Exchange,\r
\r
#pragma intrinsic(_InterlockedCompareExchange64)\r
\r
+/**\r
+ Performs an atomic compare exchange operation on a 64-bit unsigned integer.\r
+\r
+ Performs an atomic compare exchange operation on the 64-bit unsigned integer specified\r
+ by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and\r
+ CompareValue is returned. If Value is not equal to CompareValue, then Value is returned.\r
+ The compare exchange operation must be performed using MP safe mechanisms.\r
+\r
+ @param Value A pointer to the 64-bit value for the compare exchange\r
+ operation.\r
+ @param CompareValue 64-bit value used in compare operation.\r
+ @param ExchangeValue 64-bit value used in exchange operation.\r
+\r
+ @return The original *Value before exchange.\r
+\r
+**/\r
UINT64\r
EFIAPI\r
InternalSyncCompareExchange64 (\r
\r
**/\r
\r
-//\r
-// Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics\r
-//\r
+/**\r
+ Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics.\r
+**/\r
long _InterlockedDecrement(\r
long * lpAddend\r
);\r
\r
#pragma intrinsic(_InterlockedDecrement)\r
\r
+/**\r
+ Performs an atomic decrement of an 32-bit unsigned integer.\r
+\r
+ Performs an atomic decrement of the 32-bit unsigned integer specified by\r
+ Value and returns the decrement value. The decrement operation must be\r
+ performed using MP safe mechanisms. The state of the return value is not\r
+ guaranteed to be MP safe.\r
+\r
+ @param Value A pointer to the 32-bit value to decrement.\r
+\r
+ @return The decrement value.\r
+\r
+**/\r
UINT32\r
EFIAPI\r
InternalSyncDecrement (\r
\r
**/\r
\r
-//\r
-// Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics\r
-//\r
+/**\r
+ Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics.\r
+**/\r
long _InterlockedIncrement(\r
long * lpAddend\r
);\r
\r
#pragma intrinsic(_InterlockedIncrement)\r
\r
+/**\r
+ Performs an atomic increment of an 32-bit unsigned integer.\r
+\r
+ Performs an atomic increment of the 32-bit unsigned integer specified by\r
+ Value and returns the incremented value. The increment operation must be\r
+ performed using MP safe mechanisms. The state of the return value is not\r
+ guaranteed to be MP safe.\r
+\r
+ @param Value A pointer to the 32-bit value to increment.\r
+\r
+ @return The incremented value.\r
+\r
+**/\r
UINT32\r
EFIAPI\r
InternalSyncIncrement (\r
\r
**/\r
\r
-//\r
-// Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics\r
-//\r
+/**\r
+ Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics.\r
+**/\r
unsigned __int64 __readmsr (int register);\r
\r
#pragma intrinsic(__readmsr)\r
\r
+/**\r
+ Read data to MSR.\r
+\r
+ @param Index Register index of MSR.\r
+\r
+ @return Value read from MSR.\r
+\r
+**/\r
\r
UINT64\r
EFIAPI\r
\r
**/\r
\r
-//\r
-// Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics\r
-//\r
+/**\r
+ Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics.\r
+**/\r
void __writemsr (unsigned long Register, unsigned __int64 Value);\r
\r
#pragma intrinsic(__writemsr)\r
\r
+/**\r
+ Write data to MSR.\r
+\r
+ @param Index Register index of MSR.\r
+ @param Value Data wants to be written.\r
+\r
+ @return Value written to MSR.\r
+\r
+**/\r
UINT64\r
EFIAPI\r
AsmWriteMsr64 (\r
Set Buffer to 0 for Size bytes.\r
\r
@param Buffer Memory to set.\r
- @param Size Number of bytes to set\r
+ @param Length Number of bytes to set\r
\r
@return Buffer\r
\r
/**\r
Copy Length bytes from Source to Destination.\r
\r
- @param Destination Target of copy\r
- @param Source Place to copy from\r
+ @param DestinationBuffer Target of copy\r
+ @param SourceBuffer Place to copy from\r
@param Length Number of bytes to copy\r
\r
@return Destination\r
Set Buffer to Value for Size bytes.\r
\r
@param Buffer Memory to set.\r
- @param Size Number of bytes to set\r
+ @param Length Number of bytes to set\r
@param Value Value of the set operation.\r
\r
@return Buffer\r
Set Buffer to 0 for Size bytes.\r
\r
@param Buffer Memory to set.\r
- @param Size Number of bytes to set\r
+ @param Length Number of bytes to set\r
\r
@return Buffer\r
\r
/**\r
Copy Length bytes from Source to Destination.\r
\r
- @param Destination Target of copy\r
- @param Source Place to copy from\r
+ @param DestinationBuffer Target of copy\r
+ @param SourceBuffer Place to copy from\r
@param Length Number of bytes to copy\r
\r
@return Destination\r
/**\r
Copy Length bytes from Source to Destination.\r
\r
- @param Destination Target of copy\r
- @param Source Place to copy from\r
+ @param DestinationBuffer Target of copy\r
+ @param SourceBuffer Place to copy from\r
@param Length Number of bytes to copy\r
\r
@return Destination\r
/**\r
Copy Length bytes from Source to Destination.\r
\r
- @param Destination Target of copy\r
- @param Source Place to copy from\r
+ @param DestinationBuffer Target of copy\r
+ @param SourceBuffer Place to copy from\r
@param Length Number of bytes to copy\r
\r
@return Destination\r
/**\r
Copy Length bytes from Source to Destination.\r
\r
- @param Destination Target of copy\r
- @param Source Place to copy from\r
+ @param DestinationBuffer Target of copy\r
+ @param SourceBuffer Place to copy from\r
@param Length Number of bytes to copy\r
\r
@return Destination\r
\r
@param Address Address that encodes the PCI Bus, Device, Function and\r
Register.\r
- @param Value The value to write.\r
+ @param Data The value to write.\r
\r
@return The value written to the PCI configuration register.\r
\r
\r
@param Address Address that encodes the PCI Bus, Device, Function and\r
Register.\r
- @param Value The value to write.\r
+ @param Data The value to write.\r
\r
@return The value written to the PCI configuration register.\r
\r
\r
@param Address Address that encodes the PCI Bus, Device, Function and\r
Register.\r
- @param Value The value to write.\r
+ @param Data The value to write.\r
\r
@return The value written to the PCI configuration register.\r
\r
\r
@param Address Address that encodes the PCI Bus, Device, Function and\r
Register.\r
- @param Value The value to write.\r
+ @param Data The value to write.\r
\r
@return The value written to the PCI configuration register.\r
\r
\r
@param Address Address that encodes the PCI Bus, Device, Function and\r
Register.\r
- @param Value The value to write.\r
+ @param Data The value to write.\r
\r
@return The value written to the PCI configuration register.\r
\r
\r
@param Address Address that encodes the PCI Bus, Device, Function and\r
Register.\r
- @param Value The value to write.\r
+ @param Data The value to write.\r
\r
@return The value written to the PCI configuration register.\r
\r
// Include common header file for this module.\r
//\r
\r
+/**\r
+ Flush TLB of current processor.\r
\r
+**/\r
VOID\r
EFIAPI\r
CpuFlushTlb (\r
#ifndef _DXE_HOB_LIB_INTERNAL_H__\r
#define _DXE_HOB_LIB_INTERNAL_H__\r
\r
+/**\r
+ \r
+ Initialize Hob list.\r
+ \r
+ @param ImageHandle ImageHandle of the loaded driver.\r
+ @param SystemTable Pointer to the EFI System Table.\r
+\r
+ @retval EFI_SUCCESS One or more of the drivers returned a success code.\r
+ @retval !EFI_SUCESS The return status from the last driver entry point in the list.\r
+**/\r
EFI_STATUS\r
EFIAPI\r
HobLibConstructor (\r
ASSERT_EFI_ERROR (Status);\r
}\r
\r
+/**\r
+ Frees buffer that were previously allocated with one of the\r
+ memory allocation functions in the Memory Allocation Library.\r
+\r
+ @param Buffer Pointer to the buffer of pages\r
+ to free.\r
\r
+**/\r
VOID\r
EFIAPI\r
SafeFreePool (\r
This function wraps the gBS->SetMem().\r
\r
@param Buffer Memory to set.\r
- @param Length Number of bytes to set.\r
+ @param Size Number of bytes to set.\r
@param Value Value of the set operation.\r
\r
@return Buffer.\r
Set Buffer to 0 for Size bytes.\r
\r
@param Buffer Memory to set.\r
- @param Size Number of bytes to set\r
+ @param Length Number of bytes to set\r
\r
@return Buffer\r
\r
/**\r
Copy Length bytes from Source to Destination.\r
\r
- @param Destination Target of copy\r
- @param Source Place to copy from\r
+ @param DestinationBuffer Target of copy\r
+ @param SourceBuffer Place to copy from\r
@param Length Number of bytes to copy\r
\r
@return Destination\r
Set Buffer to Value for Size bytes.\r
\r
@param Buffer Memory to set.\r
- @param Size Number of bytes to set\r
+ @param Length Number of bytes to set\r
@param Value Value of the set operation.\r
\r
@return Buffer\r
Set Buffer to 0 for Size bytes.\r
\r
@param Buffer Memory to set.\r
- @param Size Number of bytes to set\r
+ @param Length Number of bytes to set\r
\r
@return Buffer\r
\r
@retval VOID* Return the pointer for the buffer been set.\r
\r
**/\r
-\r
VOID *\r
EFIAPI\r
LibPcdSetPtr (\r
@retval EFI_ACCESS_DENIED The firmware volume containing the searched Firmware File is configured to disallow reads.\r
\r
**/\r
-\r
EFI_STATUS\r
EFIAPI\r
PiLibGetSectionFromCurrentFv (\r
@retval EFI_ACCESS_DENIED The firmware volume containing the searched Firmware File is configured to disallow reads.\r
\r
**/\r
-\r
EFI_STATUS\r
EFIAPI\r
PiLibGetSectionFromCurrentFfs (\r
\r
**/\r
\r
-#ifndef _DXE_SERVICE_TABLE_LIB_INTERNAL_H\r
-#define _DXE_SERVICE_TABLE_LIB_INTERNAL_H\r
+#ifndef _DXE_SERVICE_TABLE_LIB_INTERNAL_H_\r
+#define _DXE_SERVICE_TABLE_LIB_INTERNAL_H_\r
\r
\r
/**\r
\r
**/\r
\r
-#ifndef __INTERNAL_SMBUS_LIB_H\r
-#define __INTERNAL_SMBUS_LIB_H\r
+#ifndef __INTERNAL_SMBUS_LIB_H_\r
+#define __INTERNAL_SMBUS_LIB_H_\r
\r
\r
#include <PiDxe.h>\r
@return The address of new HOB.\r
\r
**/\r
-STATIC\r
VOID *\r
+EFIAPI\r
InternalPeiCreateHob (\r
IN UINT16 Type,\r
IN UINT16 Length\r
\r
ReturnBuffer = Buffer;\r
\r
- while (Length--) {\r
+ while (Length-- != 0) {\r
*(Buffer++) = MmioRead8 (StartAddress++);\r
}\r
\r
\r
ReturnBuffer = Buffer;\r
\r
- while (Length) {\r
+ while (Length != 0) {\r
*(Buffer++) = MmioRead16 (StartAddress);\r
StartAddress += sizeof (UINT16);\r
Length -= sizeof (UINT16);\r
\r
ReturnBuffer = Buffer;\r
\r
- while (Length) {\r
+ while (Length != 0) {\r
*(Buffer++) = MmioRead32 (StartAddress);\r
StartAddress += sizeof (UINT32);\r
Length -= sizeof (UINT32);\r
\r
ReturnBuffer = Buffer;\r
\r
- while (Length) {\r
+ while (Length != 0) {\r
*(Buffer++) = MmioRead64 (StartAddress);\r
StartAddress += sizeof (UINT64);\r
Length -= sizeof (UINT64);\r
\r
ReturnBuffer = (UINT8 *) Buffer;\r
\r
- while (Length--) {\r
+ while (Length-- != 0) {\r
MmioWrite8 (StartAddress++, *(Buffer++));\r
}\r
\r
\r
ReturnBuffer = (UINT16 *) Buffer;\r
\r
- while (Length) {\r
+ while (Length != 0) {\r
MmioWrite16 (StartAddress, *(Buffer++));\r
\r
StartAddress += sizeof (UINT16);\r
\r
ReturnBuffer = (UINT32 *) Buffer;\r
\r
- while (Length) {\r
+ while (Length != 0) {\r
MmioWrite32 (StartAddress, *(Buffer++));\r
\r
StartAddress += sizeof (UINT32);\r
\r
ReturnBuffer = (UINT64 *) Buffer;\r
\r
- while (Length) {\r
+ while (Length != 0) {\r
MmioWrite64 (StartAddress, *(Buffer++));\r
\r
StartAddress += sizeof (UINT64);\r
This function wraps the gPS->SetMem ().\r
\r
@param Buffer Memory to set.\r
- @param Length Number of bytes to set.\r
+ @param Size Number of bytes to set.\r
@param Value Value of the set operation.\r
\r
@return Buffer.\r
Set Buffer to 0 for Size bytes.\r
\r
@param Buffer Memory to set.\r
- @param Size Number of bytes to set\r
+ @param Length Number of bytes to set\r
\r
@return Buffer\r
\r
/**\r
Copy Length bytes from Source to Destination.\r
\r
- @param Destination Target of copy\r
- @param Source Place to copy from\r
- @param Length Number of bytes to copy\r
+ @param DestinationBuffer Target of copy\r
+ @param SourceBuffer Place to copy from\r
+ @param Length Number of bytes to copy\r
\r
@return Destination\r
\r
Set Buffer to Value for Size bytes.\r
\r
@param Buffer Memory to set.\r
- @param Size Number of bytes to set\r
+ @param Length Number of bytes to set\r
@param Value Value of the set operation.\r
\r
@return Buffer\r
Set Buffer to 0 for Size bytes.\r
\r
@param Buffer Memory to set.\r
- @param Size Number of bytes to set\r
+ @param Length Number of bytes to set\r
\r
@return Buffer\r
\r
firmware volume.\r
@param FvInfoSize Size of the data provided by FvInfo. For memory-mapped firmware volumes, this is\r
typically the size of the firmware volume.\r
- @param ParentFvName, ParentFileName If the firmware volume originally came from a firmware file, then these point to the\r
- parent firmware volume name and firmware volume file. If it did not originally come\r
- from a firmware file, these should be NULL\r
+ @param ParentFvName If the firmware volume originally came from a firmware file, then these point to the\r
+ parent firmware volume name. If it did not originally come\r
+ from a firmware file, these should be NULL.\r
+ @param ParentFileName If the firmware volume originally came from a firmware file, then these point to the\r
+ firmware volume file. If it did not originally come\r
+ from a firmware file, these should be NULL.\r
\r
**/\r
VOID\r
\r
@param Instance This instance of the firmware volume to find. The value 0 is the\r
Boot Firmware Volume (BFV).\r
- @param FwVolHeader Pointer to the firmware volume header of the volume to return.\r
+ @param VolumeHandle Handle of the firmware volume header of the volume to return.\r
\r
@retval EFI_SUCCESS The volume was found.\r
@retval EFI_NOT_FOUND The volume was not found.\r
This service enables PEIMs to discover additional firmware files.\r
\r
@param SearchType A filter to find files only of this type.\r
- @param FwVolHeader Pointer to the firmware volume header of the volume to search.\r
+ @param VolumeHandle Pointer to the firmware volume header of the volume to search.\r
This parameter must point to a valid FFS volume.\r
- @param FileHeader Pointer to the current file from which to begin searching.\r
+ @param FileHandle Handle of the current file from which to begin searching.\r
\r
@retval EFI_SUCCESS The file was found.\r
@retval EFI_NOT_FOUND The file was not found.\r
/**\r
This service enables PEIMs to discover sections of a given type within a valid FFS file.\r
\r
- @param SearchType The value of the section type to find.\r
+ @param SectionType The value of the section type to find.\r
@param FfsFileHeader A pointer to the file header that contains the set of sections to\r
be searched.\r
@param SectionData A pointer to the discovered section, if successful.\r
Upon exit, points to the found file's\r
handle or NULL if it could not be found.\r
\r
+ @param FileHandle The filehandle found in volume.\r
+\r
@retval EFI_SUCCESS File was found.\r
\r
@retval EFI_NOT_FOUND File was not found.\r
\r
#include "PeiServicesTablePointerInternal.h"\r
\r
-static EFI_PEI_SERVICES **gPeiServices;\r
+STATIC EFI_PEI_SERVICES **gPeiServices;\r
\r
/**\r
The function set the pointer of PEI services immediately preceding the IDT table\r
The constructor function caches the pointer to PEI services.\r
It will always return EFI_SUCCESS.\r
\r
- @param FfsHeader Pointer to FFS header the loaded driver.\r
+ @param FileHandle Handle of FFS header the loaded driver.\r
@param PeiServices Pointer to the PEI services.\r
\r
@retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.\r
\r
#ifndef _PEI_SERVICE_TABLE_POINTER_INTERNAL_H_\r
#define _PEI_SERVICE_TABLE_POINTER_INTERNAL_H_\r
+\r
/**\r
The constructor function caches the pointer to PEI services.\r
\r
The constructor function caches the pointer to PEI services.\r
It will always return EFI_SUCCESS.\r
\r
- @param FfsHeader Pointer to FFS header the loaded driver.\r
+ @param FileHandle Handle of FFS header the loaded driver.\r
@param PeiServices Pointer to the PEI services.\r
\r
@retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.\r
The function set the pointer of PEI services immediately preceding the IDT table\r
according to PI specification.\r
\r
- @param PeiServices The address of PeiServices pointer.\r
+ @param PeiServicesTablePointer The address of PeiServices pointer.\r
**/\r
VOID\r
EFIAPI\r
\r
**/\r
\r
-#ifndef __INTERNAL_SMBUS_LIB_H\r
-#define __INTERNAL_SMBUS_LIB_H\r
+#ifndef __INTERNAL_SMBUS_LIB_H_\r
+#define __INTERNAL_SMBUS_LIB_H_\r
\r
\r
#include <PiPei.h>\r
-\r
/** @file\r
Entry point to a PEIM.\r
\r
\r
**/\r
VOID\r
+EFIAPI\r
InternalIpfDelay (\r
IN INT64 Delay\r
)\r
\r
**/\r
UINTN\r
+EFIAPI\r
InternalX86GetApicBase (\r
VOID\r
)\r
\r
**/\r
UINT32\r
+EFIAPI\r
InternalX86GetTimerFrequency (\r
IN UINTN ApicBase\r
)\r
\r
**/\r
INT32\r
+EFIAPI\r
InternalX86GetTimerTick (\r
IN UINTN ApicBase\r
)\r
\r
**/\r
VOID\r
+EFIAPI\r
InternalX86Delay (\r
IN UINTN ApicBase,\r
IN UINT32 Delay\r
\r
**/\r
\r
-#ifndef _UefiBootServicesTable_Lib_H\r
-#define _UefiBootServicesTable_Lib_H\r
+#ifndef _UEFIBOOTSERVICESTABLE_LIB_H_\r
+#define _UEFIBOOTSERVICESTABLE_LIB_H_\r
+/**\r
+ \r
+ Initialize gBS.\r
+ \r
+ @param ImageHandle ImageHandle of the loaded driver.\r
+ @param SystemTable Pointer to the EFI System Table.\r
\r
+ @retval EFI_SUCCESS One or more of the drivers returned a success code.\r
+ @retval !EFI_SUCESS The return status from the last driver entry point in the list.\r
+**/\r
EFI_STATUS\r
EFIAPI\r
UefiBootServicesTableLibConstructor (\r
@retval FALSE Language 1 and language 2 are not the same.\r
\r
**/\r
-STATIC\r
BOOLEAN\r
CompareIso639LanguageCode (\r
IN CONST CHAR8 *Language1,\r
\r
@param VOID\r
\r
- @retvale EFI_TPL The current TPL.\r
+ @retval EFI_TPL The current TPL.\r
\r
**/\r
EFI_TPL\r
priority level of the mutual exclusion lock. Then, it places the lock in the\r
acquired state.\r
\r
- @param Priority The task priority level of the lock.\r
+ @param Lock The task lock with priority level.\r
\r
**/\r
VOID\r
\r
@param ControllerHandle A handle for a (parent) controller to test.\r
@param ChildHandle A child handle to test.\r
- @param ConsumsedGuid Supplies the protocol that the child controller\r
+ @param ProtocolGuid Supplies the protocol that the child controller\r
opens on its parent controller.\r
\r
@retval EFI_SUCCESS ChildHandle is a child of the ControllerHandle.\r
while (OldUnicodeStringTable->Language != NULL) {\r
LanguageString = OldUnicodeStringTable->Language;\r
\r
- while (*LanguageString) {\r
+ while (*LanguageString != 0) {\r
for (Index = 0; LanguageString[Index] != 0 && LanguageString[Index] != ';'; Index++);\r
\r
if (AsciiStrnCmp (Language, LanguageString, Index) == 0) { \r
-/**@file\r
+/** @file\r
Internal include file for UefiLib.\r
\r
Copyright (c) 2007, Intel Corporation.<BR>\r
@return The number of Unicode characters in the produced\r
output buffer not including the Null-terminator.\r
**/\r
-\r
-STATIC\r
UINTN\r
+EFIAPI\r
InternalPrint (\r
IN CONST CHAR16 *Format,\r
IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *Console,\r
output buffer not including the Null-terminator.\r
\r
**/\r
-STATIC\r
UINTN\r
+EFIAPI\r
AsciiInternalPrint (\r
IN CONST CHAR8 *Format,\r
IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *Console,\r
\r
This empty function ensures that EFI_EVENT_NOTIFY_SIGNAL_ALL is error\r
checked correctly since it is now mapped into CreateEventEx() in UEFI 2.0.\r
+ \r
+ @param Event Event whose notification function is being invoked.\r
+ @param Context Pointer to the notification function's context,\r
+ which is implementation-dependent.\r
\r
**/\r
-STATIC\r
VOID\r
EFIAPI\r
InternalEmptyFuntion (\r
the EDK/EFI 1.10 form and EDK II/UEFI 2.0 form and allows common code to\r
work both ways.\r
\r
- @param LegacyBootEvent Returns the EFI event returned from gBS->CreateEvent(Ex).\r
+ @param ReadyToBootEvent Returns the EFI event returned from gBS->CreateEvent(Ex).\r
\r
@retval EFI_SUCCESS Event was created.\r
@retval Other Event was not created.\r
@param NotifyTpl The task priority level of the event.\r
@param NotifyFunction The notification function to call when the event is signaled.\r
@param NotifyContext The content to pass to NotifyFunction when the event is signaled.\r
- @param LegacyBootEvent Returns the EFI event returned from gBS->CreateEvent(Ex).\r
+ @param ReadyToBootEvent Returns the EFI event returned from gBS->CreateEvent(Ex).\r
\r
@retval EFI_SUCCESS Event was created.\r
@retval Other Event was not created.\r
function points to a location in FvDevicePathNode and it does not allocate\r
new memory for the GUID pointer that is returned.\r
\r
- @param FvDevicePathNode Pointer to FV device path to check.\r
+ @param FvFileDevicePathNode Pointer to FV device path to check.\r
\r
@retval NULL FvDevicePathNode is not valid.\r
@retval Other FvDevicePathNode is valid and pointer to NameGuid was returned.\r
is compiled to conform with the UEFI 2.0 specification use the new device path\r
else use the old form for backwards compatability.\r
\r
- @param FvDevicePathNode Pointer to a FV device path node to initialize\r
+ @param FvFileDevicePathNode Pointer to a FV device path node to initialize\r
@param NameGuid FV file name to use in FvDevicePathNode\r
\r
**/\r
-/**@file\r
+/** @file\r
Library utility functions for Runtime driver.\r
\r
Copyright (c) 2006 Intel Corporation. <BR>\r
EFI_RUNTIME_SERVICES *mRT;\r
\r
/**\r
- Set AtRuntime flag as TRUE after ExitBootServices\r
+ Set AtRuntime flag as TRUE after ExitBootServices.\r
\r
@param[in] Event The Event that is being processed\r
@param[in] Context Event Context\r
EfiInitializeRuntimeDriverLib(). If a runtime driver exits with an error,\r
it must call this routine to free the allocated resource before the exiting.\r
\r
+ @param[in] ImageHandle The firmware allocated handle for the EFI image.\r
+ @param[in] SystemTable A pointer to the EFI System Table.\r
+\r
@retval EFI_SUCCESS Shutdown the Runtime Driver Lib successfully\r
@retval EFI_UNSUPPORTED Runtime Driver lib was not initialized at all\r
**/\r
}\r
\r
/**\r
- Return TRUE if ExitBootServices () has been called\r
+ Return TRUE if ExitBootServices () has been called.\r
\r
@retval TRUE If ExitBootServices () has been called\r
**/\r
}\r
\r
/**\r
- Return TRUE if SetVirtualAddressMap () has been called\r
+ Return TRUE if SetVirtualAddressMap () has been called.\r
\r
@retval TRUE If SetVirtualAddressMap () has been called\r
**/\r
stored in contiguous virtual memory.\r
@param CapsuleCount Number of pointers to EFI_CAPSULE_HEADER in\r
CaspuleHeaderArray.\r
- @param MaxiumCapsuleSize On output the maximum size that UpdateCapsule() can\r
+ @param MaximumCapsuleSize On output the maximum size that UpdateCapsule() can\r
support as an argument to UpdateCapsule() via\r
CapsuleHeaderArray and ScatterGatherList.\r
Undefined on input.\r
\r
@param[in] ScsiIo SCSI IO Protocol to use\r
@param[in] Timeout The length of timeout period.\r
- @param[out] SenseData A pointer to output sense data.\r
+ @param[in] SenseData A pointer to output sense data.\r
@param[in out] SenseDataLength On input, the length in bytes of the SenseData buffer. On\r
output, the number of bytes written to the SenseData buffer.\r
@param[out] HostAdapterStatus The status of Host Adapter.\r
@param[out] TargetStatus The status of the target.\r
- @param[in] InquirydataBuffer A pointer to inquiry data buffer.\r
- @param[in,out] InquiryDataLength The length of inquiry data buffer.\r
+ @param[in] InquirydDtaBuffer A pointer to inquiry data buffer.\r
+ @param[in out] InquiryDataLength The length of inquiry data buffer.\r
@param[in] EnableVitalProductData Boolean to enable Vital Product Data.\r
\r
@retval EFI_SUCCESS The status of the unit is tested successfully.\r
\r
@param[in] ScsiIo A pointer to SCSI IO protocol.\r
@param[in] Timeout The length of timeout period.\r
- @param[out] SenseData A pointer to output sense data.\r
+ @param[in] SenseData A pointer to output sense data.\r
@param[in out] SenseDataLength On input, the length in bytes of the SenseData buffer. On\r
output, the number of bytes written to the SenseData buffer.\r
@param[out] HostAdapterStatus The status of Host Adapter.\r
@param[out] TargetStatus The status of the target.\r
@param[in] DataBuffer A pointer to input data buffer.\r
- @param[in,out] DataLength The length of input data buffer.\r
+ @param[in out] DataLength The length of input data buffer.\r
@param[in] DBDField The DBD Field (Optional).\r
@param[in] PageControl Page Control.\r
@param[in] PageCode Page code.\r
\r
@param[in] ScsiIo A pointer to SCSI IO protocol.\r
@param[in] Timeout The length of timeout period.\r
- @param[out] SenseData A pointer to output sense data.\r
+ @param[in] SenseData A pointer to output sense data.\r
@param[in out] SenseDataLength On input, the length in bytes of the SenseData buffer. On\r
output, the number of bytes written to the SenseData buffer.\r
@param[out] HostAdapterStatus The status of Host Adapter.\r
@param[out] TargetStatus The status of the target.\r
@param[out] DataBuffer A pointer to a data buffer.\r
- @param[in,out] DataLength The length of data buffer.\r
+ @param[in out] DataLength The length of data buffer.\r
@param[in] PMI Partial medium indicator.\r
\r
@retval EFI_SUCCESS The status of the unit is tested successfully.\r
\r
@param[in] ScsiIo A pointer to SCSI IO protocol.\r
@param[in] Timeout The length of timeout period.\r
- @param[out] SenseData A pointer to output sense data.\r
+ @param[in] SenseData A pointer to output sense data.\r
@param[in out] SenseDataLength On input, the length in bytes of the SenseData buffer. On\r
output, the number of bytes written to the SenseData buffer.\r
@param[out] HostAdapterStatus The status of Host Adapter.\r
@param[out] TargetStatus The status of the target.\r
@param[out] DataBuffer Read 10 command data.\r
- @param[in,out] DataLength The length of data buffer.\r
+ @param[in out] DataLength The length of data buffer.\r
@param[in] StartLba The start address of LBA.\r
@param[in] SectorSize The sector size.\r
\r
\r
@param[in] ScsiIo SCSI IO Protocol to use\r
@param[in] Timeout The length of timeout period.\r
- @param[out] SenseData A pointer to output sense data.\r
- @param[in out] SenseDataLength On input, the length in bytes of the SenseData buffer. On\r
+ @param[in] SenseData A pointer to output sense data.\r
+ @param[in out] SenseDataLength On input, the length in bytes of the SenseData buffer. On\r
output, the number of bytes written to the SenseData buffer.\r
@param[out] HostAdapterStatus The status of Host Adapter.\r
@param[out] TargetStatus The status of the target.\r
@param[out] DataBuffer A pointer to a data buffer.\r
- @param[in,out] DataLength The length of data buffer.\r
+ @param[in out] DataLength The length of data buffer.\r
@param[in] StartLba The start address of LBA.\r
@param[in] SectorSize The sector size.\r
\r
projects / mirror_edk2.git / commitdiff