ArmPkg/ArmCortexA5x: Declared the helper functions to access the CPU Extended Control...

This register is A5x specific. It is the reason why the code moved from ArmLib
to ArmCpuLib/ArmCortexA5xLib.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15397 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/AArch64/ArmCortexA5xHelper.S b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/AArch64/ArmCortexA5xHelper.S
new file mode 100644 (file)
index 0000000..e5fbc86
--- /dev/null
+++ b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/AArch64/ArmCortexA5xHelper.S
@@ -0,0 +1,32 @@
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2013 - 2014, ARM Limited. All rights reserved.\r
+#\r
+# This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+#include <AsmMacroIoLibV8.h>\r
+\r
+.text\r
+.align 3\r
+GCC_ASM_EXPORT (ArmReadCpuExCr)\r
+GCC_ASM_EXPORT (ArmWriteCpuExCr)\r
+\r
+ASM_PFX(ArmReadCpuExCr):\r
+  mrs   x0, S3_1_c15_c2_1\r
+  ret\r
+\r
+ASM_PFX(ArmWriteCpuExCr):\r
+  msr   S3_1_c15_c2_1, x0\r
+  dsb   sy\r
+  isb\r
+  ret\r
+\r
+ASM_FUNCTION_REMOVE_IF_UNREFERENCED\r

diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.c b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.c
index d13c7fd6fae210cb168167628f39566d24dc9227..890c9df16524a1c4d187dffd52809a7121c8d3c4 100644 (file)
--- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.c
+++ b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.c
@@ -48,3 +48,27 @@ ArmCpuSetupSmpNonSecure (
   )\r
 {\r
 }\r
+\r
+VOID\r
+EFIAPI\r
+ArmSetCpuExCrBit (\r
+  IN  UINT64    Bits\r
+  )\r
+{\r
+  UINT64 Value;\r
+  Value =  ArmReadCpuExCr ();\r
+  Value |= Bits;\r
+  ArmWriteCpuExCr (Value);\r
+}\r
+\r
+VOID\r
+EFIAPI\r
+ArmUnsetCpuExCrBit (\r
+  IN  UINT64    Bits\r
+  )\r
+{\r
+  UINT64 Value;\r
+  Value = ArmReadCpuExCr ();\r
+  Value &= ~Bits;\r
+  ArmWriteCpuExCr (Value);\r
+}\r

diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.inf b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.inf
index 486aba74a3653c27812c6421a896f79028493fc4..acfa98d41db8fba6f75ce4cc766387987b4ed584 100644 (file)
--- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.inf
+++ b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.inf
@@ -1,5 +1,5 @@
 #/* @file\r
-#  Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r
+#  Copyright (c) 2011-2014, ARM Limited. All rights reserved.\r
 #\r
 #  This program and the accompanying materials\r
 #  are licensed and made available under the terms and conditions of the BSD License\r
@@ -31,5 +31,8 @@
 [Sources.common]\r
   ArmCortexA5xLib.c\r
 \r
+[Sources.AARCH64]\r
+  AArch64/ArmCortexA5xHelper.S | GCC\r
+\r
 [FixedPcd]\r
   gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz\r

diff --git a/ArmPkg/Include/Chipset/ArmCortexA5x.h b/ArmPkg/Include/Chipset/ArmCortexA5x.h
index e2217e3f3a6668eb5c7755bcb10a2eaf6f1cdc56..ba3d5197e9392a8c56f532726a3ff337a34ea10f 100644 (file)
--- a/ArmPkg/Include/Chipset/ArmCortexA5x.h
+++ b/ArmPkg/Include/Chipset/ArmCortexA5x.h
@@ -1,6 +1,6 @@
 /** @file\r
 \r
-  Copyright (c) 2012-2013, ARM Limited. All rights reserved.\r
+  Copyright (c) 2012-2014, ARM Limited. All rights reserved.\r
 \r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
@@ -20,4 +20,31 @@
 //\r
 #define A5X_FEATURE_SMP     (1 << 6)\r
 \r
+//\r
+// Helper functions to access CPU Extended Control Register\r
+//\r
+UINT64\r
+EFIAPI\r
+ArmReadCpuExCr (\r
+  VOID\r
+  );\r
+\r
+VOID\r
+EFIAPI\r
+ArmWriteCpuExCr (\r
+  IN  UINT64 Val\r
+  );\r
+\r
+VOID\r
+EFIAPI\r
+ArmSetCpuExCrBit (\r
+  IN  UINT64    Bits\r
+  );\r
+\r
+VOID\r
+EFIAPI\r
+ArmUnsetCpuExCrBit (\r
+  IN  UINT64    Bits\r
+  );\r
+\r
 #endif\r

diff --git a/ArmPkg/Library/ArmLib/Common/AArch64/ArmLibSupport.S b/ArmPkg/Library/ArmLib/Common/AArch64/ArmLibSupport.S
index f169d02aaace7f3194b9ea0ff63d0adba58e9cac..28db98b417c32a815e4920914f489e1076fbcc60 100644 (file)
--- a/ArmPkg/Library/ArmLib/Common/AArch64/ArmLibSupport.S
+++ b/ArmPkg/Library/ArmLib/Common/AArch64/ArmLibSupport.S
@@ -37,8 +37,6 @@ GCC_ASM_EXPORT (ArmWriteScr)
 GCC_ASM_EXPORT (ArmWriteMVBar)\r
 GCC_ASM_EXPORT (ArmCallWFE)\r
 GCC_ASM_EXPORT (ArmCallSEV)\r
-GCC_ASM_EXPORT (ArmReadCpuExCr)\r
-GCC_ASM_EXPORT (ArmWriteCpuExCr)\r
 GCC_ASM_EXPORT (ArmReadCpuActlr)\r
 GCC_ASM_EXPORT (ArmWriteCpuActlr)\r
 \r
@@ -200,16 +198,6 @@ ASM_PFX(ArmCallSEV):
   sev\r
   ret\r
 \r
-ASM_PFX(ArmReadCpuExCr):\r
-  mrs   x0, S3_1_c15_c2_1\r
-  ret\r
-\r
-ASM_PFX(ArmWriteCpuExCr):\r
-  msr   S3_1_c15_c2_1, x0\r
-  dsb   sy\r
-  isb\r
-  ret\r
-\r
 ASM_PFX(ArmReadCpuActlr):\r
   mrs   x0, S3_1_c15_c2_0\r
   ret\r