IntelFsp2Pkg: Adopt FSP 2.3 specification.

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3674

Add ExtendedImageRevision in FSP_INFO_HEADER structure, also add
FSP_NON_VOLATILE_STORAGE_HOB2 header.

Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>

diff --git a/IntelFsp2Pkg/Include/Guid/FspHeaderFile.h b/IntelFsp2Pkg/Include/Guid/FspHeaderFile.h
index 3474bac1deeedd05217f9b66b632fb150f7b4b30..11e0ede65b42be73866473779a111fa48615b014 100644 (file)
--- a/IntelFsp2Pkg/Include/Guid/FspHeaderFile.h
+++ b/IntelFsp2Pkg/Include/Guid/FspHeaderFile.h
@@ -2,7 +2,7 @@
   Intel FSP Header File definition from Intel Firmware Support Package External\r
   Architecture Specification v2.0 and above.\r
 \r
   Intel FSP Header File definition from Intel Firmware Support Package External\r
   Architecture Specification v2.0 and above.\r
 \r

-  Copyright (c) 2014 - 2020, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2014 - 2021, Intel Corporation. All rights reserved.<BR>\r

   SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r
   SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r


@@ -44,14 +44,28 @@ typedef struct {
   UINT8   Reserved1[2];\r
   ///\r
   /// Byte 0x0A: Indicates compliance with a revision of this specification in the BCD format.\r
   UINT8   Reserved1[2];\r
   ///\r
   /// Byte 0x0A: Indicates compliance with a revision of this specification in the BCD format.\r

+  ///            For revision v2.3 the value will be 0x23.\r

   ///\r
   UINT8   SpecVersion;\r
   ///\r
   /// Byte 0x0B: Revision of the FSP Information Header.\r
   ///\r
   UINT8   SpecVersion;\r
   ///\r
   /// Byte 0x0B: Revision of the FSP Information Header.\r

+  ///            The Current value for this field is 0x6.\r

   ///\r
   UINT8   HeaderRevision;\r
   ///\r
   /// Byte 0x0C: Revision of the FSP binary.\r
   ///\r
   UINT8   HeaderRevision;\r
   ///\r
   /// Byte 0x0C: Revision of the FSP binary.\r

+  ///            Major.Minor.Revision.Build\r
+  ///            If FSP HeaderRevision is <= 5, the ImageRevision can be decoded as follows:\r
+  ///               7 : 0  - Build Number\r
+  ///              15 : 8  - Revision\r
+  ///              23 : 16 - Minor Version\r
+  ///              31 : 24 - Major Version\r
+  ///            If FSP HeaderRevision is >= 6, ImageRevision specifies the low-order bytes of the build number and revision\r
+  ///            while ExtendedImageRevision specifies the high-order bytes of the build number and revision.\r
+  ///               7 : 0  - Low Byte of Build Number\r
+  ///              15 : 8  - Low Byte of Revision\r
+  ///              23 : 16 - Minor Version\r
+  ///              31 : 24 - Major Version\r

   ///\r
   UINT32  ImageRevision;\r
   ///\r
   ///\r
   UINT32  ImageRevision;\r
   ///\r


@@ -116,6 +130,23 @@ typedef struct {
   ///            If the value is set to 0x00000000, then this API is not available in this component.\r
   ///\r
   UINT32  FspMultiPhaseSiInitEntryOffset;\r
   ///            If the value is set to 0x00000000, then this API is not available in this component.\r
   ///\r
   UINT32  FspMultiPhaseSiInitEntryOffset;\r

+  ///\r
+  /// Byte 0x4C: Extended revision of the FSP binary.\r
+  ///            This value is only valid if FSP HeaderRevision is >= 6.\r
+  ///            ExtendedImageRevision specifies the high-order byte of the revision and build number in the FSP binary revision.\r
+  ///               7 : 0 - High Byte of Build Number\r
+  ///              15 : 8 - High Byte of Revision\r
+  ///            The FSP binary build number can be decoded as follows:\r
+  ///            Build Number = (ExtendedImageRevision[7:0] << 8) | ImageRevision[7:0]\r
+  ///            Revision = (ExtendedImageRevision[15:8] << 8) | ImageRevision[15:8]\r
+  ///            Minor Version = ImageRevision[23:16]\r
+  ///            Major Version = ImageRevision[31:24]\r
+  ///\r
+  UINT16  ExtendedImageRevision;\r
+  ///\r
+  /// Byte 0x4E: Reserved4.\r
+  ///\r
+  UINT16  Reserved4;\r

 } FSP_INFO_HEADER;\r
 \r
 ///\r
 } FSP_INFO_HEADER;\r
 \r
 ///\r

diff --git a/IntelFsp2Pkg/Include/Guid/FspNonVolatileStorageHob2.h b/IntelFsp2Pkg/Include/Guid/FspNonVolatileStorageHob2.h
new file mode 100644 (file)
index 0000000..1246108
--- /dev/null
+++ b/IntelFsp2Pkg/Include/Guid/FspNonVolatileStorageHob2.h
@@ -0,0 +1,24 @@
+/** @file\r
+  Intel FSP Non-Volatile Storage (NVS) HOB version 2 definition from\r
+  Intel Firmware Support Package External Architecture Specification v2.3.\r
+\r
+  Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>\r
+  SPDX-License-Identifier: BSD-2-Clause-Patent\r
+\r
+**/\r
+\r
+#ifndef __FSP_NON_VOLATILE_STORAGE_HOB2_H__\r
+#define __FSP_NON_VOLATILE_STORAGE_HOB2_H__\r
+\r
+///\r
+/// The Non-Volatile Storage (NVS) HOB version 2 provides > 64KB buffer support.\r
+///\r
+typedef struct {\r
+  EFI_HOB_GUID_TYPE    GuidHob;\r
+  EFI_PHYSICAL_ADDRESS NvsDataPtr;\r
+  UINT64               NvsDataLength;\r
+} FSP_NON_VOLATILE_STORAGE_HOB2;\r
+\r
+extern EFI_GUID gFspNonVolatileStorageHob2Guid;\r
+\r
+#endif\r

diff --git a/IntelFsp2Pkg/IntelFsp2Pkg.dec b/IntelFsp2Pkg/IntelFsp2Pkg.dec
index ec7b9a770240692e6c7db49ffa29c7f1a2994167..58eac7220dd712dfb302dc8af5067aec2364dc66 100644 (file)
--- a/IntelFsp2Pkg/IntelFsp2Pkg.dec
+++ b/IntelFsp2Pkg/IntelFsp2Pkg.dec
@@ -68,6 +68,7 @@
   # Guid define in FSP EAS\r
   gFspHeaderFileGuid                    = { 0x912740BE, 0x2284, 0x4734, { 0xB9, 0x71, 0x84, 0xB0, 0x27, 0x35, 0x3F, 0x0C } }\r
   gFspReservedMemoryResourceHobGuid     = { 0x69a79759, 0x1373, 0x4367, { 0xa6, 0xc4, 0xc7, 0xf5, 0x9e, 0xfd, 0x98, 0x6e } }\r
   # Guid define in FSP EAS\r
   gFspHeaderFileGuid                    = { 0x912740BE, 0x2284, 0x4734, { 0xB9, 0x71, 0x84, 0xB0, 0x27, 0x35, 0x3F, 0x0C } }\r
   gFspReservedMemoryResourceHobGuid     = { 0x69a79759, 0x1373, 0x4367, { 0xa6, 0xc4, 0xc7, 0xf5, 0x9e, 0xfd, 0x98, 0x6e } }\r

+  gFspNonVolatileStorageHob2Guid        = { 0x4866788f, 0x6ba8, 0x47d8, { 0x83, 0x06, 0xac, 0xf7, 0x7f, 0x55, 0x10, 0x46 } }\r

   gFspNonVolatileStorageHobGuid         = { 0x721acf02, 0x4d77, 0x4c2a, { 0xb3, 0xdc, 0x27, 0x0b, 0x7b, 0xa9, 0xe4, 0xb0 } }\r
   gFspBootLoaderTolumHobGuid            = { 0x73ff4f56, 0xaa8e, 0x4451, { 0xb3, 0x16, 0x36, 0x35, 0x36, 0x67, 0xad, 0x44 } } # FSP EAS v1.1\r
 \r
   gFspNonVolatileStorageHobGuid         = { 0x721acf02, 0x4d77, 0x4c2a, { 0xb3, 0xdc, 0x27, 0x0b, 0x7b, 0xa9, 0xe4, 0xb0 } }\r
   gFspBootLoaderTolumHobGuid            = { 0x73ff4f56, 0xaa8e, 0x4451, { 0xb3, 0x16, 0x36, 0x35, 0x36, 0x67, 0xad, 0x44 } } # FSP EAS v1.1\r
 \r