BaseTools/GenFw: align RVA of debug

SVN commit r18077 ("BaseTools/GenFw: move .debug contents to .data to
save space") removed the separate .debug section after moving its
contents into .text or .data. However, this change does not take into
account that some of these contents need to appear at a 32-bit aligned
offset. So align the debug data RVA to 32 bits.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18443 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/BaseTools/Source/C/GenFw/Elf32Convert.c b/BaseTools/Source/C/GenFw/Elf32Convert.c
index e1b92ebd713ef990899e5b48727e2703445f3d49..4b330a61669fb55c0dfa06bcc5d61d8debbd96e6 100644 (file)
--- a/BaseTools/Source/C/GenFw/Elf32Convert.c
+++ b/BaseTools/Source/C/GenFw/Elf32Convert.c
@@ -218,6 +218,15 @@ CoffAlign (
   return (Offset + mCoffAlignment - 1) & ~(mCoffAlignment - 1);\r
 }\r
 \r
+STATIC\r
+UINT32\r
+DebugRvaAlign (\r
+  UINT32 Offset\r
+  )\r
+{\r
+  return (Offset + 3) & ~3;\r
+}\r
+\r
 //\r
 // filter functions\r
 //\r
@@ -365,7 +374,7 @@ ScanSections32 (
     assert (FALSE);\r
   }\r
 \r
-  mDebugOffset = mCoffOffset;\r
+  mDebugOffset = DebugRvaAlign(mCoffOffset);\r
 \r
   if (mEhdr->e_machine != EM_ARM) {\r
     mCoffOffset = CoffAlign(mCoffOffset);\r
@@ -423,7 +432,7 @@ ScanSections32 (
   // section alignment.\r
   //\r
   if (SectionCount > 0) {\r
-    mDebugOffset = mCoffOffset;\r
+    mDebugOffset = DebugRvaAlign(mCoffOffset);\r
   }\r
   mCoffOffset = mDebugOffset + sizeof(EFI_IMAGE_DEBUG_DIRECTORY_ENTRY) +\r
                 sizeof(EFI_IMAGE_DEBUG_CODEVIEW_NB10_ENTRY) +\r

diff --git a/BaseTools/Source/C/GenFw/Elf64Convert.c b/BaseTools/Source/C/GenFw/Elf64Convert.c
index c758ed9d64a61adeebee644c00fc0b60d921f0a8..a3f1f5d3d4c7bdbbc91a394e97a36f88166fd45c 100644 (file)
--- a/BaseTools/Source/C/GenFw/Elf64Convert.c
+++ b/BaseTools/Source/C/GenFw/Elf64Convert.c
@@ -211,6 +211,15 @@ CoffAlign (
   return (Offset + mCoffAlignment - 1) & ~(mCoffAlignment - 1);\r
 }\r
 \r
+STATIC\r
+UINT32\r
+DebugRvaAlign (\r
+  UINT32 Offset\r
+  )\r
+{\r
+  return (Offset + 3) & ~3;\r
+}\r
+\r
 //\r
 // filter functions\r
 //\r
@@ -359,7 +368,7 @@ ScanSections64 (
     assert (FALSE);\r
   }\r
 \r
-  mDebugOffset = mCoffOffset;\r
+  mDebugOffset = DebugRvaAlign(mCoffOffset);\r
 \r
   if (mEhdr->e_machine != EM_ARM) {\r
     mCoffOffset = CoffAlign(mCoffOffset);\r
@@ -412,7 +421,7 @@ ScanSections64 (
   // section alignment.\r
   //\r
   if (SectionCount > 0) {\r
-    mDebugOffset = mCoffOffset;\r
+    mDebugOffset = DebugRvaAlign(mCoffOffset);\r
   }\r
   mCoffOffset = mDebugOffset + sizeof(EFI_IMAGE_DEBUG_DIRECTORY_ENTRY) +\r
                 sizeof(EFI_IMAGE_DEBUG_CODEVIEW_NB10_ENTRY) +\r