Ia32/WriteDr6.asm | INTEL \r
Ia32/WriteDr5.nasm| INTEL\r
Ia32/WriteDr5.asm | INTEL \r
+ Ia32/WriteDr4.nasm| INTEL\r
Ia32/WriteDr4.asm | INTEL \r
Ia32/WriteDr3.asm | INTEL \r
Ia32/WriteDr2.asm | INTEL \r
--- /dev/null
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>\r
+; This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution. The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php.\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+; WriteDr4.Asm\r
+;\r
+; Abstract:\r
+;\r
+; AsmWriteDr4 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+ SECTION .text\r
+\r
+;------------------------------------------------------------------------------\r
+; UINTN\r
+; EFIAPI\r
+; AsmWriteDr4 (\r
+; IN UINTN Value\r
+; );\r
+;------------------------------------------------------------------------------\r
+global ASM_PFX(AsmWriteDr4)\r
+ASM_PFX(AsmWriteDr4):\r
+ mov eax, [esp + 4]\r
+ ;\r
+ ; DR4 is alias to DR6 only if DE (in CR4) is cleared. Otherwise, writing to\r
+ ; this register will cause a #UD exception.\r
+ ;\r
+ ; MS assembler doesn't support this instruction since no one would use it\r
+ ; under normal circustances. Here opcode is used.\r
+ ;\r
+ DB 0xf, 0x23, 0xe0\r
+ ret\r
+\r