#------------------------------------------------------------------------------\r
#\r
-# Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
# which accompanies this distribution. The full text of the license may be found at\r
pushq %r9\r
pushq %r10\r
pushq %r11\r
+\r
+ addq $-0x68, %rsp # reserve memory to store XMM registers and make address 16-byte alignment\r
+ movdqa %xmm0, 0(%rsp) \r
+ movdqa %xmm1, 0x10(%rsp)\r
+ movdqa %xmm2, 0x20(%rsp)\r
+ movdqa %xmm3, 0x30(%rsp)\r
+ movdqa %xmm4, 0x40(%rsp)\r
+ movdqa %xmm5, 0x50(%rsp)\r
+\r
addq $-0x20, %rsp\r
call ASM_PFX(PageFaultHandler)\r
addq $0x20, %rsp\r
- testb %al, %al\r
+\r
+ movdqa 0(%rsp), %xmm0\r
+ movdqa 0x10(%rsp), %xmm1\r
+ movdqa 0x20(%rsp), %xmm2\r
+ movdqa 0x30(%rsp), %xmm3\r
+ movdqa 0x40(%rsp), %xmm4\r
+ movdqa 0x50(%rsp), %xmm5\r
+ addq $0x68, %rsp\r
+\r
+ testb %al, %al # set ZF flag\r
popq %r11\r
popq %r10\r
popq %r9\r
popq %rdx\r
popq %rcx\r
popq %rax # restore all volatile registers\r
- jnz L1\r
+ jnz L1 # check ZF flag\r
#ifdef __APPLE__\r
int $3\r
#else\r
;------------------------------------------------------------------------------
;
-; Copyright (c) 2010 - 2011, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2010 - 2012, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
push r9
push r10
push r11
+
+ add rsp, -10h * 6 - 8 ; reserve memory to store XMM registers and make address 16-byte alignment
+ movdqa [rsp], xmm0
+ movdqa [rsp + 10h], xmm1
+ movdqa [rsp + 20h], xmm2
+ movdqa [rsp + 30h], xmm3
+ movdqa [rsp + 40h], xmm4
+ movdqa [rsp + 50h], xmm5
+
add rsp, -20h
call PageFaultHandler
add rsp, 20h
- test al, al
+
+ movdqa xmm0, [rsp]
+ movdqa xmm1, [rsp + 10h]
+ movdqa xmm2, [rsp + 20h]
+ movdqa xmm3, [rsp + 30h]
+ movdqa xmm4, [rsp + 40h]
+ movdqa xmm5, [rsp + 50h]
+ add rsp, 10h * 6 + 8
+
+ test al, al ; set ZF flag
pop r11
pop r10
pop r9
pop rdx
pop rcx
pop rax ; restore all volatile registers
- jnz @F
+ jnz @F ; check ZF flag
jmp mOriginalHandler
@@:
add rsp, 08h ; skip error code for PF