MdePkg/BasePeCoff: Add RISC-V PE/Coff related code.

Support RISC-V image relocation.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Gilbert Chen <gilbert.chen@hpe.com>

diff --git a/MdePkg/Library/BasePeCoffLib/BasePeCoff.c b/MdePkg/Library/BasePeCoffLib/BasePeCoff.c
index 07bb62f8601dacda640a482edbd138dabdaa41cf..1102833b94db56857f77ba6eb37f4123f17a2b29 100644 (file)
--- a/MdePkg/Library/BasePeCoffLib/BasePeCoff.c
+++ b/MdePkg/Library/BasePeCoffLib/BasePeCoff.c
@@ -1,6 +1,6 @@
 /** @file\r
   Base PE/COFF loader supports loading any PE32/PE32+ or TE image, but\r
-  only supports relocating IA32, x64, IPF, and EBC images.\r
+  only supports relocating IA32, x64, IPF, ARM, RISC-V and EBC images.\r
 \r
   Caution: This file requires additional review when modified.\r
   This library will have external input - PE/COFF image.\r
@@ -17,6 +17,7 @@
 \r
   Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>\r
   Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+  Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>\r
   SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r

diff --git a/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf b/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
index 395c1403c0a464550a541d8297ac79249121a7d8..110b6d5a090af5d4d6b72db3d0e363ef5b993823 100644 (file)
--- a/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
+++ b/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
@@ -3,6 +3,7 @@
 #  The IPF version library supports loading IPF and EBC PE/COFF image.\r
 #  The IA32 version library support loading IA32, X64 and EBC PE/COFF images.\r
 #  The X64 version library support loading IA32, X64 and EBC PE/COFF images.\r
+#  The RISC-V version library support loading RISC-V images.\r
 #\r
 #  Caution: This module requires additional review when modified.\r
 #  This library will have external input - PE/COFF image.\r
@@ -11,6 +12,7 @@
 #\r
 #  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
 #  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+#  Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>\r
 #\r
 #  SPDX-License-Identifier: BSD-2-Clause-Patent\r
 #\r
@@ -41,6 +43,9 @@
 [Sources.ARM]\r
   Arm/PeCoffLoaderEx.c\r
 \r
+[Sources.RISCV64]\r
+  RiscV/PeCoffLoaderEx.c\r
+\r
 [Packages]\r
   MdePkg/MdePkg.dec\r
 \r

diff --git a/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.uni b/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.uni
index b0ea702f76f56bd47db843af9f5b694949b7632d..55417029f2098c3fe0c5153e2927cdaf9d1512e8 100644 (file)
--- a/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.uni
+++ b/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.uni
@@ -4,6 +4,7 @@
 // The IPF version library supports loading IPF and EBC PE/COFF image.\r
 // The IA32 version library support loading IA32, X64 and EBC PE/COFF images.\r
 // The X64 version library support loading IA32, X64 and EBC PE/COFF images.\r
+// The RISC-V version library support loading RISC-V32 and RISC-V64 PE/COFF images.\r
 //\r
 // Caution: This module requires additional review when modified.\r
 // This library will have external input - PE/COFF image.\r
@@ -12,6 +13,7 @@
 //\r
 // Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
 // Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+// Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>\r
 //\r
 // SPDX-License-Identifier: BSD-2-Clause-Patent\r
 //\r

diff --git a/MdePkg/Library/BasePeCoffLib/BasePeCoffLibInternals.h b/MdePkg/Library/BasePeCoffLib/BasePeCoffLibInternals.h
index b74277f3e8117d1490b79e823959d5f7d0c623c7..3ee56e0e5f56ea21a1de48bdd3103dbd2e2655f8 100644 (file)
--- a/MdePkg/Library/BasePeCoffLib/BasePeCoffLibInternals.h
+++ b/MdePkg/Library/BasePeCoffLib/BasePeCoffLibInternals.h
@@ -2,6 +2,7 @@
   Declaration of internal functions in PE/COFF Lib.\r
 \r
   Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
+  Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>\r
   SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r
@@ -16,6 +17,14 @@
 #include <Library/PeCoffExtraActionLib.h>\r
 #include <IndustryStandard/PeImage.h>\r
 \r
+//\r
+// Macro definitions for RISC-V architecture.\r
+//\r
+#define RV_X(x, s, n) (((x) >> (s)) & ((1<<(n))-1))\r
+#define RISCV_IMM_BITS 12\r
+#define RISCV_IMM_REACH (1LL<<RISCV_IMM_BITS)\r
+#define RISCV_CONST_HIGH_PART(VALUE) \\r
+  (((VALUE) + (RISCV_IMM_REACH/2)) & ~(RISCV_IMM_REACH-1))\r
 \r
 \r
 /**\r

diff --git a/MdePkg/Library/BasePeCoffLib/RiscV/PeCoffLoaderEx.c b/MdePkg/Library/BasePeCoffLib/RiscV/PeCoffLoaderEx.c
new file mode 100644 (file)
index 0000000..23170a6
--- /dev/null
+++ b/MdePkg/Library/BasePeCoffLib/RiscV/PeCoffLoaderEx.c
@@ -0,0 +1,133 @@
+/** @file\r
+  PE/Coff loader for RISC-V PE image\r
+\r
+  Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>\r
+  SPDX-License-Identifier: BSD-2-Clause-Patent\r
+**/\r
+#include "BasePeCoffLibInternals.h"\r
+#include <Library/BaseLib.h>\r
+\r
+/**\r
+  Performs an RISC-V specific relocation fixup and is a no-op on\r
+  other instruction sets.\r
+  RISC-V splits 32-bit fixup into 20bit and 12-bit with two relocation\r
+  types. We have to know the lower 12-bit fixup first then we can deal\r
+  carry over on high 20-bit fixup. So we log the high 20-bit in\r
+  FixupData.\r
+\r
+  @param  Reloc       The pointer to the relocation record.\r
+  @param  Fixup       The pointer to the address to fix up.\r
+  @param  FixupData   The pointer to a buffer to log the fixups.\r
+  @param  Adjust      The offset to adjust the fixup.\r
+\r
+  @return Status code.\r
+\r
+**/\r
+RETURN_STATUS\r
+PeCoffLoaderRelocateImageEx (\r
+  IN UINT16      *Reloc,\r
+  IN OUT CHAR8   *Fixup,\r
+  IN OUT CHAR8   **FixupData,\r
+  IN UINT64      Adjust\r
+  )\r
+{\r
+  UINT32 Value;\r
+  UINT32 Value2;\r
+  UINT32 *RiscVHi20Fixup;\r
+\r
+  switch ((*Reloc) >> 12) {\r
+  case EFI_IMAGE_REL_BASED_RISCV_HI20:\r
+      *(UINT64 *)(*FixupData) = (UINT64)(UINTN)Fixup;\r
+      break;\r
+\r
+  case EFI_IMAGE_REL_BASED_RISCV_LOW12I:\r
+      RiscVHi20Fixup =  (UINT32 *)(*(UINT64 *)(*FixupData));\r
+      if (RiscVHi20Fixup != NULL) {\r
+\r
+        Value = (UINT32)(RV_X(*RiscVHi20Fixup, 12, 20) << 12);\r
+        Value2 = (UINT32)(RV_X(*(UINT32 *)Fixup, 20, 12));\r
+        if (Value2 & (RISCV_IMM_REACH/2)) {\r
+          Value2 |= ~(RISCV_IMM_REACH-1);\r
+        }\r
+        Value += Value2;\r
+        Value += (UINT32)Adjust;\r
+        Value2 = RISCV_CONST_HIGH_PART (Value);\r
+        *(UINT32 *)RiscVHi20Fixup = (RV_X (Value2, 12, 20) << 12) |\\r
+                                           (RV_X (*(UINT32 *)RiscVHi20Fixup, 0, 12));\r
+        *(UINT32 *)Fixup = (RV_X (Value, 0, 12) << 20) |\\r
+                           (RV_X (*(UINT32 *)Fixup, 0, 20));\r
+      }\r
+      break;\r
+\r
+  case EFI_IMAGE_REL_BASED_RISCV_LOW12S:\r
+      RiscVHi20Fixup =  (UINT32 *)(*(UINT64 *)(*FixupData));\r
+      if (RiscVHi20Fixup != NULL) {\r
+        Value = (UINT32)(RV_X(*RiscVHi20Fixup, 12, 20) << 12);\r
+        Value2 = (UINT32)(RV_X(*(UINT32 *)Fixup, 7, 5) | (RV_X(*(UINT32 *)Fixup, 25, 7) << 5));\r
+        if (Value2 & (RISCV_IMM_REACH/2)) {\r
+          Value2 |= ~(RISCV_IMM_REACH-1);\r
+        }\r
+        Value += Value2;\r
+        Value += (UINT32)Adjust;\r
+        Value2 = RISCV_CONST_HIGH_PART (Value);\r
+        *(UINT32 *)RiscVHi20Fixup = (RV_X (Value2, 12, 20) << 12) | \\r
+                                           (RV_X (*(UINT32 *)RiscVHi20Fixup, 0, 12));\r
+        Value2 = *(UINT32 *)Fixup & 0x01fff07f;\r
+        Value &= RISCV_IMM_REACH - 1;\r
+        *(UINT32 *)Fixup = Value2 | (UINT32)(((RV_X(Value, 0, 5) << 7) | (RV_X(Value, 5, 7) << 25)));\r
+      }\r
+      break;\r
+\r
+  default:\r
+      return RETURN_UNSUPPORTED;\r
+\r
+  }\r
+  return RETURN_SUCCESS;\r
+}\r
+\r
+/**\r
+  Returns TRUE if the machine type of PE/COFF image is supported. Supported\r
+  does not mean the image can be executed it means the PE/COFF loader supports\r
+  loading and relocating of the image type. It's up to the caller to support\r
+  the entry point.\r
+\r
+  @param  Machine   Machine type from the PE Header.\r
+\r
+  @return TRUE if this PE/COFF loader can load the image\r
+\r
+**/\r
+BOOLEAN\r
+PeCoffLoaderImageFormatSupported (\r
+  IN  UINT16  Machine\r
+  )\r
+{\r
+  if (Machine ==  IMAGE_FILE_MACHINE_RISCV64) {\r
+    return TRUE;\r
+  }\r
+\r
+  return FALSE;\r
+}\r
+\r
+/**\r
+  Performs an Itanium-based specific re-relocation fixup and is a no-op on other\r
+  instruction sets. This is used to re-relocated the image into the EFI virtual\r
+  space for runtime calls.\r
+\r
+  @param  Reloc       The pointer to the relocation record.\r
+  @param  Fixup       The pointer to the address to fix up.\r
+  @param  FixupData   The pointer to a buffer to log the fixups.\r
+  @param  Adjust      The offset to adjust the fixup.\r
+\r
+  @return Status code.\r
+\r
+**/\r
+RETURN_STATUS\r
+PeHotRelocateImageEx (\r
+  IN UINT16      *Reloc,\r
+  IN OUT CHAR8   *Fixup,\r
+  IN OUT CHAR8   **FixupData,\r
+  IN UINT64      Adjust\r
+  )\r
+{\r
+  return RETURN_UNSUPPORTED;\r
+}\r