--- /dev/null
+/** @file\r
+ Macro and type definitions corresponding to the QEMU fw_cfg interface.\r
+\r
+ Refer to "docs/specs/fw_cfg.txt" in the QEMU source directory.\r
+\r
+ Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (C) 2013 - 2017, Red Hat, Inc.\r
+\r
+ This program and the accompanying materials are licensed and made available\r
+ under the terms and conditions of the BSD License which accompanies this\r
+ distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT\r
+ WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+**/\r
+\r
+#ifndef __FW_CFG_H__\r
+#define __FW_CFG_H__\r
+\r
+#include <Base.h>\r
+\r
+//\r
+// The size, in bytes, of names of firmware configuration files, including at\r
+// least one terminating NUL byte.\r
+//\r
+#define QEMU_FW_CFG_FNAME_SIZE 56\r
+\r
+//\r
+// If the following bit is set in the UINT32 fw_cfg revision / feature bitmap\r
+// -- read from key 0x0001 with the basic IO Port or MMIO method --, then the\r
+// DMA interface is available.\r
+//\r
+#define FW_CFG_F_DMA BIT1\r
+\r
+//\r
+// Macros for the FW_CFG_DMA_ACCESS.Control bitmap (in native encoding).\r
+//\r
+#define FW_CFG_DMA_CTL_ERROR BIT0\r
+#define FW_CFG_DMA_CTL_READ BIT1\r
+#define FW_CFG_DMA_CTL_SKIP BIT2\r
+#define FW_CFG_DMA_CTL_SELECT BIT3\r
+#define FW_CFG_DMA_CTL_WRITE BIT4\r
+\r
+//\r
+// Numerically defined keys.\r
+//\r
+typedef enum {\r
+ QemuFwCfgItemSignature = 0x0000,\r
+ QemuFwCfgItemInterfaceVersion = 0x0001,\r
+ QemuFwCfgItemSystemUuid = 0x0002,\r
+ QemuFwCfgItemRamSize = 0x0003,\r
+ QemuFwCfgItemGraphicsEnabled = 0x0004,\r
+ QemuFwCfgItemSmpCpuCount = 0x0005,\r
+ QemuFwCfgItemMachineId = 0x0006,\r
+ QemuFwCfgItemKernelAddress = 0x0007,\r
+ QemuFwCfgItemKernelSize = 0x0008,\r
+ QemuFwCfgItemKernelCommandLine = 0x0009,\r
+ QemuFwCfgItemInitrdAddress = 0x000a,\r
+ QemuFwCfgItemInitrdSize = 0x000b,\r
+ QemuFwCfgItemBootDevice = 0x000c,\r
+ QemuFwCfgItemNumaData = 0x000d,\r
+ QemuFwCfgItemBootMenu = 0x000e,\r
+ QemuFwCfgItemMaximumCpuCount = 0x000f,\r
+ QemuFwCfgItemKernelEntry = 0x0010,\r
+ QemuFwCfgItemKernelData = 0x0011,\r
+ QemuFwCfgItemInitrdData = 0x0012,\r
+ QemuFwCfgItemCommandLineAddress = 0x0013,\r
+ QemuFwCfgItemCommandLineSize = 0x0014,\r
+ QemuFwCfgItemCommandLineData = 0x0015,\r
+ QemuFwCfgItemKernelSetupAddress = 0x0016,\r
+ QemuFwCfgItemKernelSetupSize = 0x0017,\r
+ QemuFwCfgItemKernelSetupData = 0x0018,\r
+ QemuFwCfgItemFileDir = 0x0019,\r
+\r
+ QemuFwCfgItemX86AcpiTables = 0x8000,\r
+ QemuFwCfgItemX86SmbiosTables = 0x8001,\r
+ QemuFwCfgItemX86Irq0Override = 0x8002,\r
+ QemuFwCfgItemX86E820Table = 0x8003,\r
+ QemuFwCfgItemX86HpetData = 0x8004,\r
+\r
+} FIRMWARE_CONFIG_ITEM;\r
+\r
+//\r
+// Communication structure for the DMA access method. All fields are encoded in\r
+// big endian.\r
+//\r
+#pragma pack (1)\r
+typedef struct {\r
+ UINT32 Control;\r
+ UINT32 Length;\r
+ UINT64 Address;\r
+} FW_CFG_DMA_ACCESS;\r
+#pragma pack ()\r
+\r
+#endif\r
#ifndef __FW_CFG_LIB__\r
#define __FW_CFG_LIB__\r
\r
-//\r
-// The size, in bytes, of names of firmware configuration files, including at\r
-// least one terminating NUL byte.\r
-//\r
-#define QEMU_FW_CFG_FNAME_SIZE 56\r
-\r
-//\r
-// If the following bit is set in the UINT32 fw_cfg revision / feature bitmap\r
-// -- read from key 0x0001 with the basic IO Port or MMIO method --, then the\r
-// DMA interface is available.\r
-//\r
-#define FW_CFG_F_DMA BIT1\r
-\r
-//\r
-// Macros for the FW_CFG_DMA_ACCESS.Control bitmap (in native encoding).\r
-//\r
-#define FW_CFG_DMA_CTL_ERROR BIT0\r
-#define FW_CFG_DMA_CTL_READ BIT1\r
-#define FW_CFG_DMA_CTL_SKIP BIT2\r
-#define FW_CFG_DMA_CTL_SELECT BIT3\r
-#define FW_CFG_DMA_CTL_WRITE BIT4\r
-\r
-typedef enum {\r
- QemuFwCfgItemSignature = 0x0000,\r
- QemuFwCfgItemInterfaceVersion = 0x0001,\r
- QemuFwCfgItemSystemUuid = 0x0002,\r
- QemuFwCfgItemRamSize = 0x0003,\r
- QemuFwCfgItemGraphicsEnabled = 0x0004,\r
- QemuFwCfgItemSmpCpuCount = 0x0005,\r
- QemuFwCfgItemMachineId = 0x0006,\r
- QemuFwCfgItemKernelAddress = 0x0007,\r
- QemuFwCfgItemKernelSize = 0x0008,\r
- QemuFwCfgItemKernelCommandLine = 0x0009,\r
- QemuFwCfgItemInitrdAddress = 0x000a,\r
- QemuFwCfgItemInitrdSize = 0x000b,\r
- QemuFwCfgItemBootDevice = 0x000c,\r
- QemuFwCfgItemNumaData = 0x000d,\r
- QemuFwCfgItemBootMenu = 0x000e,\r
- QemuFwCfgItemMaximumCpuCount = 0x000f,\r
- QemuFwCfgItemKernelEntry = 0x0010,\r
- QemuFwCfgItemKernelData = 0x0011,\r
- QemuFwCfgItemInitrdData = 0x0012,\r
- QemuFwCfgItemCommandLineAddress = 0x0013,\r
- QemuFwCfgItemCommandLineSize = 0x0014,\r
- QemuFwCfgItemCommandLineData = 0x0015,\r
- QemuFwCfgItemKernelSetupAddress = 0x0016,\r
- QemuFwCfgItemKernelSetupSize = 0x0017,\r
- QemuFwCfgItemKernelSetupData = 0x0018,\r
- QemuFwCfgItemFileDir = 0x0019,\r
-\r
- QemuFwCfgItemX86AcpiTables = 0x8000,\r
- QemuFwCfgItemX86SmbiosTables = 0x8001,\r
- QemuFwCfgItemX86Irq0Override = 0x8002,\r
- QemuFwCfgItemX86E820Table = 0x8003,\r
- QemuFwCfgItemX86HpetData = 0x8004,\r
-\r
-} FIRMWARE_CONFIG_ITEM;\r
-\r
-//\r
-// Communication structure for the DMA access method. All fields are encoded in\r
-// big endian.\r
-//\r
-#pragma pack (1)\r
-typedef struct {\r
- UINT32 Control;\r
- UINT32 Length;\r
- UINT64 Address;\r
-} FW_CFG_DMA_ACCESS;\r
-#pragma pack ()\r
+#include <IndustryStandard/QemuFwCfg.h>\r
\r
/**\r
Returns a boolean indicating if the firmware configuration interface\r