2) Code cleanup.
3) Doxygen comment cleanup.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@7428
6f19259b-4bc3-4df7-8a09-
765794883524
13 files changed:
\r
The Ehci controller driver.\r
\r
\r
The Ehci controller driver.\r
\r
-Copyright (c) 2006 - 2008, Intel Corporation\r
+Copyright (c) 2006 - 2009, Intel Corporation\r
All rights reserved. This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
All rights reserved. This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
Status = gBS->CreateEvent (\r
EVT_TIMER | EVT_NOTIFY_SIGNAL,\r
TPL_CALLBACK,\r
Status = gBS->CreateEvent (\r
EVT_TIMER | EVT_NOTIFY_SIGNAL,\r
TPL_CALLBACK,\r
- EhcMoniteAsyncRequests,\r
+ EhcMonitorAsyncRequests,\r
Ehc,\r
&Ehc->PollTimer\r
);\r
Ehc,\r
&Ehc->PollTimer\r
);\r
\r
Provides some data struct used by EHCI controller driver.\r
\r
\r
Provides some data struct used by EHCI controller driver.\r
\r
-Copyright (c) 2006 - 2007, Intel Corporation\r
+Copyright (c) 2006 - 2009, Intel Corporation\r
All rights reserved. This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
All rights reserved. This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
} EHC_TIMEOUT_EXPERIENCE_VALUE;\r
\r
\r
} EHC_TIMEOUT_EXPERIENCE_VALUE;\r
\r
\r
- //\r
- // EHC raises TPL to TPL_NOTIFY to serialize all its operations\r
- // to protect shared data structures.\r
- //\r
+//\r
+// EHC raises TPL to TPL_NOTIFY to serialize all its operations\r
+// to protect shared data structures.\r
+//\r
#define EHC_TPL TPL_NOTIFY\r
\r
#define EHC_TPL TPL_NOTIFY\r
\r
-#define USB2_HC_DEV_SIGNATURE SIGNATURE_32 ('e', 'h', 'c', 'i')\r
-\r
//\r
//Iterate through the doule linked list. NOT delete safe\r
//\r
//\r
//Iterate through the doule linked list. NOT delete safe\r
//\r
#define EHC_REG_BIT_IS_SET(Ehc, Offset, Bit) \\r
(EHC_BIT_IS_SET(EhcReadOpReg ((Ehc), (Offset)), (Bit)))\r
\r
#define EHC_REG_BIT_IS_SET(Ehc, Offset, Bit) \\r
(EHC_BIT_IS_SET(EhcReadOpReg ((Ehc), (Offset)), (Bit)))\r
\r
-#define EHC_FROM_THIS(a) CR(a, USB2_HC_DEV, Usb2Hc, USB2_HC_DEV_SIGNATURE)\r
+#define USB2_HC_DEV_SIGNATURE SIGNATURE_32 ('e', 'h', 'c', 'i')\r
+#define EHC_FROM_THIS(a) CR(a, USB2_HC_DEV, Usb2Hc, USB2_HC_DEV_SIGNATURE)\r
\r
struct _USB2_HC_DEV {\r
UINTN Signature;\r
\r
struct _USB2_HC_DEV {\r
UINTN Signature;\r
\r
This file provides the information dump support for EHCI when in debug mode.\r
\r
\r
This file provides the information dump support for EHCI when in debug mode.\r
\r
-Copyright (c) 2007, Intel Corporation\r
+Copyright (c) 2007 - 2009, Intel Corporation\r
All rights reserved. This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
All rights reserved. This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
\r
@param State The state in the QTD/QH.\r
\r
\r
@param State The state in the QTD/QH.\r
\r
**/\r
VOID\r
EhcDumpStatus (\r
**/\r
VOID\r
EhcDumpStatus (\r
@param Qtd The QTD to dump.\r
@param Msg The message to print before the dump.\r
\r
@param Qtd The QTD to dump.\r
@param Msg The message to print before the dump.\r
\r
**/\r
VOID\r
EhcDumpQtd (\r
**/\r
VOID\r
EhcDumpQtd (\r
@param Msg The message to print before the dump.\r
@param DumpBuf Whether to dump the memory buffer of the associated QTD.\r
\r
@param Msg The message to print before the dump.\r
@param DumpBuf Whether to dump the memory buffer of the associated QTD.\r
\r
**/\r
VOID\r
EhcDumpQh (\r
**/\r
VOID\r
EhcDumpQh (\r
@param Buf The buffer to dump.\r
@param Len The length of buffer.\r
\r
@param Buf The buffer to dump.\r
@param Len The length of buffer.\r
\r
**/\r
VOID\r
EhcDumpBuf (\r
**/\r
VOID\r
EhcDumpBuf (\r
\r
This file contains the definination for host controller debug support routines.\r
\r
\r
This file contains the definination for host controller debug support routines.\r
\r
-Copyright (c) 2007, Intel Corporation\r
+Copyright (c) 2007 - 2009, Intel Corporation\r
All rights reserved. This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
All rights reserved. This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
@param Qtd The QTD to dump.\r
@param Msg The message to print before the dump.\r
\r
@param Qtd The QTD to dump.\r
@param Msg The message to print before the dump.\r
\r
**/\r
VOID\r
EhcDumpQtd (\r
**/\r
VOID\r
EhcDumpQtd (\r
@param Msg The message to print before the dump.\r
@param DumpBuf Whether to dump the memory buffer of the associated QTD.\r
\r
@param Msg The message to print before the dump.\r
@param DumpBuf Whether to dump the memory buffer of the associated QTD.\r
\r
**/\r
VOID\r
EhcDumpQh (\r
**/\r
VOID\r
EhcDumpQh (\r
@param Buf The buffer to dump.\r
@param Len The length of buffer.\r
\r
@param Buf The buffer to dump.\r
@param Len The length of buffer.\r
\r
**/\r
VOID\r
EhcDumpBuf (\r
**/\r
VOID\r
EhcDumpBuf (\r
# It implements the interfaces of monitoring the status of all ports and transferring \r
# Control, Bulk, Interrupt and Isochronous requests to Usb2.0 device.\r
#\r
# It implements the interfaces of monitoring the status of all ports and transferring \r
# Control, Bulk, Interrupt and Isochronous requests to Usb2.0 device.\r
#\r
-# Copyright (c) 2006 - 2008, Intel Corporation. \r
+# Copyright (c) 2006 - 2009, Intel Corporation. \r
#\r
# All rights reserved. This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
#\r
# All rights reserved. This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
PcdLib\r
\r
[Protocols]\r
PcdLib\r
\r
[Protocols]\r
- gEfiPciIoProtocolGuid ## ALWAYS_CONSUMED\r
- gEfiUsb2HcProtocolGuid ## ALWAYS_PRODUCED\r
+ gEfiPciIoProtocolGuid ## CONSUMES\r
+ gEfiUsb2HcProtocolGuid ## PRODUCES\r
\r
The EHCI register operation routines.\r
\r
\r
The EHCI register operation routines.\r
\r
-Copyright (c) 2007, Intel Corporation\r
+Copyright (c) 2007 - 2009, Intel Corporation\r
All rights reserved. This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
All rights reserved. This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
@param Offset EHCI operation register offset.\r
@param Data The data to write.\r
\r
@param Offset EHCI operation register offset.\r
@param Data The data to write.\r
\r
**/\r
VOID\r
EhcWriteOpReg (\r
**/\r
VOID\r
EhcWriteOpReg (\r
@param Offset The offset of the operational register.\r
@param Bit The bit mask of the register to set.\r
\r
@param Offset The offset of the operational register.\r
@param Bit The bit mask of the register to set.\r
\r
**/\r
VOID\r
EhcSetOpRegBit (\r
**/\r
VOID\r
EhcSetOpRegBit (\r
@param Offset The offset of the operational register.\r
@param Bit The bit mask of the register to clear.\r
\r
@param Offset The offset of the operational register.\r
@param Bit The bit mask of the register to clear.\r
\r
**/\r
VOID\r
EhcClearOpRegBit (\r
**/\r
VOID\r
EhcClearOpRegBit (\r
\r
@param Ehc The EHCI device.\r
\r
\r
@param Ehc The EHCI device.\r
\r
**/\r
VOID\r
EhcClearLegacySupport (\r
**/\r
VOID\r
EhcClearLegacySupport (\r
\r
@param Ehc The EHCI device.\r
\r
\r
@param Ehc The EHCI device.\r
\r
**/\r
VOID\r
EhcAckAllInterrupt (\r
**/\r
VOID\r
EhcAckAllInterrupt (\r
\r
This file contains the definination for host controller register operation routines.\r
\r
\r
This file contains the definination for host controller register operation routines.\r
\r
-Copyright (c) 2007, Intel Corporation\r
+Copyright (c) 2007 - 2009, Intel Corporation\r
All rights reserved. This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
All rights reserved. This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
@param Offset EHCI operation register offset.\r
@param Data The data to write.\r
\r
@param Offset EHCI operation register offset.\r
@param Data The data to write.\r
\r
**/\r
VOID\r
EhcWriteOpReg (\r
**/\r
VOID\r
EhcWriteOpReg (\r
\r
@param Ehc The EHCI device.\r
\r
\r
@param Ehc The EHCI device.\r
\r
**/\r
VOID\r
EhcClearLegacySupport (\r
**/\r
VOID\r
EhcClearLegacySupport (\r
\r
@param Ehc The EHCI device.\r
\r
\r
@param Ehc The EHCI device.\r
\r
**/\r
VOID\r
EhcAckAllInterrupt (\r
**/\r
VOID\r
EhcAckAllInterrupt (\r
\r
EHCI transfer scheduling routines.\r
\r
\r
EHCI transfer scheduling routines.\r
\r
-Copyright (c) 2007, Intel Corporation\r
+Copyright (c) 2007 - 2009, Intel Corporation\r
All rights reserved. This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
All rights reserved. This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
\r
@param Ehc The EHCI device.\r
\r
\r
@param Ehc The EHCI device.\r
\r
**/\r
VOID\r
EhcFreeSched (\r
**/\r
VOID\r
EhcFreeSched (\r
@param Ehc The EHCI device.\r
@param Qh The queue head to link.\r
\r
@param Ehc The EHCI device.\r
@param Qh The queue head to link.\r
\r
**/\r
VOID\r
EhcLinkQhToAsync (\r
**/\r
VOID\r
EhcLinkQhToAsync (\r
@param Ehc The EHCI device.\r
@param Qh The queue head to unlink.\r
\r
@param Ehc The EHCI device.\r
@param Qh The queue head to unlink.\r
\r
**/\r
VOID\r
EhcUnlinkQhFromAsync (\r
**/\r
VOID\r
EhcUnlinkQhFromAsync (\r
@param Ehc The EHCI device.\r
@param Qh The queue head to link.\r
\r
@param Ehc The EHCI device.\r
@param Qh The queue head to link.\r
\r
**/\r
VOID\r
EhcLinkQhToPeriod (\r
**/\r
VOID\r
EhcLinkQhToPeriod (\r
@param Ehc The EHCI device.\r
@param Qh The queue head to unlink.\r
\r
@param Ehc The EHCI device.\r
@param Qh The queue head to unlink.\r
\r
**/\r
VOID\r
EhcUnlinkQhFromPeriod (\r
**/\r
VOID\r
EhcUnlinkQhFromPeriod (\r
\r
@param Ehc The EHCI device.\r
\r
\r
@param Ehc The EHCI device.\r
\r
**/\r
VOID\r
EhciDelAllAsyncIntTransfers (\r
**/\r
VOID\r
EhciDelAllAsyncIntTransfers (\r
\r
@param Urb The URB to update.\r
\r
\r
@param Urb The URB to update.\r
\r
**/\r
VOID\r
EhcUpdateAsyncRequest (\r
**/\r
VOID\r
EhcUpdateAsyncRequest (\r
@param Event Interrupt event.\r
@param Context Pointer to USB2_HC_DEV.\r
\r
@param Event Interrupt event.\r
@param Context Pointer to USB2_HC_DEV.\r
\r
-EhcMoniteAsyncRequests (\r
+EhcMonitorAsyncRequests (\r
IN EFI_EVENT Event,\r
IN VOID *Context\r
)\r
IN EFI_EVENT Event,\r
IN VOID *Context\r
)\r
//\r
Status = EhcFlushAsyncIntMap (Ehc, Urb);\r
if (EFI_ERROR (Status)) {\r
//\r
Status = EhcFlushAsyncIntMap (Ehc, Urb);\r
if (EFI_ERROR (Status)) {\r
- DEBUG ((EFI_D_ERROR, "EhcMoniteAsyncRequests: Fail to Flush AsyncInt Mapped Memeory\n"));\r
+ DEBUG ((EFI_D_ERROR, "EhcMonitorAsyncRequests: Fail to Flush AsyncInt Mapped Memeory\n"));\r
\r
This file contains the definination for host controller schedule routines.\r
\r
\r
This file contains the definination for host controller schedule routines.\r
\r
-Copyright (c) 2007, Intel Corporation\r
+Copyright (c) 2007 - 2009, Intel Corporation\r
All rights reserved. This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
All rights reserved. This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
\r
@param Ehc The EHCI device.\r
\r
\r
@param Ehc The EHCI device.\r
\r
**/\r
VOID\r
EhcFreeSched (\r
**/\r
VOID\r
EhcFreeSched (\r
@param Ehc The EHCI device.\r
@param Qh The queue head to link.\r
\r
@param Ehc The EHCI device.\r
@param Qh The queue head to link.\r
\r
**/\r
VOID\r
EhcLinkQhToAsync (\r
**/\r
VOID\r
EhcLinkQhToAsync (\r
@param Ehc The EHCI device.\r
@param Qh The queue head to unlink.\r
\r
@param Ehc The EHCI device.\r
@param Qh The queue head to unlink.\r
\r
**/\r
VOID\r
EhcUnlinkQhFromAsync (\r
**/\r
VOID\r
EhcUnlinkQhFromAsync (\r
@param Ehc The EHCI device.\r
@param Qh The queue head to link.\r
\r
@param Ehc The EHCI device.\r
@param Qh The queue head to link.\r
\r
**/\r
VOID\r
EhcLinkQhToPeriod (\r
**/\r
VOID\r
EhcLinkQhToPeriod (\r
@param Ehc The EHCI device.\r
@param Qh The queue head to unlink.\r
\r
@param Ehc The EHCI device.\r
@param Qh The queue head to unlink.\r
\r
**/\r
VOID\r
EhcUnlinkQhFromPeriod (\r
**/\r
VOID\r
EhcUnlinkQhFromPeriod (\r
\r
@param Ehc The EHCI device.\r
\r
\r
@param Ehc The EHCI device.\r
\r
**/\r
VOID\r
EhciDelAllAsyncIntTransfers (\r
**/\r
VOID\r
EhciDelAllAsyncIntTransfers (\r
@param Event Interrupt event.\r
@param Context Pointer to USB2_HC_DEV.\r
\r
@param Event Interrupt event.\r
@param Context Pointer to USB2_HC_DEV.\r
\r
-EhcMoniteAsyncRequests (\r
+EhcMonitorAsyncRequests (\r
IN EFI_EVENT Event,\r
IN VOID *Context\r
);\r
IN EFI_EVENT Event,\r
IN VOID *Context\r
);\r
This file contains URB request, each request is warpped in a\r
URB (Usb Request Block).\r
\r
This file contains URB request, each request is warpped in a\r
URB (Usb Request Block).\r
\r
-Copyright (c) 2007, Intel Corporation\r
+Copyright (c) 2007 - 2009, Intel Corporation\r
All rights reserved. This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
All rights reserved. This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
@param Ep The queue head's related endpoint.\r
@param QhHw The queue head to initialize.\r
\r
@param Ep The queue head's related endpoint.\r
@param QhHw The queue head to initialize.\r
\r
**/\r
VOID\r
EhcInitIntQh (\r
**/\r
VOID\r
EhcInitIntQh (\r
@param Ehc The EHCI device.\r
@param Qtds The list head of the QTD.\r
\r
@param Ehc The EHCI device.\r
@param Qtds The list head of the QTD.\r
\r
**/\r
VOID\r
EhcFreeQtds (\r
**/\r
VOID\r
EhcFreeQtds (\r
@param Ehc The EHCI device.\r
@param Urb The URB to free.\r
\r
@param Ehc The EHCI device.\r
@param Urb The URB to free.\r
\r
**/\r
VOID\r
EhcFreeUrb (\r
**/\r
VOID\r
EhcFreeUrb (\r
This file contains URB request, each request is warpped in a\r
URB (Usb Request Block).\r
\r
This file contains URB request, each request is warpped in a\r
URB (Usb Request Block).\r
\r
-Copyright (c) 2007, Intel Corporation\r
+Copyright (c) 2007 - 2009, Intel Corporation\r
All rights reserved. This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
All rights reserved. This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
@param Ehc The EHCI device.\r
@param Urb The URB to free.\r
\r
@param Ehc The EHCI device.\r
@param Urb The URB to free.\r
\r
**/\r
VOID\r
EhcFreeUrb (\r
**/\r
VOID\r
EhcFreeUrb (\r
\r
Routine procedures for memory allocate/free.\r
\r
\r
Routine procedures for memory allocate/free.\r
\r
-Copyright (c) 2007, Intel Corporation\r
+Copyright (c) 2007 - 2009, Intel Corporation\r
All rights reserved. This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
All rights reserved. This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
@param Pool The memory pool to free the block from.\r
@param Block The memory block to free.\r
\r
@param Pool The memory pool to free the block from.\r
@param Block The memory block to free.\r
\r
**/\r
VOID\r
UsbHcFreeMemBlock (\r
**/\r
VOID\r
UsbHcFreeMemBlock (\r
@param Head The head of the memory pool's block list.\r
@param Block The memory block to insert.\r
\r
@param Head The head of the memory pool's block list.\r
@param Block The memory block to insert.\r
\r
**/\r
VOID\r
UsbHcInsertMemBlockToPool (\r
**/\r
VOID\r
UsbHcInsertMemBlockToPool (\r
@param Head The block list head of the memory's pool.\r
@param BlockToUnlink The memory block to unlink.\r
\r
@param Head The block list head of the memory's pool.\r
@param BlockToUnlink The memory block to unlink.\r
\r
**/\r
VOID\r
UsbHcUnlinkMemBlock (\r
**/\r
VOID\r
UsbHcUnlinkMemBlock (\r
@param Mem The memory to free.\r
@param Size The size of the memory to free.\r
\r
@param Mem The memory to free.\r
@param Size The size of the memory to free.\r
\r
**/\r
VOID\r
UsbHcFreeMem (\r
**/\r
VOID\r
UsbHcFreeMem (\r
\r
This file contains the definination for host controller memory management routines.\r
\r
\r
This file contains the definination for host controller memory management routines.\r
\r
-Copyright (c) 2007, Intel Corporation\r
+Copyright (c) 2007 - 2009, Intel Corporation\r
All rights reserved. This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
All rights reserved. This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
@param Mem The memory to free.\r
@param Size The size of the memory to free.\r
\r
@param Mem The memory to free.\r
@param Size The size of the memory to free.\r
\r
**/\r
VOID\r
UsbHcFreeMem (\r
**/\r
VOID\r
UsbHcFreeMem (\r