MdePkg: PciExpressLib support variable size MMCONF

Add support for arbitrary sized MMCONF by introducing a new PCD.
Add a return value to point out invalid PCI addresses.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Signed-off-by: Marcello Sylvester Bauer <marcello.bauer@9elements.com>
Cc: Patrick Rudolph <patrick.rudolph@9elements.com>
Cc: Christian Walter <christian.walter@9elements.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>

diff --git a/MdePkg/Include/Library/PciExpressLib.h b/MdePkg/Include/Library/PciExpressLib.h
index 826fdcf7db6cfdd855c40dd96256ee1f05aff362..d78193a0a3526a1ef317d2f93fc4058f7e372e92 100644 (file)
--- a/MdePkg/Include/Library/PciExpressLib.h
+++ b/MdePkg/Include/Library/PciExpressLib.h
@@ -2,8 +2,9 @@
   Provides services to access PCI Configuration Space using the MMIO PCI Express window.\r
 \r
   This library is identical to the PCI Library, except the access method for performing PCI\r
-  configuration cycles must be through the 256 MB PCI Express MMIO window whose base address\r
-  is defined by PcdPciExpressBaseAddress.\r
+  configuration cycles must be through the PCI Express MMIO window whose base address\r
+  is defined by PcdPciExpressBaseAddress and size defined by PcdPciExpressBaseSize.\r
+\r
 \r
 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
 SPDX-License-Identifier: BSD-2-Clause-Patent\r

diff --git a/MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf b/MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf
index a7edb74cde716353470e57309f55fcda12001c77..12734b022ac746484a27038140e930abc70c8167 100644 (file)
--- a/MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf
+++ b/MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf
@@ -1,7 +1,7 @@
 ## @file\r
-#  Instance of PCI Express Library using the 256 MB PCI Express MMIO window.\r
+#  Instance of PCI Express Library using the variable size PCI Express MMIO window.\r
 #\r
-#  PCI Express Library that uses the 256 MB PCI Express MMIO window to perform\r
+#  PCI Express Library that uses the variable size PCI Express MMIO window to perform\r
 #  PCI Configuration cycles. Layers on top of an I/O Library instance.\r
 #\r
 #  Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>\r
@@ -38,4 +38,4 @@
 \r
 [Pcd]\r
   gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress  ## CONSUMES\r
-\r
+  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseSize  ## CONSUMES\r

diff --git a/MdePkg/Library/BasePciExpressLib/PciExpressLib.c b/MdePkg/Library/BasePciExpressLib/PciExpressLib.c
index 99a166c3609b9c70c409af475ee33cb90b1f7013..910dd75bb48c096796eca559ad86902a1d8493e9 100644 (file)
--- a/MdePkg/Library/BasePciExpressLib/PciExpressLib.c
+++ b/MdePkg/Library/BasePciExpressLib/PciExpressLib.c
@@ -22,7 +22,8 @@
 \r
 /**\r
   Assert the validity of a PCI address. A valid PCI address should contain 1's\r
-  only in the low 28 bits.\r
+  only in the low 28 bits. PcdPciExpressBaseSize limits the size to the real\r
+  number of PCI busses in this segment.\r
 \r
   @param  A The address to validate.\r
 \r
@@ -79,6 +80,24 @@ GetPciExpressBaseAddress (
   return (VOID*)(UINTN) PcdGet64 (PcdPciExpressBaseAddress);\r
 }\r
 \r
+/**\r
+  Gets the size of PCI Express.\r
+\r
+  This internal functions retrieves PCI Express Base Size via a PCD entry\r
+  PcdPciExpressBaseSize.\r
+\r
+  @return The base size of PCI Express.\r
+\r
+**/\r
+STATIC\r
+UINTN\r
+PcdPciExpressBaseSize (\r
+  VOID\r
+  )\r
+{\r
+  return (UINTN) PcdGet64 (PcdPciExpressBaseSize);\r
+}\r
+\r
 /**\r
   Reads an 8-bit PCI configuration register.\r
 \r
@@ -91,7 +110,8 @@ GetPciExpressBaseAddress (
   @param  Address The address that encodes the PCI Bus, Device, Function and\r
                   Register.\r
 \r
-  @return The read value from the PCI configuration register.\r
+  @retval 0xFF  Invalid PCI address.\r
+  @retval other The read value from the PCI configuration register.\r
 \r
 **/\r
 UINT8\r
@@ -101,6 +121,9 @@ PciExpressRead8 (
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  if (Address >= PcdPciExpressBaseSize()) {\r
+    return (UINT8) -1;\r
+  }\r
   return MmioRead8 ((UINTN) GetPciExpressBaseAddress () + Address);\r
 }\r
 \r
@@ -117,7 +140,8 @@ PciExpressRead8 (
                   Register.\r
   @param  Value   The value to write.\r
 \r
-  @return The value written to the PCI configuration register.\r
+  @retval 0xFF  Invalid PCI address.\r
+  @retval other The value written to the PCI configuration register.\r
 \r
 **/\r
 UINT8\r
@@ -128,6 +152,9 @@ PciExpressWrite8 (
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  if (Address >= PcdPciExpressBaseSize()) {\r
+    return (UINT8) -1;\r
+  }\r
   return MmioWrite8 ((UINTN) GetPciExpressBaseAddress () + Address, Value);\r
 }\r
 \r
@@ -148,7 +175,8 @@ PciExpressWrite8 (
                   Register.\r
   @param  OrData  The value to OR with the PCI configuration register.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFF  Invalid PCI address.\r
+  @retval other The value written to the PCI configuration register.\r
 \r
 **/\r
 UINT8\r
@@ -159,6 +187,9 @@ PciExpressOr8 (
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  if (Address >= PcdPciExpressBaseSize()) {\r
+    return (UINT8) -1;\r
+  }\r
   return MmioOr8 ((UINTN) GetPciExpressBaseAddress () + Address, OrData);\r
 }\r
 \r
@@ -179,7 +210,8 @@ PciExpressOr8 (
                   Register.\r
   @param  AndData The value to AND with the PCI configuration register.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFF  Invalid PCI address.\r
+  @retval other The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT8\r
@@ -190,6 +222,9 @@ PciExpressAnd8 (
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  if (Address >= PcdPciExpressBaseSize()) {\r
+    return (UINT8) -1;\r
+  }\r
   return MmioAnd8 ((UINTN) GetPciExpressBaseAddress () + Address, AndData);\r
 }\r
 \r
@@ -212,7 +247,8 @@ PciExpressAnd8 (
   @param  AndData The value to AND with the PCI configuration register.\r
   @param  OrData  The value to OR with the result of the AND operation.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFF  Invalid PCI address.\r
+  @retval other The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT8\r
@@ -224,6 +260,9 @@ PciExpressAndThenOr8 (
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  if (Address >= PcdPciExpressBaseSize()) {\r
+    return (UINT8) -1;\r
+  }\r
   return MmioAndThenOr8 (\r
            (UINTN) GetPciExpressBaseAddress () + Address,\r
            AndData,\r
@@ -249,7 +288,9 @@ PciExpressAndThenOr8 (
   @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                     Range 0..7.\r
 \r
-  @return The value of the bit field read from the PCI configuration register.\r
+  @retval 0xFF  Invalid PCI address.\r
+  @retval other The value of the bit field read from the PCI configuration\r
+                register.\r
 \r
 **/\r
 UINT8\r
@@ -261,6 +302,9 @@ PciExpressBitFieldRead8 (
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  if (Address >= PcdPciExpressBaseSize()) {\r
+    return (UINT8) -1;\r
+  }\r
   return MmioBitFieldRead8 (\r
            (UINTN) GetPciExpressBaseAddress () + Address,\r
            StartBit,\r
@@ -289,7 +333,8 @@ PciExpressBitFieldRead8 (
                     Range 0..7.\r
   @param  Value     The new value of the bit field.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFF  Invalid PCI address.\r
+  @retval other The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT8\r
@@ -302,6 +347,9 @@ PciExpressBitFieldWrite8 (
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  if (Address >= PcdPciExpressBaseSize()) {\r
+    return (UINT8) -1;\r
+  }\r
   return MmioBitFieldWrite8 (\r
            (UINTN) GetPciExpressBaseAddress () + Address,\r
            StartBit,\r
@@ -334,7 +382,8 @@ PciExpressBitFieldWrite8 (
                     Range 0..7.\r
   @param  OrData    The value to OR with the PCI configuration register.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFF  Invalid PCI address.\r
+  @retval other The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT8\r
@@ -347,6 +396,9 @@ PciExpressBitFieldOr8 (
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  if (Address >= PcdPciExpressBaseSize()) {\r
+    return (UINT8) -1;\r
+  }\r
   return MmioBitFieldOr8 (\r
            (UINTN) GetPciExpressBaseAddress () + Address,\r
            StartBit,\r
@@ -379,7 +431,8 @@ PciExpressBitFieldOr8 (
                     Range 0..7.\r
   @param  AndData   The value to AND with the PCI configuration register.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFF  Invalid PCI address.\r
+  @retval other The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT8\r
@@ -392,6 +445,9 @@ PciExpressBitFieldAnd8 (
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  if (Address >= PcdPciExpressBaseSize()) {\r
+    return (UINT8) -1;\r
+  }\r
   return MmioBitFieldAnd8 (\r
            (UINTN) GetPciExpressBaseAddress () + Address,\r
            StartBit,\r
@@ -428,7 +484,8 @@ PciExpressBitFieldAnd8 (
   @param  AndData   The value to AND with the PCI configuration register.\r
   @param  OrData    The value to OR with the result of the AND operation.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFF  Invalid PCI address.\r
+  @retval other The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT8\r
@@ -442,6 +499,9 @@ PciExpressBitFieldAndThenOr8 (
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  if (Address >= PcdPciExpressBaseSize()) {\r
+    return (UINT8) -1;\r
+  }\r
   return MmioBitFieldAndThenOr8 (\r
            (UINTN) GetPciExpressBaseAddress () + Address,\r
            StartBit,\r
@@ -464,7 +524,8 @@ PciExpressBitFieldAndThenOr8 (
   @param  Address The address that encodes the PCI Bus, Device, Function and\r
                   Register.\r
 \r
-  @return The read value from the PCI configuration register.\r
+  @retval 0xFF  Invalid PCI address.\r
+  @retval other The read value from the PCI configuration register.\r
 \r
 **/\r
 UINT16\r
@@ -474,6 +535,9 @@ PciExpressRead16 (
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  if (Address >= PcdPciExpressBaseSize()) {\r
+    return (UINT16) -1;\r
+  }\r
   return MmioRead16 ((UINTN) GetPciExpressBaseAddress () + Address);\r
 }\r
 \r
@@ -491,7 +555,8 @@ PciExpressRead16 (
                   Register.\r
   @param  Value   The value to write.\r
 \r
-  @return The value written to the PCI configuration register.\r
+  @retval 0xFFFF  Invalid PCI address.\r
+  @retval other   The value written to the PCI configuration register.\r
 \r
 **/\r
 UINT16\r
@@ -502,6 +567,9 @@ PciExpressWrite16 (
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  if (Address >= PcdPciExpressBaseSize()) {\r
+    return (UINT16) -1;\r
+  }\r
   return MmioWrite16 ((UINTN) GetPciExpressBaseAddress () + Address, Value);\r
 }\r
 \r
@@ -523,7 +591,8 @@ PciExpressWrite16 (
                   Register.\r
   @param  OrData  The value to OR with the PCI configuration register.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFFFF  Invalid PCI address.\r
+  @retval other   The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT16\r
@@ -534,6 +603,9 @@ PciExpressOr16 (
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  if (Address >= PcdPciExpressBaseSize()) {\r
+    return (UINT16) -1;\r
+  }\r
   return MmioOr16 ((UINTN) GetPciExpressBaseAddress () + Address, OrData);\r
 }\r
 \r
@@ -555,7 +627,8 @@ PciExpressOr16 (
                   Register.\r
   @param  AndData The value to AND with the PCI configuration register.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFFFF  Invalid PCI address.\r
+  @retval other   The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT16\r
@@ -566,6 +639,9 @@ PciExpressAnd16 (
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  if (Address >= PcdPciExpressBaseSize()) {\r
+    return (UINT16) -1;\r
+  }\r
   return MmioAnd16 ((UINTN) GetPciExpressBaseAddress () + Address, AndData);\r
 }\r
 \r
@@ -589,7 +665,8 @@ PciExpressAnd16 (
   @param  AndData The value to AND with the PCI configuration register.\r
   @param  OrData  The value to OR with the result of the AND operation.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFFFF  Invalid PCI address.\r
+  @retval other   The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT16\r
@@ -601,6 +678,9 @@ PciExpressAndThenOr16 (
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  if (Address >= PcdPciExpressBaseSize()) {\r
+    return (UINT16) -1;\r
+  }\r
   return MmioAndThenOr16 (\r
            (UINTN) GetPciExpressBaseAddress () + Address,\r
            AndData,\r
@@ -627,7 +707,9 @@ PciExpressAndThenOr16 (
   @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                     Range 0..15.\r
 \r
-  @return The value of the bit field read from the PCI configuration register.\r
+  @retval 0xFFFF  Invalid PCI address.\r
+  @retval other   The value of the bit field read from the PCI configuration\r
+                  register.\r
 \r
 **/\r
 UINT16\r
@@ -639,6 +721,9 @@ PciExpressBitFieldRead16 (
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  if (Address >= PcdPciExpressBaseSize()) {\r
+    return (UINT16) -1;\r
+  }\r
   return MmioBitFieldRead16 (\r
            (UINTN) GetPciExpressBaseAddress () + Address,\r
            StartBit,\r
@@ -668,7 +753,8 @@ PciExpressBitFieldRead16 (
                     Range 0..15.\r
   @param  Value     The new value of the bit field.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFFFF  Invalid PCI address.\r
+  @retval other   The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT16\r
@@ -681,6 +767,9 @@ PciExpressBitFieldWrite16 (
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  if (Address >= PcdPciExpressBaseSize()) {\r
+    return (UINT16) -1;\r
+  }\r
   return MmioBitFieldWrite16 (\r
            (UINTN) GetPciExpressBaseAddress () + Address,\r
            StartBit,\r
@@ -714,7 +803,8 @@ PciExpressBitFieldWrite16 (
                     Range 0..15.\r
   @param  OrData    The value to OR with the PCI configuration register.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFFFF  Invalid PCI address.\r
+  @retval other   The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT16\r
@@ -727,6 +817,9 @@ PciExpressBitFieldOr16 (
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  if (Address >= PcdPciExpressBaseSize()) {\r
+    return (UINT16) -1;\r
+  }\r
   return MmioBitFieldOr16 (\r
            (UINTN) GetPciExpressBaseAddress () + Address,\r
            StartBit,\r
@@ -760,7 +853,8 @@ PciExpressBitFieldOr16 (
                     Range 0..15.\r
   @param  AndData   The value to AND with the PCI configuration register.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFFFF  Invalid PCI address.\r
+  @retval other   The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT16\r
@@ -773,6 +867,9 @@ PciExpressBitFieldAnd16 (
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  if (Address >= PcdPciExpressBaseSize()) {\r
+    return (UINT16) -1;\r
+  }\r
   return MmioBitFieldAnd16 (\r
            (UINTN) GetPciExpressBaseAddress () + Address,\r
            StartBit,\r
@@ -810,7 +907,8 @@ PciExpressBitFieldAnd16 (
   @param  AndData   The value to AND with the PCI configuration register.\r
   @param  OrData    The value to OR with the result of the AND operation.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFFFF  Invalid PCI address.\r
+  @retval other   The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT16\r
@@ -824,6 +922,9 @@ PciExpressBitFieldAndThenOr16 (
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  if (Address >= PcdPciExpressBaseSize()) {\r
+    return (UINT16) -1;\r
+  }\r
   return MmioBitFieldAndThenOr16 (\r
            (UINTN) GetPciExpressBaseAddress () + Address,\r
            StartBit,\r
@@ -846,7 +947,8 @@ PciExpressBitFieldAndThenOr16 (
   @param  Address The address that encodes the PCI Bus, Device, Function and\r
                   Register.\r
 \r
-  @return The read value from the PCI configuration register.\r
+  @retval 0xFFFF  Invalid PCI address.\r
+  @retval other   The read value from the PCI configuration register.\r
 \r
 **/\r
 UINT32\r
@@ -856,6 +958,9 @@ PciExpressRead32 (
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  if (Address >= PcdPciExpressBaseSize()) {\r
+    return (UINT32) -1;\r
+  }\r
   return MmioRead32 ((UINTN) GetPciExpressBaseAddress () + Address);\r
 }\r
 \r
@@ -873,7 +978,8 @@ PciExpressRead32 (
                   Register.\r
   @param  Value   The value to write.\r
 \r
-  @return The value written to the PCI configuration register.\r
+  @retval 0xFFFFFFFF  Invalid PCI address.\r
+  @retval other       The value written to the PCI configuration register.\r
 \r
 **/\r
 UINT32\r
@@ -884,6 +990,9 @@ PciExpressWrite32 (
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  if (Address >= PcdPciExpressBaseSize()) {\r
+    return (UINT32) -1;\r
+  }\r
   return MmioWrite32 ((UINTN) GetPciExpressBaseAddress () + Address, Value);\r
 }\r
 \r
@@ -905,7 +1014,8 @@ PciExpressWrite32 (
                   Register.\r
   @param  OrData  The value to OR with the PCI configuration register.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFFFFFFFF  Invalid PCI address.\r
+  @retval other       The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT32\r
@@ -916,6 +1026,9 @@ PciExpressOr32 (
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  if (Address >= PcdPciExpressBaseSize()) {\r
+    return (UINT32) -1;\r
+  }\r
   return MmioOr32 ((UINTN) GetPciExpressBaseAddress () + Address, OrData);\r
 }\r
 \r
@@ -937,7 +1050,8 @@ PciExpressOr32 (
                   Register.\r
   @param  AndData The value to AND with the PCI configuration register.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFFFFFFFF  Invalid PCI address.\r
+  @retval other       The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT32\r
@@ -948,6 +1062,9 @@ PciExpressAnd32 (
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  if (Address >= PcdPciExpressBaseSize()) {\r
+    return (UINT32) -1;\r
+  }\r
   return MmioAnd32 ((UINTN) GetPciExpressBaseAddress () + Address, AndData);\r
 }\r
 \r
@@ -971,7 +1088,8 @@ PciExpressAnd32 (
   @param  AndData The value to AND with the PCI configuration register.\r
   @param  OrData  The value to OR with the result of the AND operation.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFFFFFFFF  Invalid PCI address.\r
+  @retval other       The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT32\r
@@ -983,6 +1101,9 @@ PciExpressAndThenOr32 (
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  if (Address >= PcdPciExpressBaseSize()) {\r
+    return (UINT32) -1;\r
+  }\r
   return MmioAndThenOr32 (\r
            (UINTN) GetPciExpressBaseAddress () + Address,\r
            AndData,\r
@@ -1009,7 +1130,9 @@ PciExpressAndThenOr32 (
   @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                     Range 0..31.\r
 \r
-  @return The value of the bit field read from the PCI configuration register.\r
+  @retval 0xFFFFFFFF  Invalid PCI address.\r
+  @retval other       The value of the bit field read from the PCI\r
+                      configuration register.\r
 \r
 **/\r
 UINT32\r
@@ -1021,6 +1144,9 @@ PciExpressBitFieldRead32 (
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  if (Address >= PcdPciExpressBaseSize()) {\r
+    return (UINT32) -1;\r
+  }\r
   return MmioBitFieldRead32 (\r
            (UINTN) GetPciExpressBaseAddress () + Address,\r
            StartBit,\r
@@ -1050,7 +1176,8 @@ PciExpressBitFieldRead32 (
                     Range 0..31.\r
   @param  Value     The new value of the bit field.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFFFFFFFF  Invalid PCI address.\r
+  @retval other       The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT32\r
@@ -1063,6 +1190,9 @@ PciExpressBitFieldWrite32 (
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  if (Address >= PcdPciExpressBaseSize()) {\r
+    return (UINT32) -1;\r
+  }\r
   return MmioBitFieldWrite32 (\r
            (UINTN) GetPciExpressBaseAddress () + Address,\r
            StartBit,\r
@@ -1096,7 +1226,8 @@ PciExpressBitFieldWrite32 (
                     Range 0..31.\r
   @param  OrData    The value to OR with the PCI configuration register.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFFFFFFFF  Invalid PCI address.\r
+  @retval other       The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT32\r
@@ -1109,6 +1240,9 @@ PciExpressBitFieldOr32 (
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  if (Address >= PcdPciExpressBaseSize()) {\r
+    return (UINT32) -1;\r
+  }\r
   return MmioBitFieldOr32 (\r
            (UINTN) GetPciExpressBaseAddress () + Address,\r
            StartBit,\r
@@ -1142,7 +1276,8 @@ PciExpressBitFieldOr32 (
                     Range 0..31.\r
   @param  AndData   The value to AND with the PCI configuration register.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFFFFFFFF  Invalid PCI address.\r
+  @retval other       The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT32\r
@@ -1155,6 +1290,9 @@ PciExpressBitFieldAnd32 (
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  if (Address >= PcdPciExpressBaseSize()) {\r
+    return (UINT32) -1;\r
+  }\r
   return MmioBitFieldAnd32 (\r
            (UINTN) GetPciExpressBaseAddress () + Address,\r
            StartBit,\r
@@ -1192,7 +1330,8 @@ PciExpressBitFieldAnd32 (
   @param  AndData   The value to AND with the PCI configuration register.\r
   @param  OrData    The value to OR with the result of the AND operation.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFFFFFFFF  Invalid PCI address.\r
+  @retval other       The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT32\r
@@ -1206,6 +1345,9 @@ PciExpressBitFieldAndThenOr32 (
   )\r
 {\r
   ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  if (Address >= PcdPciExpressBaseSize()) {\r
+    return (UINT32) -1;\r
+  }\r
   return MmioBitFieldAndThenOr32 (\r
            (UINTN) GetPciExpressBaseAddress () + Address,\r
            StartBit,\r
@@ -1235,7 +1377,8 @@ PciExpressBitFieldAndThenOr32 (
   @param  Size          The size in bytes of the transfer.\r
   @param  Buffer        The pointer to a buffer receiving the data read.\r
 \r
-  @return Size read data from StartAddress.\r
+  @retval (UINTN)-1  Invalid PCI address.\r
+  @retval other      Size read data from StartAddress.\r
 \r
 **/\r
 UINTN\r
@@ -1249,6 +1392,9 @@ PciExpressReadBuffer (
   UINTN   ReturnValue;\r
 \r
   ASSERT_INVALID_PCI_ADDRESS (StartAddress);\r
+  if (StartAddress >= PcdPciExpressBaseSize()) {\r
+    return (UINTN) -1;\r
+  }\r
   ASSERT (((StartAddress & 0xFFF) + Size) <= 0x1000);\r
 \r
   if (Size == 0) {\r
@@ -1335,7 +1481,8 @@ PciExpressReadBuffer (
   @param  Size          The size in bytes of the transfer.\r
   @param  Buffer        The pointer to a buffer containing the data to write.\r
 \r
-  @return Size written to StartAddress.\r
+  @retval (UINTN)-1  Invalid PCI address.\r
+  @retval other      Size written to StartAddress.\r
 \r
 **/\r
 UINTN\r
@@ -1349,6 +1496,9 @@ PciExpressWriteBuffer (
   UINTN                             ReturnValue;\r
 \r
   ASSERT_INVALID_PCI_ADDRESS (StartAddress);\r
+  if (StartAddress >= PcdPciExpressBaseSize()) {\r
+    return (UINTN) -1;\r
+  }\r
   ASSERT (((StartAddress & 0xFFF) + Size) <= 0x1000);\r
 \r
   if (Size == 0) {\r

diff --git a/MdePkg/Library/DxeRuntimePciExpressLib/DxeRuntimePciExpressLib.inf b/MdePkg/Library/DxeRuntimePciExpressLib/DxeRuntimePciExpressLib.inf
index 8d2ba1d18735e53446ec73a3f87003e5bd73e066..26a59bda1948d179e521e2cdcc74992e9d98b7b5 100644 (file)
--- a/MdePkg/Library/DxeRuntimePciExpressLib/DxeRuntimePciExpressLib.inf
+++ b/MdePkg/Library/DxeRuntimePciExpressLib/DxeRuntimePciExpressLib.inf
@@ -47,3 +47,4 @@
 \r
 [Pcd]\r
   gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress  ## CONSUMES\r
+  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseSize  ## CONSUMES\r

diff --git a/MdePkg/Library/DxeRuntimePciExpressLib/PciExpressLib.c b/MdePkg/Library/DxeRuntimePciExpressLib/PciExpressLib.c
index b8995435109f74c388cf73ac1891234a2e71ec5d..cb80725c5fa6adfb75821c1079fa0865e8b3e91a 100644 (file)
--- a/MdePkg/Library/DxeRuntimePciExpressLib/PciExpressLib.c
+++ b/MdePkg/Library/DxeRuntimePciExpressLib/PciExpressLib.c
@@ -25,6 +25,16 @@
 #include <Library/DxeServicesTableLib.h>\r
 #include <Library/UefiRuntimeLib.h>\r
 \r
+/**\r
+ Assert the validity of a PCI address. A valid PCI address should contain 1's\r
+ only in the low 28 bits.\r
+\r
+ @param A The address to validate.\r
+\r
+**/\r
+#define ASSERT_INVALID_PCI_ADDRESS(A) \\r
+ ASSERT (((A) & ~0xfffffff) == 0)\r
+\r
 ///\r
 /// Define table for mapping PCI Express MMIO physical addresses to virtual addresses at OS runtime\r
 ///\r
@@ -39,9 +49,10 @@ typedef struct {
 EFI_EVENT                               mDxeRuntimePciExpressLibVirtualNotifyEvent = NULL;\r
 \r
 ///\r
-/// Module global that contains the base physical address of the PCI Express MMIO range.\r
+/// Module global that contains the base physical address and size of the PCI Express MMIO range.\r
 ///\r
 UINTN                                   mDxeRuntimePciExpressLibPciExpressBaseAddress = 0;\r
+UINTN                                   mDxeRuntimePciExpressLibPciExpressBaseSize = 0;\r
 \r
 ///\r
 /// The number of PCI devices that have been registered for runtime access.\r
@@ -120,6 +131,7 @@ DxeRuntimePciExpressLibConstructor (
   // Cache the physical address of the PCI Express MMIO range into a module global variable\r
   //\r
   mDxeRuntimePciExpressLibPciExpressBaseAddress = (UINTN) PcdGet64 (PcdPciExpressBaseAddress);\r
+  mDxeRuntimePciExpressLibPciExpressBaseSize = (UINTN) PcdGet64 (PcdPciExpressBaseSize);\r
 \r
   //\r
   // Register SetVirtualAddressMap () notify function\r
@@ -179,8 +191,12 @@ DxeRuntimePciExpressLibDestructor (
   This internal functions retrieves PCI Express Base Address via a PCD entry\r
   PcdPciExpressBaseAddress.\r
 \r
-  @param  Address  The address that encodes the PCI Bus, Device, Function and Register.\r
-  @return          The base address of PCI Express.\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+  @param  Address   The address that encodes the PCI Bus, Device, Function and Register.\r
+\r
+  @retval (UINTN)-1 Invalid PCI address.\r
+  @retval other     The base address of PCI Express.\r
 \r
 **/\r
 UINTN\r
@@ -193,7 +209,14 @@ GetPciExpressAddress (
   //\r
   // Make sure Address is valid\r
   //\r
-  ASSERT (((Address) & ~0xfffffff) == 0);\r
+  ASSERT_INVALID_PCI_ADDRESS (Address);\r
+\r
+  //\r
+  // Make sure the Address is in MMCONF address space\r
+  //\r
+  if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {\r
+    return (UINTN) -1;\r
+  }\r
 \r
   //\r
   // Convert Address to a physical address in the MMIO PCI Express range\r
@@ -236,7 +259,6 @@ GetPciExpressAddress (
   //\r
   // No match was found.  This is a critical error at OS runtime, so ASSERT() and force a breakpoint.\r
   //\r
-  ASSERT (FALSE);\r
   CpuBreakpoint();\r
 \r
   //\r
@@ -288,7 +310,14 @@ PciExpressRegisterForRuntimeAccess (
   //\r
   // Make sure Address is valid\r
   //\r
-  ASSERT (((Address) & ~0xfffffff) == 0);\r
+ ASSERT_INVALID_PCI_ADDRESS (Address);\r
+\r
+  //\r
+  // Make sure the Address is in MMCONF address space\r
+  //\r
+  if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {\r
+    return RETURN_UNSUPPORTED;\r
+  }\r
 \r
   //\r
   // Convert Address to a physical address in the MMIO PCI Express range\r
@@ -354,8 +383,8 @@ PciExpressRegisterForRuntimeAccess (
 \r
   @param  Address The address that encodes the PCI Bus, Device, Function and\r
                   Register.\r
-\r
-  @return The read value from the PCI configuration register.\r
+  @retval 0xFF  Invalid PCI address.\r
+  @retval other The read value from the PCI configuration register.\r
 \r
 **/\r
 UINT8\r
@@ -364,6 +393,10 @@ PciExpressRead8 (
   IN      UINTN                     Address\r
   )\r
 {\r
+  ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {\r
+    return (UINT8) -1;\r
+  }\r
   return MmioRead8 (GetPciExpressAddress (Address));\r
 }\r
 \r
@@ -380,7 +413,8 @@ PciExpressRead8 (
                   Register.\r
   @param  Value   The value to write.\r
 \r
-  @return The value written to the PCI configuration register.\r
+  @retval 0xFF  Invalid PCI address.\r
+  @retval other The value written to the PCI configuration register.\r
 \r
 **/\r
 UINT8\r
@@ -390,6 +424,9 @@ PciExpressWrite8 (
   IN      UINT8                     Value\r
   )\r
 {\r
+  if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {\r
+    return (UINT8) -1;\r
+  }\r
   return MmioWrite8 (GetPciExpressAddress (Address), Value);\r
 }\r
 \r
@@ -410,7 +447,8 @@ PciExpressWrite8 (
                   Register.\r
   @param  OrData  The value to OR with the PCI configuration register.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFF  Invalid PCI address.\r
+  @retval other The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT8\r
@@ -420,6 +458,9 @@ PciExpressOr8 (
   IN      UINT8                     OrData\r
   )\r
 {\r
+  if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {\r
+    return (UINT8) -1;\r
+  }\r
   return MmioOr8 (GetPciExpressAddress (Address), OrData);\r
 }\r
 \r
@@ -440,7 +481,8 @@ PciExpressOr8 (
                   Register.\r
   @param  AndData The value to AND with the PCI configuration register.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFF  Invalid PCI address.\r
+  @retval other  The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT8\r
@@ -450,6 +492,9 @@ PciExpressAnd8 (
   IN      UINT8                     AndData\r
   )\r
 {\r
+  if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {\r
+    return (UINT8) -1;\r
+  }\r
   return MmioAnd8 (GetPciExpressAddress (Address), AndData);\r
 }\r
 \r
@@ -472,7 +517,8 @@ PciExpressAnd8 (
   @param  AndData The value to AND with the PCI configuration register.\r
   @param  OrData  The value to OR with the result of the AND operation.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFF  Invalid PCI address.\r
+  @retval other The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT8\r
@@ -483,6 +529,9 @@ PciExpressAndThenOr8 (
   IN      UINT8                     OrData\r
   )\r
 {\r
+  if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {\r
+    return (UINT8) -1;\r
+  }\r
   return MmioAndThenOr8 (\r
            GetPciExpressAddress (Address),\r
            AndData,\r
@@ -508,7 +557,8 @@ PciExpressAndThenOr8 (
   @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                     Range 0..7.\r
 \r
-  @return The value of the bit field read from the PCI configuration register.\r
+  @retval 0xFF  Invalid PCI address.\r
+  @retval other The value of the bit field read from the PCI configuration register.\r
 \r
 **/\r
 UINT8\r
@@ -519,6 +569,9 @@ PciExpressBitFieldRead8 (
   IN      UINTN                     EndBit\r
   )\r
 {\r
+  if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {\r
+    return (UINT8) -1;\r
+  }\r
   return MmioBitFieldRead8 (\r
            GetPciExpressAddress (Address),\r
            StartBit,\r
@@ -547,7 +600,8 @@ PciExpressBitFieldRead8 (
                     Range 0..7.\r
   @param  Value     The new value of the bit field.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFF  Invalid PCI address.\r
+  @retval other The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT8\r
@@ -559,6 +613,9 @@ PciExpressBitFieldWrite8 (
   IN      UINT8                     Value\r
   )\r
 {\r
+  if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {\r
+    return (UINT8) -1;\r
+  }\r
   return MmioBitFieldWrite8 (\r
            GetPciExpressAddress (Address),\r
            StartBit,\r
@@ -591,7 +648,8 @@ PciExpressBitFieldWrite8 (
                     Range 0..7.\r
   @param  OrData    The value to OR with the PCI configuration register.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFF  Invalid PCI address.\r
+  @retval other The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT8\r
@@ -603,6 +661,9 @@ PciExpressBitFieldOr8 (
   IN      UINT8                     OrData\r
   )\r
 {\r
+  if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {\r
+    return (UINT8) -1;\r
+  }\r
   return MmioBitFieldOr8 (\r
            GetPciExpressAddress (Address),\r
            StartBit,\r
@@ -635,7 +696,8 @@ PciExpressBitFieldOr8 (
                     Range 0..7.\r
   @param  AndData   The value to AND with the PCI configuration register.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFF  Invalid PCI address.\r
+  @retval other The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT8\r
@@ -647,6 +709,9 @@ PciExpressBitFieldAnd8 (
   IN      UINT8                     AndData\r
   )\r
 {\r
+  if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {\r
+    return (UINT8) -1;\r
+  }\r
   return MmioBitFieldAnd8 (\r
            GetPciExpressAddress (Address),\r
            StartBit,\r
@@ -683,7 +748,8 @@ PciExpressBitFieldAnd8 (
   @param  AndData   The value to AND with the PCI configuration register.\r
   @param  OrData    The value to OR with the result of the AND operation.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFF  Invalid PCI address.\r
+  @retval other The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT8\r
@@ -696,6 +762,9 @@ PciExpressBitFieldAndThenOr8 (
   IN      UINT8                     OrData\r
   )\r
 {\r
+  if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {\r
+    return (UINT8) -1;\r
+  }\r
   return MmioBitFieldAndThenOr8 (\r
            GetPciExpressAddress (Address),\r
            StartBit,\r
@@ -718,7 +787,8 @@ PciExpressBitFieldAndThenOr8 (
   @param  Address The address that encodes the PCI Bus, Device, Function and\r
                   Register.\r
 \r
-  @return The read value from the PCI configuration register.\r
+  @retval 0xFFFF  Invalid PCI address.\r
+  @retval other   The read value from the PCI configuration register.\r
 \r
 **/\r
 UINT16\r
@@ -727,6 +797,9 @@ PciExpressRead16 (
   IN      UINTN                     Address\r
   )\r
 {\r
+  if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {\r
+    return (UINT16) -1;\r
+  }\r
   return MmioRead16 (GetPciExpressAddress (Address));\r
 }\r
 \r
@@ -744,7 +817,8 @@ PciExpressRead16 (
                   Register.\r
   @param  Value   The value to write.\r
 \r
-  @return The value written to the PCI configuration register.\r
+  @retval 0xFFFF  Invalid PCI address.\r
+  @retval other   The value written to the PCI configuration register.\r
 \r
 **/\r
 UINT16\r
@@ -754,6 +828,9 @@ PciExpressWrite16 (
   IN      UINT16                    Value\r
   )\r
 {\r
+  if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {\r
+    return (UINT16) -1;\r
+  }\r
   return MmioWrite16 (GetPciExpressAddress (Address), Value);\r
 }\r
 \r
@@ -775,7 +852,8 @@ PciExpressWrite16 (
                   Register.\r
   @param  OrData  The value to OR with the PCI configuration register.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFFFF  Invalid PCI address.\r
+  @retval other   The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT16\r
@@ -785,6 +863,9 @@ PciExpressOr16 (
   IN      UINT16                    OrData\r
   )\r
 {\r
+  if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {\r
+    return (UINT16) -1;\r
+  }\r
   return MmioOr16 (GetPciExpressAddress (Address), OrData);\r
 }\r
 \r
@@ -806,7 +887,8 @@ PciExpressOr16 (
                   Register.\r
   @param  AndData The value to AND with the PCI configuration register.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFFFF  Invalid PCI address.\r
+  @retval other   The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT16\r
@@ -816,6 +898,9 @@ PciExpressAnd16 (
   IN      UINT16                    AndData\r
   )\r
 {\r
+  if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {\r
+    return (UINT16) -1;\r
+  }\r
   return MmioAnd16 (GetPciExpressAddress (Address), AndData);\r
 }\r
 \r
@@ -839,7 +924,8 @@ PciExpressAnd16 (
   @param  AndData The value to AND with the PCI configuration register.\r
   @param  OrData  The value to OR with the result of the AND operation.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFFFF  Invalid PCI address.\r
+  @retval other   The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT16\r
@@ -850,6 +936,9 @@ PciExpressAndThenOr16 (
   IN      UINT16                    OrData\r
   )\r
 {\r
+  if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {\r
+    return (UINT16) -1;\r
+  }\r
   return MmioAndThenOr16 (\r
            GetPciExpressAddress (Address),\r
            AndData,\r
@@ -876,7 +965,8 @@ PciExpressAndThenOr16 (
   @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                     Range 0..15.\r
 \r
-  @return The value of the bit field read from the PCI configuration register.\r
+  @retval 0xFFFF  Invalid PCI address.\r
+  @retval other   The value of the bit field read from the PCI configuration register.\r
 \r
 **/\r
 UINT16\r
@@ -887,6 +977,9 @@ PciExpressBitFieldRead16 (
   IN      UINTN                     EndBit\r
   )\r
 {\r
+  if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {\r
+    return (UINT16) -1;\r
+  }\r
   return MmioBitFieldRead16 (\r
            GetPciExpressAddress (Address),\r
            StartBit,\r
@@ -916,7 +1009,8 @@ PciExpressBitFieldRead16 (
                     Range 0..15.\r
   @param  Value     The new value of the bit field.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFFFF  Invalid PCI address.\r
+  @retval other   The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT16\r
@@ -928,6 +1022,9 @@ PciExpressBitFieldWrite16 (
   IN      UINT16                    Value\r
   )\r
 {\r
+  if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {\r
+    return (UINT16) -1;\r
+  }\r
   return MmioBitFieldWrite16 (\r
            GetPciExpressAddress (Address),\r
            StartBit,\r
@@ -961,7 +1058,8 @@ PciExpressBitFieldWrite16 (
                     Range 0..15.\r
   @param  OrData    The value to OR with the PCI configuration register.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFFFF  Invalid PCI address.\r
+  @retval other   The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT16\r
@@ -973,6 +1071,9 @@ PciExpressBitFieldOr16 (
   IN      UINT16                    OrData\r
   )\r
 {\r
+  if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {\r
+    return (UINT16) -1;\r
+  }\r
   return MmioBitFieldOr16 (\r
            GetPciExpressAddress (Address),\r
            StartBit,\r
@@ -1006,7 +1107,8 @@ PciExpressBitFieldOr16 (
                     Range 0..15.\r
   @param  AndData   The value to AND with the PCI configuration register.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFFFF  Invalid PCI address.\r
+  @retval other   The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT16\r
@@ -1018,6 +1120,9 @@ PciExpressBitFieldAnd16 (
   IN      UINT16                    AndData\r
   )\r
 {\r
+  if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {\r
+    return (UINT16) -1;\r
+  }\r
   return MmioBitFieldAnd16 (\r
            GetPciExpressAddress (Address),\r
            StartBit,\r
@@ -1055,7 +1160,8 @@ PciExpressBitFieldAnd16 (
   @param  AndData   The value to AND with the PCI configuration register.\r
   @param  OrData    The value to OR with the result of the AND operation.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFFFF  Invalid PCI address.\r
+  @retval other   The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT16\r
@@ -1068,6 +1174,9 @@ PciExpressBitFieldAndThenOr16 (
   IN      UINT16                    OrData\r
   )\r
 {\r
+  if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {\r
+    return (UINT16) -1;\r
+  }\r
   return MmioBitFieldAndThenOr16 (\r
            GetPciExpressAddress (Address),\r
            StartBit,\r
@@ -1090,7 +1199,8 @@ PciExpressBitFieldAndThenOr16 (
   @param  Address The address that encodes the PCI Bus, Device, Function and\r
                   Register.\r
 \r
-  @return The read value from the PCI configuration register.\r
+  @retval 0xFFFF  Invalid PCI address.\r
+  @retval other   The read value from the PCI configuration register.\r
 \r
 **/\r
 UINT32\r
@@ -1099,6 +1209,9 @@ PciExpressRead32 (
   IN      UINTN                     Address\r
   )\r
 {\r
+  if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {\r
+    return (UINT32) -1;\r
+  }\r
   return MmioRead32 (GetPciExpressAddress (Address));\r
 }\r
 \r
@@ -1116,7 +1229,8 @@ PciExpressRead32 (
                   Register.\r
   @param  Value   The value to write.\r
 \r
-  @return The value written to the PCI configuration register.\r
+  @retval 0xFFFFFFFF Invalid PCI address.\r
+  @retval other      The value written to the PCI configuration register.\r
 \r
 **/\r
 UINT32\r
@@ -1126,6 +1240,9 @@ PciExpressWrite32 (
   IN      UINT32                    Value\r
   )\r
 {\r
+  if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {\r
+    return (UINT32) -1;\r
+  }\r
   return MmioWrite32 (GetPciExpressAddress (Address), Value);\r
 }\r
 \r
@@ -1147,7 +1264,8 @@ PciExpressWrite32 (
                   Register.\r
   @param  OrData  The value to OR with the PCI configuration register.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFFFFFFFF Invalid PCI address.\r
+  @retval other      The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT32\r
@@ -1157,6 +1275,9 @@ PciExpressOr32 (
   IN      UINT32                    OrData\r
   )\r
 {\r
+  if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {\r
+    return (UINT32) -1;\r
+  }\r
   return MmioOr32 (GetPciExpressAddress (Address), OrData);\r
 }\r
 \r
@@ -1178,7 +1299,8 @@ PciExpressOr32 (
                   Register.\r
   @param  AndData The value to AND with the PCI configuration register.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFFFFFFFF Invalid PCI address.\r
+  @retval other      The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT32\r
@@ -1188,6 +1310,9 @@ PciExpressAnd32 (
   IN      UINT32                    AndData\r
   )\r
 {\r
+  if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {\r
+    return (UINT32) -1;\r
+  }\r
   return MmioAnd32 (GetPciExpressAddress (Address), AndData);\r
 }\r
 \r
@@ -1211,7 +1336,8 @@ PciExpressAnd32 (
   @param  AndData The value to AND with the PCI configuration register.\r
   @param  OrData  The value to OR with the result of the AND operation.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFFFFFFFF Invalid PCI address.\r
+  @retval other      The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT32\r
@@ -1222,6 +1348,9 @@ PciExpressAndThenOr32 (
   IN      UINT32                    OrData\r
   )\r
 {\r
+  if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {\r
+    return (UINT32) -1;\r
+  }\r
   return MmioAndThenOr32 (\r
            GetPciExpressAddress (Address),\r
            AndData,\r
@@ -1248,7 +1377,8 @@ PciExpressAndThenOr32 (
   @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                     Range 0..31.\r
 \r
-  @return The value of the bit field read from the PCI configuration register.\r
+  @retval 0xFFFFFFFF Invalid PCI address.\r
+  @retval other      The value of the bit field read from the PCI configuration register.\r
 \r
 **/\r
 UINT32\r
@@ -1259,6 +1389,9 @@ PciExpressBitFieldRead32 (
   IN      UINTN                     EndBit\r
   )\r
 {\r
+  if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {\r
+    return (UINT32) -1;\r
+  }\r
   return MmioBitFieldRead32 (\r
            GetPciExpressAddress (Address),\r
            StartBit,\r
@@ -1288,7 +1421,8 @@ PciExpressBitFieldRead32 (
                     Range 0..31.\r
   @param  Value     The new value of the bit field.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFFFFFFFF Invalid PCI address.\r
+  @retval other      The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT32\r
@@ -1300,6 +1434,9 @@ PciExpressBitFieldWrite32 (
   IN      UINT32                    Value\r
   )\r
 {\r
+  if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {\r
+    return (UINT32) -1;\r
+  }\r
   return MmioBitFieldWrite32 (\r
            GetPciExpressAddress (Address),\r
            StartBit,\r
@@ -1333,7 +1470,8 @@ PciExpressBitFieldWrite32 (
                     Range 0..31.\r
   @param  OrData    The value to OR with the PCI configuration register.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFFFFFFFF Invalid PCI address.\r
+  @retval other      The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT32\r
@@ -1345,6 +1483,9 @@ PciExpressBitFieldOr32 (
   IN      UINT32                    OrData\r
   )\r
 {\r
+  if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {\r
+    return (UINT32) -1;\r
+  }\r
   return MmioBitFieldOr32 (\r
            GetPciExpressAddress (Address),\r
            StartBit,\r
@@ -1378,7 +1519,8 @@ PciExpressBitFieldOr32 (
                     Range 0..31.\r
   @param  AndData   The value to AND with the PCI configuration register.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFFFFFFFF Invalid PCI address.\r
+  @retval other      The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT32\r
@@ -1390,6 +1532,9 @@ PciExpressBitFieldAnd32 (
   IN      UINT32                    AndData\r
   )\r
 {\r
+  if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {\r
+    return (UINT32) -1;\r
+  }\r
   return MmioBitFieldAnd32 (\r
            GetPciExpressAddress (Address),\r
            StartBit,\r
@@ -1427,7 +1572,8 @@ PciExpressBitFieldAnd32 (
   @param  AndData   The value to AND with the PCI configuration register.\r
   @param  OrData    The value to OR with the result of the AND operation.\r
 \r
-  @return The value written back to the PCI configuration register.\r
+  @retval 0xFFFFFFFF Invalid PCI address.\r
+  @retval other      The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT32\r
@@ -1440,6 +1586,9 @@ PciExpressBitFieldAndThenOr32 (
   IN      UINT32                    OrData\r
   )\r
 {\r
+  if (Address >= mDxeRuntimePciExpressLibPciExpressBaseSize) {\r
+    return (UINT32) -1;\r
+  }\r
   return MmioBitFieldAndThenOr32 (\r
            GetPciExpressAddress (Address),\r
            StartBit,\r
@@ -1469,7 +1618,8 @@ PciExpressBitFieldAndThenOr32 (
   @param  Size          The size in bytes of the transfer.\r
   @param  Buffer        The pointer to a buffer receiving the data read.\r
 \r
-  @return Size read data from StartAddress.\r
+  @retval 0xFFFFFFFF Invalid PCI address.\r
+  @retval other      Size read data from StartAddress.\r
 \r
 **/\r
 UINTN\r
@@ -1485,9 +1635,16 @@ PciExpressReadBuffer (
   //\r
   // Make sure Address is valid\r
   //\r
-  ASSERT (((StartAddress) & ~0xfffffff) == 0);\r
+  ASSERT_INVALID_PCI_ADDRESS (StartAddress);\r
   ASSERT (((StartAddress & 0xFFF) + Size) <= 0x1000);\r
 \r
+  //\r
+  // Make sure the Address is in MMCONF address space\r
+  //\r
+  if (StartAddress >= mDxeRuntimePciExpressLibPciExpressBaseSize) {\r
+    return (UINTN) -1;\r
+  }\r
+\r
   if (Size == 0) {\r
     return Size;\r
   }\r
@@ -1572,7 +1729,8 @@ PciExpressReadBuffer (
   @param  Size          The size in bytes of the transfer.\r
   @param  Buffer        The pointer to a buffer containing the data to write.\r
 \r
-  @return Size written to StartAddress.\r
+  @retval 0xFFFFFFFF Invalid PCI address.\r
+  @retval other      Size written to StartAddress.\r
 \r
 **/\r
 UINTN\r
@@ -1588,9 +1746,16 @@ PciExpressWriteBuffer (
   //\r
   // Make sure Address is valid\r
   //\r
-  ASSERT (((StartAddress) & ~0xfffffff) == 0);\r
+  ASSERT_INVALID_PCI_ADDRESS (StartAddress);\r
   ASSERT (((StartAddress & 0xFFF) + Size) <= 0x1000);\r
 \r
+  //\r
+  // Make sure the Address is in MMCONF address space\r
+  //\r
+  if (StartAddress >= mDxeRuntimePciExpressLibPciExpressBaseSize) {\r
+    return (UINTN) -1;\r
+  }\r
+\r
   if (Size == 0) {\r
     return 0;\r
   }\r

diff --git a/MdePkg/Library/SmmPciExpressLib/PciExpressLib.c b/MdePkg/Library/SmmPciExpressLib/PciExpressLib.c
index 35b9f775a80b06555e728c44e8eea055e6677f64..97bd32c8d20169dc4c69b9b18cdfd0c6b9e6d6f3 100644 (file)
--- a/MdePkg/Library/SmmPciExpressLib/PciExpressLib.c
+++ b/MdePkg/Library/SmmPciExpressLib/PciExpressLib.c
@@ -20,9 +20,10 @@
 #include <Library/PcdLib.h>\r
 \r
 ///\r
-/// Module global that contains the base physical address of the PCI Express MMIO range.\r
+/// Module global that contains the base physical address and size of the PCI Express MMIO range.\r
 ///\r
 UINTN mSmmPciExpressLibPciExpressBaseAddress = 0;\r
+UINTN mSmmPciExpressLibPciExpressBaseSize = 0;\r
 \r
 /**\r
  The constructor function caches the PCI Express Base Address\r
@@ -40,9 +41,10 @@ SmmPciExpressLibConstructor (
  )\r
 {\r
  //\r
- // Cache the physical address of the PCI Express MMIO range into a module global variable\r
+ // Cache the physical address and size of the PCI Express MMIO range into a module global variable\r
  //\r
  mSmmPciExpressLibPciExpressBaseAddress = (UINTN) PcdGet64 (PcdPciExpressBaseAddress);\r
+ mSmmPciExpressLibPciExpressBaseSize = (UINTN) PcdGet64 (PcdPciExpressBaseSize);\r
 \r
  return EFI_SUCCESS;\r
 }\r
@@ -97,8 +99,12 @@ PciExpressRegisterForRuntimeAccess (
  mSmmPciExpressLibPciExpressBaseAddress is initialized in the library constructor from PCD entry\r
  PcdPciExpressBaseAddress.\r
 \r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
  @param Address The address that encodes the PCI Bus, Device, Function and Register.\r
- @return MMIO address corresponding to Address.\r
+\r
+ @retval (UINTN)-1 Invalid PCI address.\r
+ @retval other     MMIO address corresponding to Address.\r
 \r
 **/\r
 UINTN\r
@@ -110,6 +116,12 @@ GetPciExpressAddress (
  // Make sure Address is valid\r
  //\r
  ASSERT_INVALID_PCI_ADDRESS (Address);\r
+ //\r
+ // Make sure the Address is in MMCONF address space\r
+ //\r
+ if (Address >= mSmmPciExpressLibPciExpressBaseSize) {\r
+   return (UINTN) -1;\r
+ }\r
  return mSmmPciExpressLibPciExpressBaseAddress + Address;\r
 }\r
 \r
@@ -125,7 +137,8 @@ GetPciExpressAddress (
  @param Address The address that encodes the PCI Bus, Device, Function and\r
  Register.\r
 \r
- @return The read value from the PCI configuration register.\r
+ @retval 0xFF  Invalid PCI address.\r
+ @retval other The read value from the PCI configuration register.\r
 \r
 **/\r
 UINT8\r
@@ -134,6 +147,9 @@ PciExpressRead8 (
  IN UINTN Address\r
  )\r
 {\r
+ if (Address >= mSmmPciExpressLibPciExpressBaseSize) {\r
+   return (UINT8) -1;\r
+ }\r
  return MmioRead8 (GetPciExpressAddress (Address));\r
 }\r
 \r
@@ -150,7 +166,8 @@ PciExpressRead8 (
  Register.\r
  @param Value The value to write.\r
 \r
- @return The value written to the PCI configuration register.\r
+ @retval 0xFF  Invalid PCI address.\r
+ @retval other The value written to the PCI configuration register.\r
 \r
 **/\r
 UINT8\r
@@ -160,6 +177,9 @@ PciExpressWrite8 (
  IN UINT8 Value\r
  )\r
 {\r
+ if (Address >= mSmmPciExpressLibPciExpressBaseSize) {\r
+   return (UINT8) -1;\r
+ }\r
  return MmioWrite8 (GetPciExpressAddress (Address), Value);\r
 }\r
 \r
@@ -180,7 +200,8 @@ PciExpressWrite8 (
  Register.\r
  @param OrData The value to OR with the PCI configuration register.\r
 \r
- @return The value written back to the PCI configuration register.\r
+ @retval 0xFF  Invalid PCI address.\r
+ @retval other The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT8\r
@@ -190,6 +211,9 @@ PciExpressOr8 (
  IN UINT8 OrData\r
  )\r
 {\r
+ if (Address >= mSmmPciExpressLibPciExpressBaseSize) {\r
+   return (UINT8) -1;\r
+ }\r
  return MmioOr8 (GetPciExpressAddress (Address), OrData);\r
 }\r
 \r
@@ -210,7 +234,8 @@ PciExpressOr8 (
  Register.\r
  @param AndData The value to AND with the PCI configuration register.\r
 \r
- @return The value written back to the PCI configuration register.\r
+ @retval 0xFF  Invalid PCI address.\r
+ @retval other The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT8\r
@@ -220,6 +245,9 @@ PciExpressAnd8 (
  IN UINT8 AndData\r
  )\r
 {\r
+ if (Address >= mSmmPciExpressLibPciExpressBaseSize) {\r
+   return (UINT8) -1;\r
+ }\r
  return MmioAnd8 (GetPciExpressAddress (Address), AndData);\r
 }\r
 \r
@@ -242,7 +270,8 @@ PciExpressAnd8 (
  @param AndData The value to AND with the PCI configuration register.\r
  @param OrData The value to OR with the result of the AND operation.\r
 \r
- @return The value written back to the PCI configuration register.\r
+ @retval 0xFF  Invalid PCI address.\r
+ @retval other The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT8\r
@@ -253,6 +282,9 @@ PciExpressAndThenOr8 (
  IN UINT8 OrData\r
  )\r
 {\r
+ if (Address >= mSmmPciExpressLibPciExpressBaseSize) {\r
+   return (UINT8) -1;\r
+ }\r
  return MmioAndThenOr8 (\r
  GetPciExpressAddress (Address),\r
  AndData,\r
@@ -278,7 +310,8 @@ PciExpressAndThenOr8 (
  @param EndBit The ordinal of the most significant bit in the bit field.\r
  Range 0..7.\r
 \r
- @return The value of the bit field read from the PCI configuration register.\r
+ @retval 0xFF  Invalid PCI address.\r
+ @retval other The value of the bit field read from the PCI configuration register.\r
 \r
 **/\r
 UINT8\r
@@ -289,6 +322,9 @@ PciExpressBitFieldRead8 (
  IN UINTN EndBit\r
  )\r
 {\r
+ if (Address >= mSmmPciExpressLibPciExpressBaseSize) {\r
+   return (UINT8) -1;\r
+ }\r
  return MmioBitFieldRead8 (\r
  GetPciExpressAddress (Address),\r
  StartBit,\r
@@ -317,7 +353,8 @@ PciExpressBitFieldRead8 (
  Range 0..7.\r
  @param Value The new value of the bit field.\r
 \r
- @return The value written back to the PCI configuration register.\r
+ @retval 0xFF  Invalid PCI address.\r
+ @retval other The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT8\r
@@ -329,6 +366,9 @@ PciExpressBitFieldWrite8 (
  IN UINT8 Value\r
  )\r
 {\r
+ if (Address >= mSmmPciExpressLibPciExpressBaseSize) {\r
+   return (UINT8) -1;\r
+ }\r
  return MmioBitFieldWrite8 (\r
  GetPciExpressAddress (Address),\r
  StartBit,\r
@@ -361,7 +401,8 @@ PciExpressBitFieldWrite8 (
  Range 0..7.\r
  @param OrData The value to OR with the PCI configuration register.\r
 \r
- @return The value written back to the PCI configuration register.\r
+ @retval 0xFF  Invalid PCI address.\r
+ @retval other The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT8\r
@@ -373,6 +414,9 @@ PciExpressBitFieldOr8 (
  IN UINT8 OrData\r
  )\r
 {\r
+ if (Address >= mSmmPciExpressLibPciExpressBaseSize) {\r
+   return (UINT8) -1;\r
+ }\r
  return MmioBitFieldOr8 (\r
  GetPciExpressAddress (Address),\r
  StartBit,\r
@@ -405,7 +449,8 @@ PciExpressBitFieldOr8 (
  Range 0..7.\r
  @param AndData The value to AND with the PCI configuration register.\r
 \r
- @return The value written back to the PCI configuration register.\r
+ @retval 0xFF  Invalid PCI address.\r
+ @retval other The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT8\r
@@ -417,6 +462,9 @@ PciExpressBitFieldAnd8 (
  IN UINT8 AndData\r
  )\r
 {\r
+ if (Address >= mSmmPciExpressLibPciExpressBaseSize) {\r
+   return (UINT8) -1;\r
+ }\r
  return MmioBitFieldAnd8 (\r
  GetPciExpressAddress (Address),\r
  StartBit,\r
@@ -453,7 +501,8 @@ PciExpressBitFieldAnd8 (
  @param AndData The value to AND with the PCI configuration register.\r
  @param OrData The value to OR with the result of the AND operation.\r
 \r
- @return The value written back to the PCI configuration register.\r
+ @retval 0xFF  Invalid PCI address.\r
+ @retval other The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT8\r
@@ -466,6 +515,9 @@ PciExpressBitFieldAndThenOr8 (
  IN UINT8 OrData\r
  )\r
 {\r
+ if (Address >= mSmmPciExpressLibPciExpressBaseSize) {\r
+   return (UINT8) -1;\r
+ }\r
  return MmioBitFieldAndThenOr8 (\r
  GetPciExpressAddress (Address),\r
  StartBit,\r
@@ -488,7 +540,8 @@ PciExpressBitFieldAndThenOr8 (
  @param Address The address that encodes the PCI Bus, Device, Function and\r
  Register.\r
 \r
- @return The read value from the PCI configuration register.\r
+ @retval 0xFF  Invalid PCI address.\r
+ @retval other The read value from the PCI configuration register.\r
 \r
 **/\r
 UINT16\r
@@ -497,6 +550,9 @@ PciExpressRead16 (
  IN UINTN Address\r
  )\r
 {\r
+ if (Address >= mSmmPciExpressLibPciExpressBaseSize) {\r
+   return (UINT16) -1;\r
+ }\r
  return MmioRead16 (GetPciExpressAddress (Address));\r
 }\r
 \r
@@ -514,7 +570,8 @@ PciExpressRead16 (
  Register.\r
  @param Value The value to write.\r
 \r
- @return The value written to the PCI configuration register.\r
+ @retval 0xFFFF  Invalid PCI address.\r
+ @retval other   The value written to the PCI configuration register.\r
 \r
 **/\r
 UINT16\r
@@ -524,6 +581,9 @@ PciExpressWrite16 (
  IN UINT16 Value\r
  )\r
 {\r
+ if (Address >= mSmmPciExpressLibPciExpressBaseSize) {\r
+   return (UINT16) -1;\r
+ }\r
  return MmioWrite16 (GetPciExpressAddress (Address), Value);\r
 }\r
 \r
@@ -545,7 +605,8 @@ PciExpressWrite16 (
  Register.\r
  @param OrData The value to OR with the PCI configuration register.\r
 \r
- @return The value written back to the PCI configuration register.\r
+ @retval 0xFFFF  Invalid PCI address.\r
+ @retval other   The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT16\r
@@ -555,6 +616,9 @@ PciExpressOr16 (
  IN UINT16 OrData\r
  )\r
 {\r
+ if (Address >= mSmmPciExpressLibPciExpressBaseSize) {\r
+   return (UINT16) -1;\r
+ }\r
  return MmioOr16 (GetPciExpressAddress (Address), OrData);\r
 }\r
 \r
@@ -576,7 +640,8 @@ PciExpressOr16 (
  Register.\r
  @param AndData The value to AND with the PCI configuration register.\r
 \r
- @return The value written back to the PCI configuration register.\r
+ @retval 0xFFFF  Invalid PCI address.\r
+ @retval other   The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT16\r
@@ -586,6 +651,9 @@ PciExpressAnd16 (
  IN UINT16 AndData\r
  )\r
 {\r
+ if (Address >= mSmmPciExpressLibPciExpressBaseSize) {\r
+   return (UINT16) -1;\r
+ }\r
  return MmioAnd16 (GetPciExpressAddress (Address), AndData);\r
 }\r
 \r
@@ -609,7 +677,8 @@ PciExpressAnd16 (
  @param AndData The value to AND with the PCI configuration register.\r
  @param OrData The value to OR with the result of the AND operation.\r
 \r
- @return The value written back to the PCI configuration register.\r
+ @retval 0xFFFF  Invalid PCI address.\r
+ @retval other   The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT16\r
@@ -620,6 +689,9 @@ PciExpressAndThenOr16 (
  IN UINT16 OrData\r
  )\r
 {\r
+ if (Address >= mSmmPciExpressLibPciExpressBaseSize) {\r
+   return (UINT16) -1;\r
+ }\r
  return MmioAndThenOr16 (\r
  GetPciExpressAddress (Address),\r
  AndData,\r
@@ -646,7 +718,8 @@ PciExpressAndThenOr16 (
  @param EndBit The ordinal of the most significant bit in the bit field.\r
  Range 0..15.\r
 \r
- @return The value of the bit field read from the PCI configuration register.\r
+ @retval 0xFFFF  Invalid PCI address.\r
+ @retval other   The value of the bit field read from the PCI configuration register.\r
 \r
 **/\r
 UINT16\r
@@ -657,6 +730,9 @@ PciExpressBitFieldRead16 (
  IN UINTN EndBit\r
  )\r
 {\r
+ if (Address >= mSmmPciExpressLibPciExpressBaseSize) {\r
+   return (UINT16) -1;\r
+ }\r
  return MmioBitFieldRead16 (\r
  GetPciExpressAddress (Address),\r
  StartBit,\r
@@ -686,7 +762,8 @@ PciExpressBitFieldRead16 (
  Range 0..15.\r
  @param Value The new value of the bit field.\r
 \r
- @return The value written back to the PCI configuration register.\r
+ @retval 0xFFFF  Invalid PCI address.\r
+ @retval other   The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT16\r
@@ -698,6 +775,9 @@ PciExpressBitFieldWrite16 (
  IN UINT16 Value\r
  )\r
 {\r
+ if (Address >= mSmmPciExpressLibPciExpressBaseSize) {\r
+   return (UINT16) -1;\r
+ }\r
  return MmioBitFieldWrite16 (\r
  GetPciExpressAddress (Address),\r
  StartBit,\r
@@ -731,7 +811,8 @@ PciExpressBitFieldWrite16 (
  Range 0..15.\r
  @param OrData The value to OR with the PCI configuration register.\r
 \r
- @return The value written back to the PCI configuration register.\r
+ @retval 0xFFFF  Invalid PCI address.\r
+ @retval other   The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT16\r
@@ -743,6 +824,9 @@ PciExpressBitFieldOr16 (
  IN UINT16 OrData\r
  )\r
 {\r
+ if (Address >= mSmmPciExpressLibPciExpressBaseSize) {\r
+   return (UINT16) -1;\r
+ }\r
  return MmioBitFieldOr16 (\r
  GetPciExpressAddress (Address),\r
  StartBit,\r
@@ -776,7 +860,8 @@ PciExpressBitFieldOr16 (
  Range 0..15.\r
  @param AndData The value to AND with the PCI configuration register.\r
 \r
- @return The value written back to the PCI configuration register.\r
+ @retval 0xFFFF  Invalid PCI address.\r
+ @retval other   The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT16\r
@@ -788,6 +873,9 @@ PciExpressBitFieldAnd16 (
  IN UINT16 AndData\r
  )\r
 {\r
+ if (Address >= mSmmPciExpressLibPciExpressBaseSize) {\r
+   return (UINT16) -1;\r
+ }\r
  return MmioBitFieldAnd16 (\r
  GetPciExpressAddress (Address),\r
  StartBit,\r
@@ -825,7 +913,8 @@ PciExpressBitFieldAnd16 (
  @param AndData The value to AND with the PCI configuration register.\r
  @param OrData The value to OR with the result of the AND operation.\r
 \r
- @return The value written back to the PCI configuration register.\r
+ @retval 0xFFFF  Invalid PCI address.\r
+ @retval other   The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT16\r
@@ -838,6 +927,9 @@ PciExpressBitFieldAndThenOr16 (
  IN UINT16 OrData\r
  )\r
 {\r
+ if (Address >= mSmmPciExpressLibPciExpressBaseSize) {\r
+   return (UINT16) -1;\r
+ }\r
  return MmioBitFieldAndThenOr16 (\r
  GetPciExpressAddress (Address),\r
  StartBit,\r
@@ -860,7 +952,8 @@ PciExpressBitFieldAndThenOr16 (
  @param Address The address that encodes the PCI Bus, Device, Function and\r
  Register.\r
 \r
- @return The read value from the PCI configuration register.\r
+ @retval 0xFFFFFFFF Invalid PCI address.\r
+ @retval other      The read value from the PCI configuration register.\r
 \r
 **/\r
 UINT32\r
@@ -869,6 +962,9 @@ PciExpressRead32 (
  IN UINTN Address\r
  )\r
 {\r
+ if (Address >= mSmmPciExpressLibPciExpressBaseSize) {\r
+   return (UINT32) -1;\r
+ }\r
  return MmioRead32 (GetPciExpressAddress (Address));\r
 }\r
 \r
@@ -886,7 +982,8 @@ PciExpressRead32 (
  Register.\r
  @param Value The value to write.\r
 \r
- @return The value written to the PCI configuration register.\r
+ @retval 0xFFFFFFFF Invalid PCI address.\r
+ @retval other      The value written to the PCI configuration register.\r
 \r
 **/\r
 UINT32\r
@@ -896,6 +993,9 @@ PciExpressWrite32 (
  IN UINT32 Value\r
  )\r
 {\r
+ if (Address >= mSmmPciExpressLibPciExpressBaseSize) {\r
+   return (UINT32) -1;\r
+ }\r
  return MmioWrite32 (GetPciExpressAddress (Address), Value);\r
 }\r
 \r
@@ -917,7 +1017,8 @@ PciExpressWrite32 (
  Register.\r
  @param OrData The value to OR with the PCI configuration register.\r
 \r
- @return The value written back to the PCI configuration register.\r
+ @retval 0xFFFFFFFF Invalid PCI address.\r
+ @retval other      The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT32\r
@@ -927,6 +1028,9 @@ PciExpressOr32 (
  IN UINT32 OrData\r
  )\r
 {\r
+ if (Address >= mSmmPciExpressLibPciExpressBaseSize) {\r
+   return (UINT32) -1;\r
+ }\r
  return MmioOr32 (GetPciExpressAddress (Address), OrData);\r
 }\r
 \r
@@ -948,7 +1052,8 @@ PciExpressOr32 (
  Register.\r
  @param AndData The value to AND with the PCI configuration register.\r
 \r
- @return The value written back to the PCI configuration register.\r
+ @retval 0xFFFFFFFF Invalid PCI address.\r
+ @retval other      The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT32\r
@@ -958,6 +1063,9 @@ PciExpressAnd32 (
  IN UINT32 AndData\r
  )\r
 {\r
+ if (Address >= mSmmPciExpressLibPciExpressBaseSize) {\r
+   return (UINT32) -1;\r
+ }\r
  return MmioAnd32 (GetPciExpressAddress (Address), AndData);\r
 }\r
 \r
@@ -981,7 +1089,8 @@ PciExpressAnd32 (
  @param AndData The value to AND with the PCI configuration register.\r
  @param OrData The value to OR with the result of the AND operation.\r
 \r
- @return The value written back to the PCI configuration register.\r
+ @retval 0xFFFFFFFF Invalid PCI address.\r
+ @retval other      The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT32\r
@@ -992,6 +1101,9 @@ PciExpressAndThenOr32 (
  IN UINT32 OrData\r
  )\r
 {\r
+ if (Address >= mSmmPciExpressLibPciExpressBaseSize) {\r
+   return (UINT32) -1;\r
+ }\r
  return MmioAndThenOr32 (\r
  GetPciExpressAddress (Address),\r
  AndData,\r
@@ -1018,7 +1130,8 @@ PciExpressAndThenOr32 (
  @param EndBit The ordinal of the most significant bit in the bit field.\r
  Range 0..31.\r
 \r
- @return The value of the bit field read from the PCI configuration register.\r
+ @retval 0xFFFFFFFF Invalid PCI address.\r
+ @retval other      The value of the bit field read from the PCI configuration register.\r
 \r
 **/\r
 UINT32\r
@@ -1029,6 +1142,9 @@ PciExpressBitFieldRead32 (
  IN UINTN EndBit\r
  )\r
 {\r
+ if (Address >= mSmmPciExpressLibPciExpressBaseSize) {\r
+   return (UINT32) -1;\r
+ }\r
  return MmioBitFieldRead32 (\r
  GetPciExpressAddress (Address),\r
  StartBit,\r
@@ -1058,7 +1174,8 @@ PciExpressBitFieldRead32 (
  Range 0..31.\r
  @param Value The new value of the bit field.\r
 \r
- @return The value written back to the PCI configuration register.\r
+ @retval 0xFFFFFFFF Invalid PCI address.\r
+ @retval other      The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT32\r
@@ -1070,6 +1187,9 @@ PciExpressBitFieldWrite32 (
  IN UINT32 Value\r
  )\r
 {\r
+ if (Address >= mSmmPciExpressLibPciExpressBaseSize) {\r
+   return (UINT32) -1;\r
+ }\r
  return MmioBitFieldWrite32 (\r
  GetPciExpressAddress (Address),\r
  StartBit,\r
@@ -1103,7 +1223,8 @@ PciExpressBitFieldWrite32 (
  Range 0..31.\r
  @param OrData The value to OR with the PCI configuration register.\r
 \r
- @return The value written back to the PCI configuration register.\r
+ @retval 0xFFFFFFFF Invalid PCI address.\r
+ @retval other      The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT32\r
@@ -1115,6 +1236,9 @@ PciExpressBitFieldOr32 (
  IN UINT32 OrData\r
  )\r
 {\r
+ if (Address >= mSmmPciExpressLibPciExpressBaseSize) {\r
+   return (UINT32) -1;\r
+ }\r
  return MmioBitFieldOr32 (\r
  GetPciExpressAddress (Address),\r
  StartBit,\r
@@ -1148,7 +1272,8 @@ PciExpressBitFieldOr32 (
  Range 0..31.\r
  @param AndData The value to AND with the PCI configuration register.\r
 \r
- @return The value written back to the PCI configuration register.\r
+ @retval 0xFFFFFFFF Invalid PCI address.\r
+ @retval other      The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT32\r
@@ -1160,6 +1285,9 @@ PciExpressBitFieldAnd32 (
  IN UINT32 AndData\r
  )\r
 {\r
+ if (Address >= mSmmPciExpressLibPciExpressBaseSize) {\r
+   return (UINT32) -1;\r
+ }\r
  return MmioBitFieldAnd32 (\r
  GetPciExpressAddress (Address),\r
  StartBit,\r
@@ -1197,7 +1325,8 @@ PciExpressBitFieldAnd32 (
  @param AndData The value to AND with the PCI configuration register.\r
  @param OrData The value to OR with the result of the AND operation.\r
 \r
- @return The value written back to the PCI configuration register.\r
+ @retval 0xFFFFFFFF Invalid PCI address.\r
+ @retval other      The value written back to the PCI configuration register.\r
 \r
 **/\r
 UINT32\r
@@ -1210,6 +1339,9 @@ PciExpressBitFieldAndThenOr32 (
  IN UINT32 OrData\r
  )\r
 {\r
+ if (Address >= mSmmPciExpressLibPciExpressBaseSize) {\r
+   return (UINT32) -1;\r
+ }\r
  return MmioBitFieldAndThenOr32 (\r
  GetPciExpressAddress (Address),\r
  StartBit,\r
@@ -1239,7 +1371,8 @@ PciExpressBitFieldAndThenOr32 (
  @param Size The size in bytes of the transfer.\r
  @param Buffer The pointer to a buffer receiving the data read.\r
 \r
- @return Size read data from StartAddress.\r
+ @retval (UINTN)-1 Invalid PCI address.\r
+ @retval other     Size read data from StartAddress.\r
 \r
 **/\r
 UINTN\r
@@ -1258,6 +1391,13 @@ PciExpressReadBuffer (
  ASSERT_INVALID_PCI_ADDRESS (StartAddress);\r
  ASSERT (((StartAddress & 0xFFF) + Size) <= 0x1000);\r
 \r
+ //\r
+ // Make sure the Address is in MMCONF address space\r
+ //\r
+ if (StartAddress >= mSmmPciExpressLibPciExpressBaseSize) {\r
+   return (UINTN) -1;\r
+ }\r
+\r
  if (Size == 0) {\r
  return Size;\r
  }\r
@@ -1342,7 +1482,8 @@ PciExpressReadBuffer (
  @param Size The size in bytes of the transfer.\r
  @param Buffer The pointer to a buffer containing the data to write.\r
 \r
- @return Size written to StartAddress.\r
+ @retval (UINTN)-1 Invalid PCI address.\r
+ @retval other     Size written to StartAddress.\r
 \r
 **/\r
 UINTN\r
@@ -1361,6 +1502,13 @@ PciExpressWriteBuffer (
  ASSERT_INVALID_PCI_ADDRESS (StartAddress);\r
  ASSERT (((StartAddress & 0xFFF) + Size) <= 0x1000);\r
 \r
+ //\r
+ // Make sure the Address is in MMCONF address space\r
+ //\r
+ if (StartAddress >= mSmmPciExpressLibPciExpressBaseSize) {\r
+   return (UINTN) -1;\r
+ }\r
+\r
 \r
  if (Size == 0) {\r
  return 0;\r

diff --git a/MdePkg/Library/SmmPciExpressLib/SmmPciExpressLib.inf b/MdePkg/Library/SmmPciExpressLib/SmmPciExpressLib.inf
index 729f6a3083ba91df68cb0c587243be36b03d08f6..78cab6352faccb944faab8436b8eed3b19784f4a 100644 (file)
--- a/MdePkg/Library/SmmPciExpressLib/SmmPciExpressLib.inf
+++ b/MdePkg/Library/SmmPciExpressLib/SmmPciExpressLib.inf
@@ -35,3 +35,4 @@
 \r
 [Pcd]\r
  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress ## CONSUMES\r
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseSize  ## CONSUMES\r

diff --git a/MdePkg/MdePkg.dec b/MdePkg/MdePkg.dec
index 73f6c2407357bde735124e4c0ac26e28c9491452..812be75fb3b28667e3bdf86209918ddafe52f8dc 100644 (file)
--- a/MdePkg/MdePkg.dec
+++ b/MdePkg/MdePkg.dec
@@ -2274,6 +2274,10 @@
   # @Prompt PCI Express Base Address.\r
   gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000|UINT64|0x0000000a\r
 \r
+  ## This value is used to set the size of PCI express hierarchy. The default is 256 MB.\r
+  # @Prompt PCI Express Base Size.\r
+  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseSize|0x10000000|UINT64|0x0000000f\r
+\r
   ## Default current ISO 639-2 language: English & French.\r
   # @Prompt Default Value of LangCodes Variable.\r
   gEfiMdePkgTokenSpaceGuid.PcdUefiVariableDefaultLangCodes|"engfraengfra"|VOID*|0x0000001c\r