IntelFsp2Pkg: X64 compatible changes to support PEI in 64bit

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3893
1.Added EFIAPI to FspNotifyPhasePeimEntryPoint, SwapStack and
  PEI_CORE_ENTRY.
2.Treat both MAX_ADDRESS and MAX_UINT32 as invalid address for
  FSP global data in FspApiCallingCheck().
3.Changed AsmReadEsp to AsmReadStackPointer.
4.Changed the type of the return value of AsmReadStackPointer
  from UINT32 to UINTN.
5.Changed the type of TemporaryMemoryBase, PermenentMemoryBase
  and BootLoaderStack from UINT32 to UINTN.
6.Some type casting to pointers are UINT32. Changed them to
  UINTN to accommodate both IA32 and X64.
7.Corrected some typos.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
Signed-off-by: Ted Kuo <ted.kuo@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>

diff --git a/IntelFsp2Pkg/FspNotifyPhase/FspNotifyPhasePeim.c b/IntelFsp2Pkg/FspNotifyPhase/FspNotifyPhasePeim.c
index 88f5540fefa901868e9324914b5cb34438fa01ac..c3ba9f168c3f24281ec2c8c8bd1cf831e0e94a5e 100644 (file)
--- a/IntelFsp2Pkg/FspNotifyPhase/FspNotifyPhasePeim.c
+++ b/IntelFsp2Pkg/FspNotifyPhase/FspNotifyPhasePeim.c
@@ -1,7 +1,7 @@
 /** @file\r
   Source file for FSP notify phase PEI module\r
 \r
-  Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.\r
+  Copyright (c) 2016 - 2022, Intel Corporation. All rights reserved.<BR>\r
   SPDX-License-Identifier: BSD-2-Clause-Patent\r
 **/\r
 \r
@@ -112,6 +112,7 @@ WaitForNotify (
   @retval     EFI_OUT_OF_RESOURCES Insufficient resources to create database\r
 **/\r
 EFI_STATUS\r
+EFIAPI\r
 FspNotifyPhasePeimEntryPoint (\r
   IN       EFI_PEI_FILE_HANDLE  FileHandle,\r
   IN CONST EFI_PEI_SERVICES     **PeiServices\r

diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/ReadEsp.nasm b/IntelFsp2Pkg/FspSecCore/Ia32/ReadEsp.nasm
index 8046b437451c6dc3180cafe6c859d8b8374bfb65..d6bbf9cc7573de209a084628567047288a16ab1a 100644 (file)
--- a/IntelFsp2Pkg/FspSecCore/Ia32/ReadEsp.nasm
+++ b/IntelFsp2Pkg/FspSecCore/Ia32/ReadEsp.nasm
@@ -1,7 +1,7 @@
 ;; @file\r
 ;  Provide read ESP function\r
 ;\r
-; Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>\r
+; Copyright (c) 2019 - 2022, Intel Corporation. All rights reserved.<BR>\r
 ; SPDX-License-Identifier: BSD-2-Clause-Patent\r
 ;;\r
 ;------------------------------------------------------------------------------\r
@@ -9,14 +9,14 @@
     SECTION .text\r
 \r
 ;------------------------------------------------------------------------------\r
-; UINT32\r
+; UINTN\r
 ; EFIAPI\r
-; AsmReadEsp (\r
+; AsmReadStackPointer (\r
 ;   VOID\r
 ;   );\r
 ;------------------------------------------------------------------------------\r
-global ASM_PFX(AsmReadEsp)\r
-ASM_PFX(AsmReadEsp):\r
+global ASM_PFX(AsmReadStackPointer)\r
+ASM_PFX(AsmReadStackPointer):\r
     mov     eax, esp\r
     ret\r
 \r

diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/Stack.nasm b/IntelFsp2Pkg/FspSecCore/Ia32/Stack.nasm
index 5a7e27c240cdb05f330af2614570393f01f2264b..5cb2424bc8dd0f69dcc642612dac797bdd372e4f 100644 (file)
--- a/IntelFsp2Pkg/FspSecCore/Ia32/Stack.nasm
+++ b/IntelFsp2Pkg/FspSecCore/Ia32/Stack.nasm
@@ -1,6 +1,6 @@
 ;------------------------------------------------------------------------------\r
 ;\r
-; Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.<BR>\r
+; Copyright (c) 2015 - 2022, Intel Corporation. All rights reserved.<BR>\r
 ; SPDX-License-Identifier: BSD-2-Clause-Patent\r
 ;\r
 ; Abstract:\r
@@ -9,20 +9,20 @@
 ;\r
 ;------------------------------------------------------------------------------\r
 \r
-SECTION .text\r
+    SECTION .text\r
 \r
 ;------------------------------------------------------------------------------\r
 ; VOID\r
 ; EFIAPI\r
 ; SecSwitchStack (\r
 ;   UINT32   TemporaryMemoryBase,\r
-;   UINT32   PermenentMemoryBase\r
+;   UINT32   PermanentMemoryBase\r
 ;   );\r
 ;------------------------------------------------------------------------------\r
 global ASM_PFX(SecSwitchStack)\r
 ASM_PFX(SecSwitchStack):\r
     ;\r
-    ; Save three register: eax, ebx, ecx\r
+    ; Save four register: eax, ebx, ecx, edx\r
     ;\r
     push  eax\r
     push  ebx\r
@@ -55,7 +55,7 @@ ASM_PFX(SecSwitchStack):
     mov   dword [eax + 12], edx\r
     mov   edx, dword [esp + 16]    ; Update this function's return address into permanent memory\r
     mov   dword [eax + 16], edx\r
-    mov   esp, eax                     ; From now, esp is pointed to permanent memory\r
+    mov   esp, eax                 ; From now, esp is pointed to permanent memory\r
 \r
     ;\r
     ; Fixup the ebp point to permanent memory\r
@@ -63,7 +63,7 @@ ASM_PFX(SecSwitchStack):
     mov   eax, ebp\r
     sub   eax, ebx\r
     add   eax, ecx\r
-    mov   ebp, eax                ; From now, ebp is pointed to permanent memory\r
+    mov   ebp, eax                 ; From now, ebp is pointed to permanent memory\r
 \r
     pop   edx\r
     pop   ecx\r

diff --git a/IntelFsp2Pkg/FspSecCore/SecFsp.c b/IntelFsp2Pkg/FspSecCore/SecFsp.c
index 68e588dd414a2dc77b83fce17ae29a30110ac7e5..04b43c10d094ee1a0d8152b7e82f014cc7e50aae 100644 (file)
--- a/IntelFsp2Pkg/FspSecCore/SecFsp.c
+++ b/IntelFsp2Pkg/FspSecCore/SecFsp.c
@@ -1,6 +1,6 @@
 /** @file\r
 \r
-  Copyright (c) 2014 - 2021, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>\r
   SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r
@@ -26,7 +26,7 @@ FspGetExceptionHandler (
   IA32_IDT_GATE_DESCRIPTOR  *IdtGateDescriptor;\r
   FSP_INFO_HEADER           *FspInfoHeader;\r
 \r
-  FspInfoHeader                      = (FSP_INFO_HEADER *)AsmGetFspInfoHeader ();\r
+  FspInfoHeader                      = (FSP_INFO_HEADER *)(UINTN)AsmGetFspInfoHeader ();\r
   ExceptionHandler                   = IdtEntryTemplate;\r
   IdtGateDescriptor                  = (IA32_IDT_GATE_DESCRIPTOR *)&ExceptionHandler;\r
   Entry                              = (IdtGateDescriptor->Bits.OffsetHigh << 16) | IdtGateDescriptor->Bits.OffsetLow;\r
@@ -115,7 +115,7 @@ SecGetPlatformData (
 VOID\r
 FspGlobalDataInit (\r
   IN OUT  FSP_GLOBAL_DATA  *PeiFspData,\r
-  IN UINT32                BootLoaderStack,\r
+  IN UINTN                 BootLoaderStack,\r
   IN UINT8                 ApiIdx\r
   )\r
 {\r
@@ -141,7 +141,7 @@ FspGlobalDataInit (
   // Get FSP Header offset\r
   // It may have multiple FVs, so look into the last one for FSP header\r
   //\r
-  PeiFspData->FspInfoHeader = (FSP_INFO_HEADER *)AsmGetFspInfoHeader ();\r
+  PeiFspData->FspInfoHeader = (FSP_INFO_HEADER *)(UINTN)AsmGetFspInfoHeader ();\r
   SecGetPlatformData (PeiFspData);\r
 \r
   //\r
@@ -154,7 +154,7 @@ FspGlobalDataInit (
   //\r
   FspmUpdDataPtr = (VOID *)GetFspApiParameter ();\r
   if (FspmUpdDataPtr == NULL) {\r
-    FspmUpdDataPtr = (VOID *)(PeiFspData->FspInfoHeader->ImageBase + PeiFspData->FspInfoHeader->CfgRegionOffset);\r
+    FspmUpdDataPtr = (VOID *)(UINTN)(PeiFspData->FspInfoHeader->ImageBase + PeiFspData->FspInfoHeader->CfgRegionOffset);\r
   }\r
 \r
   SetFspUpdDataPointer (FspmUpdDataPtr);\r

diff --git a/IntelFsp2Pkg/FspSecCore/SecFsp.h b/IntelFsp2Pkg/FspSecCore/SecFsp.h
index 7c9be85fe06e16c1230837a32be7f703934d621e..41931a33dd31e45f944ce956d364f9cb55187548 100644 (file)
--- a/IntelFsp2Pkg/FspSecCore/SecFsp.h
+++ b/IntelFsp2Pkg/FspSecCore/SecFsp.h
@@ -1,6 +1,6 @@
 /** @file\r
 \r
-  Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>\r
   SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r
@@ -48,7 +48,7 @@ FspGetExceptionHandler (
 VOID\r
 FspGlobalDataInit (\r
   IN OUT  FSP_GLOBAL_DATA  *PeiFspData,\r
-  IN UINT32                BootLoaderStack,\r
+  IN UINTN                 BootLoaderStack,\r
   IN UINT8                 ApiIdx\r
   );\r
 \r

diff --git a/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c b/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
index 7d6ef11fe783f40119273403fcdde0c581f8b8c6..e22a88cc84d7e17dc0a3c16ccdcf3a784c3d80c7 100644 (file)
--- a/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
+++ b/IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
@@ -1,6 +1,6 @@
 /** @file\r
 \r
-  Copyright (c) 2016 - 2020, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2016 - 2022, Intel Corporation. All rights reserved.<BR>\r
   SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r
@@ -31,7 +31,7 @@ FspApiCallingCheck (
     //\r
     // NotifyPhase check\r
     //\r
-    if ((FspData == NULL) || ((UINT32)FspData == 0xFFFFFFFF)) {\r
+    if ((FspData == NULL) || ((UINTN)FspData == MAX_ADDRESS) || ((UINTN)FspData == MAX_UINT32)) {\r
       Status = EFI_UNSUPPORTED;\r
     } else {\r
       if (FspData->Signature != FSP_GLOBAL_DATA_SIGNATURE) {\r
@@ -42,7 +42,7 @@ FspApiCallingCheck (
     //\r
     // FspMemoryInit check\r
     //\r
-    if ((UINT32)FspData != 0xFFFFFFFF) {\r
+    if (((UINTN)FspData != MAX_ADDRESS) && ((UINTN)FspData != MAX_UINT32)) {\r
       Status = EFI_UNSUPPORTED;\r
     } else if (EFI_ERROR (FspUpdSignatureCheck (ApiIdx, ApiParam))) {\r
       Status = EFI_INVALID_PARAMETER;\r
@@ -51,7 +51,7 @@ FspApiCallingCheck (
     //\r
     // TempRamExit check\r
     //\r
-    if ((FspData == NULL) || ((UINT32)FspData == 0xFFFFFFFF)) {\r
+    if ((FspData == NULL) || ((UINTN)FspData == MAX_ADDRESS) || ((UINTN)FspData == MAX_UINT32)) {\r
       Status = EFI_UNSUPPORTED;\r
     } else {\r
       if (FspData->Signature != FSP_GLOBAL_DATA_SIGNATURE) {\r
@@ -62,7 +62,7 @@ FspApiCallingCheck (
     //\r
     // FspSiliconInit check\r
     //\r
-    if ((FspData == NULL) || ((UINT32)FspData == 0xFFFFFFFF)) {\r
+    if ((FspData == NULL) || ((UINTN)FspData == MAX_ADDRESS) || ((UINTN)FspData == MAX_UINT32)) {\r
       Status = EFI_UNSUPPORTED;\r
     } else {\r
       if (FspData->Signature != FSP_GLOBAL_DATA_SIGNATURE) {\r

diff --git a/IntelFsp2Pkg/FspSecCore/SecMain.c b/IntelFsp2Pkg/FspSecCore/SecMain.c
index d376fb8361d58719cc15d1e1f806f2af5bf4f6a3..8effe2225c145596b184b4021d051ffdd60afade 100644 (file)
--- a/IntelFsp2Pkg/FspSecCore/SecMain.c
+++ b/IntelFsp2Pkg/FspSecCore/SecMain.c
@@ -1,6 +1,6 @@
 /** @file\r
 \r
-  Copyright (c) 2014 - 2021, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>\r
   SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r
@@ -54,7 +54,7 @@ SecStartup (
   IN UINT32          TempRamBase,\r
   IN VOID            *BootFirmwareVolume,\r
   IN PEI_CORE_ENTRY  PeiCore,\r
-  IN UINT32          BootLoaderStack,\r
+  IN UINTN           BootLoaderStack,\r
   IN UINT32          ApiIdx\r
   )\r
 {\r
@@ -233,7 +233,7 @@ SecTemporaryRamSupport (
   GetFspGlobalDataPointer ()->OnSeparateStack = 1;\r
 \r
   if (PcdGet8 (PcdFspHeapSizePercentage) == 0) {\r
-    CurrentStack = AsmReadEsp ();\r
+    CurrentStack = AsmReadStackPointer ();\r
     FspStackBase = (UINTN)GetFspEntryStack ();\r
 \r
     StackSize = FspStackBase - CurrentStack;\r
@@ -292,8 +292,8 @@ SecTemporaryRamSupport (
   // permanent memory.\r
   //\r
   SecSwitchStack (\r
-    (UINT32)(UINTN)OldStack,\r
-    (UINT32)(UINTN)NewStack\r
+    (UINTN)OldStack,\r
+    (UINTN)NewStack\r
     );\r
 \r
   return EFI_SUCCESS;\r

diff --git a/IntelFsp2Pkg/FspSecCore/SecMain.h b/IntelFsp2Pkg/FspSecCore/SecMain.h
index 7794255af13d4f916621e6a50fbfba8acab23db4..3dddbbee5ef89fb54aa7251108fb8e4fc6232835 100644 (file)
--- a/IntelFsp2Pkg/FspSecCore/SecMain.h
+++ b/IntelFsp2Pkg/FspSecCore/SecMain.h
@@ -1,6 +1,6 @@
 /** @file\r
 \r
-  Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>\r
   SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r
@@ -23,9 +23,11 @@
 #include <Library/UefiCpuLib.h>\r
 #include <FspEas.h>\r
 \r
-typedef VOID (*PEI_CORE_ENTRY) ( \\r
-  IN CONST  EFI_SEC_PEI_HAND_OFF    *SecCoreData, \\r
-  IN CONST  EFI_PEI_PPI_DESCRIPTOR  *PpiList \\r
+typedef\r
+VOID\r
+(EFIAPI *PEI_CORE_ENTRY) (\r
+  IN CONST  EFI_SEC_PEI_HAND_OFF    *SecCoreData,\r
+  IN CONST  EFI_PEI_PPI_DESCRIPTOR  *PpiList\r
   );\r
 \r
 typedef struct _SEC_IDT_TABLE {\r
@@ -51,8 +53,8 @@ typedef struct _SEC_IDT_TABLE {
 VOID\r
 EFIAPI\r
 SecSwitchStack (\r
-  IN UINT32  TemporaryMemoryBase,\r
-  IN UINT32  PermenentMemoryBase\r
+  IN UINTN  TemporaryMemoryBase,\r
+  IN UINTN  PermenentMemoryBase\r
   );\r
 \r
 /**\r
@@ -104,7 +106,7 @@ SecStartup (
   IN UINT32          TempRamBase,\r
   IN VOID            *BootFirmwareVolume,\r
   IN PEI_CORE_ENTRY  PeiCore,\r
-  IN UINT32          BootLoaderStack,\r
+  IN UINTN           BootLoaderStack,\r
   IN UINT32          ApiIdx\r
   );\r
 \r
@@ -127,9 +129,9 @@ ProcessLibraryConstructorList (
   @return  value of esp.\r
 \r
 **/\r
-UINT32\r
+UINTN\r
 EFIAPI\r
-AsmReadEsp (\r
+AsmReadStackPointer (\r
   VOID\r
   );\r
 \r

diff --git a/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c b/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c
index dae4e27172382ecf80f524b3e1d646e167fd4def..69a021f42b392e06ca6fa06a677a47590f96c417 100644 (file)
--- a/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c
+++ b/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c
@@ -1,6 +1,6 @@
 /** @file\r
 \r
-  Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>\r
   SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r
@@ -21,6 +21,7 @@
 \r
 **/\r
 UINTN\r
+EFIAPI\r
 SwapStack (\r
   IN  UINTN  NewStack\r
   )\r

diff --git a/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/Ia32/Flat32.nasm b/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/Ia32/Flat32.nasm
index aef7f96d1d3a07215318bdbf5a9e8738348b022a..95d015d928417e12488bd10443ab650424f84b29 100644 (file)
--- a/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/Ia32/Flat32.nasm
+++ b/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/Ia32/Flat32.nasm
@@ -2,7 +2,7 @@
 ;  This is the code that goes from real-mode to protected mode.\r
 ;  It consumes the reset vector, configures the stack.\r
 ;\r
-; Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.<BR>\r
+; Copyright (c) 2015 - 2022, Intel Corporation. All rights reserved.<BR>\r
 ; SPDX-License-Identifier: BSD-2-Clause-Patent\r
 ;;\r
 \r
@@ -16,7 +16,7 @@ SECTION .text
 \r
 %macro RET_ESI  0\r
 \r
-  movd    esi, mm7                      ; restore ESP from MM7\r
+  movd    esi, mm7                      ; restore EIP from MM7\r
   jmp     esi\r
 \r
 %endmacro\r