# Controller found. This driver is designed to manage a PCI-to-ISA bridge Device\r
# such as an LPC bridge.\r
#\r
-# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
ENTRY_POINT = InitializeIsaBus\r
\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
# DRIVER_BINDING = gIsaBusControllerDriver\r
# COMPONENT_NAME = gIsaBusComponentName;\r
# COMPONENT_NAME2 = gIsaBusComponentName2;\r
# driver provides support for two drives per controller, DMA channel 2, diskette\r
# change line and write protect. Currently only 1.44MB drives are supported.\r
#\r
-# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
ENTRY_POINT = InitializeIsaFloppy\r
\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
# DRIVER_BINDING = gFdcControllerDriver;\r
# COMPONENT_NAME = gIsaFloppyComponentName;\r
# COMPONENT_NAME2 = gIsaFloppyComponentName2;\r
# the PEIM will install the BlockIo PPI. This module is only dispatched if it\r
# is in the Recovery Boot mode.\r
#\r
-# Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC (EBC is for build only)\r
+# VALID_ARCHITECTURES = IA32 X64 EBC (EBC is for build only)\r
#\r
\r
[Sources]\r
# I/O protocols are installed based off of the information provided by each\r
# instance of the SIO Protocol found.\r
#\r
-# Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
ENTRY_POINT = InitializeIsaIo\r
\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
# DRIVER_BINDING = gIsaIoDriver\r
# COMPONENT_NAME = gIsaIoComponentName;\r
# COMPONENT_NAME2 = gIsaIoComponentName2;\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
# DRIVER_BINDING = gSerialControllerDriver\r
# COMPONENT_NAME = gIsaSerialComponentName\r
ENTRY_POINT = InitializePs2Keyboard\r
\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
# DRIVER_BINDING = gKeyboardControllerDriver;\r
# COMPONENT_NAME = gPs2KeyboardComponentName;\r
# COMPONENT_NAME2 = gPs2KeyboardComponentName2;\r
# This driver simulates a touch pad absolute pointing device using a standard\r
# PS2 mouse as the input hardware.\r
#\r
-# Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
ENTRY_POINT = InitializePs2MouseAbsolutePointer\r
\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
# DRIVER_BINDING = gPS2MouseAbsolutePointerDriver;\r
# COMPONENT_NAME = gPs2MouseAbsolutePointerComponentName;\r
# COMPONENT_NAME2 = gPs2MouseAbsolutePointerComponentName2;\r
#\r
# This dirver provides support for PS2 based mice.\r
#\r
-# Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
ENTRY_POINT = InitializePs2Mouse\r
\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
# DRIVER_BINDING = gPS2MouseDriver;\r
# COMPONENT_NAME = gPs2MouseComponentName;\r
# COMPONENT_NAME2 = gPs2MouseComponentName2;\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
# DRIVER_BINDING = gIDEBusDriverBinding\r
# COMPONENT_NAME = gIDEBusComponentName\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
# DRIVER_BINDING = gPciVgaMiniPortDriverBinding;\r
# COMPONENT_NAME = gPciVgaMiniPortComponentName;\r
# COMPONENT_NAME2 = gPciVgaMiniPortComponentName2;\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
# DRIVER_BINDING = gBiosKeyboardDriverBinding\r
# COMPONENT_NAME = gBiosKeyboardComponentName\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
# DRIVER_BINDING = gBiosSnp16DriverBinding\r
# COMPONENT_NAME = gBiosSnp16ComponentName\r
# This driver by using Legacy Bios protocol service to support csm Video\r
# and produce Graphics Output Protocol.\r
#\r
-# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
# DRIVER_BINDING = gBiosVideoDriverBinding\r
# COMPONENT_NAME = gBiosVideoComponentName\r
+++ /dev/null
-/** @file\r
-\r
-Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
-\r
-This program and the accompanying materials\r
-are licensed and made available under the terms and conditions\r
-of the BSD License which accompanies this distribution. The\r
-full text of the license may be found at\r
-http://opensource.org/licenses/bsd-license.php\r
-\r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-#include "LegacyBiosInterface.h"\r
-\r
-/**\r
- Assign drive number to legacy HDD drives prior to booting an EFI\r
- aware OS so the OS can access drives without an EFI driver.\r
- Note: BBS compliant drives ARE NOT available until this call by\r
- either shell or EFI.\r
-\r
- @param This Protocol instance pointer.\r
- @param BbsCount Number of BBS_TABLE structures\r
- @param BbsTable List BBS entries\r
-\r
- @retval EFI_SUCCESS Drive numbers assigned\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-LegacyBiosPrepareToBootEfi (\r
- IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
- OUT UINT16 *BbsCount,\r
- OUT BBS_TABLE **BbsTable\r
- )\r
-{\r
- //\r
- // Shadow All Opion ROM\r
- //\r
- LegacyBiosShadowAllLegacyOproms (This);\r
- return EFI_SUCCESS;\r
-}\r
-\r
-\r
-/**\r
- To boot from an unconventional device like parties and/or execute\r
- HDD diagnostics.\r
-\r
- @param This Protocol instance pointer.\r
- @param Attributes How to interpret the other input parameters\r
- @param BbsEntry The 0-based index into the BbsTable for the\r
- parent device.\r
- @param BeerData Pointer to the 128 bytes of ram BEER data.\r
- @param ServiceAreaData Pointer to the 64 bytes of raw Service Area data.\r
- The caller must provide a pointer to the specific\r
- Service Area and not the start all Service Areas.\r
- EFI_INVALID_PARAMETER if error. Does NOT return if no error.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-LegacyBiosBootUnconventionalDevice (\r
- IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
- IN UDC_ATTRIBUTES Attributes,\r
- IN UINTN BbsEntry,\r
- IN VOID *BeerData,\r
- IN VOID *ServiceAreaData\r
- )\r
-{\r
- return EFI_INVALID_PARAMETER;\r
-}\r
-\r
-\r
-/**\r
- Attempt to legacy boot the BootOption. If the EFI contexted has been\r
- compromised this function will not return.\r
-\r
- @param This Protocol instance pointer.\r
- @param BbsDevicePath EFI Device Path from BootXXXX variable.\r
- @param LoadOptionsSize Size of LoadOption in size.\r
- @param LoadOptions LoadOption from BootXXXX variable\r
-\r
- @retval EFI_SUCCESS Removable media not present\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-LegacyBiosLegacyBoot (\r
- IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
- IN BBS_BBS_DEVICE_PATH *BbsDevicePath,\r
- IN UINT32 LoadOptionsSize,\r
- IN VOID *LoadOptions\r
- )\r
-{\r
- return EFI_UNSUPPORTED;\r
-}\r
-\r
-/**\r
- Build the E820 table.\r
-\r
- @param Private Legacy BIOS Instance data\r
- @param Size Size of E820 Table\r
-\r
- @retval EFI_SUCCESS It should always work.\r
-\r
-**/\r
-EFI_STATUS\r
-LegacyBiosBuildE820 (\r
- IN LEGACY_BIOS_INSTANCE *Private,\r
- OUT UINTN *Size\r
- )\r
-{\r
- *Size = 0;\r
- return EFI_SUCCESS;\r
-}\r
-\r
-/**\r
- Get all BBS info\r
-\r
- @param This Protocol instance pointer.\r
- @param HddCount Number of HDD_INFO structures\r
- @param HddInfo Onboard IDE controller information\r
- @param BbsCount Number of BBS_TABLE structures\r
- @param BbsTable List BBS entries\r
-\r
- @retval EFI_SUCCESS Tables returned\r
- @retval EFI_NOT_FOUND resource not found\r
- @retval EFI_DEVICE_ERROR can not get BBS table\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-LegacyBiosGetBbsInfo (\r
- IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
- OUT UINT16 *HddCount,\r
- OUT HDD_INFO **HddInfo,\r
- OUT UINT16 *BbsCount,\r
- OUT BBS_TABLE **BbsTable\r
- )\r
-{\r
- return EFI_UNSUPPORTED;\r
-}\r
-\r
-/**\r
- Fill in the standard BDA for Keyboard LEDs\r
-\r
- @param This Protocol instance pointer.\r
- @param Leds Current LED status\r
-\r
- @retval EFI_SUCCESS It should always work.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-LegacyBiosUpdateKeyboardLedStatus (\r
- IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
- IN UINT8 Leds\r
- )\r
-{\r
- return EFI_UNSUPPORTED;\r
-}\r
-\r
-/**\r
- Relocate this image under 4G memory for IPF.\r
-\r
- @param ImageHandle Handle of driver image.\r
- @param SystemTable Pointer to system table.\r
-\r
- @retval EFI_SUCCESS Image successfully relocated.\r
- @retval EFI_ABORTED Failed to relocate image.\r
-\r
-**/\r
-EFI_STATUS\r
-RelocateImageUnder4GIfNeeded (\r
- IN EFI_HANDLE ImageHandle,\r
- IN EFI_SYSTEM_TABLE *SystemTable\r
- )\r
-{\r
- EFI_STATUS Status;\r
- EFI_LOADED_IMAGE_PROTOCOL *LoadedImage;\r
- UINTN NumberOfPages;\r
- EFI_PHYSICAL_ADDRESS LoadedImageBase;\r
- PE_COFF_LOADER_IMAGE_CONTEXT ImageContext;\r
- EFI_PHYSICAL_ADDRESS MemoryAddress;\r
- EFI_HANDLE NewImageHandle;\r
-\r
- Status = gBS->HandleProtocol (\r
- ImageHandle,\r
- &gEfiLoadedImageProtocolGuid,\r
- (VOID *) &LoadedImage\r
- );\r
-\r
- if (!EFI_ERROR (Status)) {\r
- LoadedImageBase = (EFI_PHYSICAL_ADDRESS) (UINTN) LoadedImage->ImageBase;\r
- if (LoadedImageBase > 0xffffffff) {\r
- NumberOfPages = (UINTN) (DivU64x32(LoadedImage->ImageSize, EFI_PAGE_SIZE) + 1);\r
-\r
- //\r
- // Allocate buffer below 4GB here\r
- //\r
- Status = AllocateLegacyMemory (\r
- AllocateMaxAddress,\r
- 0x7FFFFFFF,\r
- NumberOfPages, // do we have to convert this to pages??\r
- &MemoryAddress\r
- );\r
- if (EFI_ERROR (Status)) {\r
- return Status;\r
- }\r
-\r
- ZeroMem (&ImageContext, sizeof (PE_COFF_LOADER_IMAGE_CONTEXT));\r
- ImageContext.Handle = (VOID *)(UINTN)LoadedImageBase;\r
- ImageContext.ImageRead = PeCoffLoaderImageReadFromMemory;\r
-\r
- //\r
- // Get information about the image being loaded\r
- //\r
- Status = PeCoffLoaderGetImageInfo (&ImageContext);\r
- if (EFI_ERROR (Status)) {\r
- return Status;\r
- }\r
- ImageContext.ImageAddress = (PHYSICAL_ADDRESS)MemoryAddress;\r
- //\r
- // Align buffer on section boundary\r
- //\r
- ImageContext.ImageAddress += ImageContext.SectionAlignment - 1;\r
- ImageContext.ImageAddress &= ~((PHYSICAL_ADDRESS)ImageContext.SectionAlignment - 1);\r
-\r
- //\r
- // Load the image to our new buffer\r
- //\r
- Status = PeCoffLoaderLoadImage (&ImageContext);\r
- if (EFI_ERROR (Status)) {\r
- gBS->FreePages (MemoryAddress, NumberOfPages);\r
- return Status;\r
- }\r
-\r
- //\r
- // Relocate the image in our new buffer\r
- //\r
- Status = PeCoffLoaderRelocateImage (&ImageContext);\r
- if (EFI_ERROR (Status)) {\r
- gBS->FreePages (MemoryAddress, NumberOfPages);\r
- return Status;\r
- }\r
-\r
- //\r
- // Create a new handle with gEfiCallerIdGuid to be used as the ImageHandle fore the reloaded image\r
- //\r
- NewImageHandle = NULL;\r
- Status = gBS->InstallProtocolInterface (\r
- &NewImageHandle,\r
- &gEfiCallerIdGuid,\r
- EFI_NATIVE_INTERFACE,\r
- NULL\r
- );\r
-\r
- //\r
- // Flush the instruction cache so the image data is written before we execute it\r
- //\r
- InvalidateInstructionCacheRange ((VOID *)(UINTN)ImageContext.ImageAddress, (UINTN)ImageContext.ImageSize);\r
-\r
- Status = ((EFI_IMAGE_ENTRY_POINT)(UINTN)(ImageContext.EntryPoint)) (NewImageHandle, SystemTable);\r
- if (EFI_ERROR (Status)) {\r
- gBS->FreePages (MemoryAddress, NumberOfPages);\r
- return Status;\r
- }\r
- //\r
- // return error directly the BS will unload this image\r
- //\r
- return EFI_ABORTED;\r
- }\r
- }\r
- return EFI_SUCCESS;\r
-}\r
+++ /dev/null
-/** @file\r
-\r
-Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>\r
-\r
-This program and the accompanying materials\r
-are licensed and made available under the terms and conditions\r
-of the BSD License which accompanies this distribution. The\r
-full text of the license may be found at\r
-http://opensource.org/licenses/bsd-license.php\r
-\r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-#ifndef _IPF_THUNK_H_\r
-#define _IPF_THUNK_H_\r
-\r
-#include "LegacyBiosInterface.h"\r
-#include <IndustryStandard/Sal.h>\r
-\r
-/**\r
- Template of real mode code.\r
-\r
- @param CodeStart Start address of code.\r
- @param CodeEnd End address of code\r
- @param ReverseThunkStart Start of reverse thunk.\r
- @param IntThunk Low memory thunk.\r
-\r
-**/\r
-VOID\r
-RealModeTemplate (\r
- OUT UINTN *CodeStart,\r
- OUT UINTN *CodeEnd,\r
- OUT UINTN *ReverseThunkStart,\r
- LOW_MEMORY_THUNK *IntThunk\r
- );\r
-\r
-/**\r
- Register physical address of Esal Data Area\r
-\r
- @param ReverseThunkCodeAddress Reverse Thunk Address\r
- @param IntThunkAddress IntThunk Address\r
-\r
- @retval EFI_SUCCESS ESAL data area set successfully.\r
-\r
-**/\r
-EFI_STATUS\r
-EsalSetSalDataArea (\r
- IN UINTN ReverseThunkCodeAddress,\r
- IN UINTN IntThunkAddress\r
- );\r
-\r
-/**\r
- Get address of reverse thunk.\r
-\r
- @retval EFI_SAL_SUCCESS Address of reverse thunk returned successfully.\r
-\r
-**/\r
-SAL_RETURN_REGS\r
-EsalGetReverseThunkAddress (\r
- VOID\r
- );\r
-\r
-typedef struct {\r
- UINT32 Eax; // 0\r
- UINT32 Ecx; // 4\r
- UINT32 Edx; // 8\r
- UINT32 Ebx; // 12\r
- UINT32 Esp; // 16\r
- UINT32 Ebp; // 20\r
- UINT32 Esi; // 24\r
- UINT32 Edi; // 28\r
- UINT32 Eflag; // 32\r
- UINT32 Eip; // 36\r
- UINT16 Cs; // 40\r
- UINT16 Ds; // 42\r
- UINT16 Es; // 44\r
- UINT16 Fs; // 46\r
- UINT16 Gs; // 48\r
- UINT16 Ss; // 50\r
-} IPF_DWORD_REGS;\r
-\r
-/**\r
- Entrypoint of IA32 code.\r
-\r
- @param CallTypeData Data of call type\r
- @param DwordRegister Register set of IA32 general registers\r
- and segment registers\r
- @param StackPointer Stack pointer.\r
- @param StackSize Size of stack.\r
-\r
-**/\r
-VOID\r
-EfiIaEntryPoint (\r
- UINT64 CallTypeData,\r
- IPF_DWORD_REGS *DwordRegister,\r
- UINT64 StackPointer,\r
- UINT64 StackSize\r
- );\r
-\r
-#endif\r
+++ /dev/null
-//// @file\r
-//\r
-// Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>\r
-//\r
-// This program and the accompanying materials\r
-// are licensed and made available under the terms and conditions\r
-// of the BSD License which accompanies this distribution. The\r
-// full text of the license may be found at\r
-// http://opensource.org/licenses/bsd-license.php\r
-//\r
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-//\r
-////\r
-\r
-#define NUM_REAL_GDT_ENTRIES 3\r
-#define LOW_STACK_SIZE (8*1024) // 8k?\r
-\r
-//\r
-// Low memory Thunk Structure\r
-//\r
-#define Code 0\r
-#define LowReverseThunkStart Code + 4096\r
-#define GdtDesc LowReverseThunkStart + 4\r
-#define IdtDesc GdtDesc + 6\r
-#define FlatSs IdtDesc + 6\r
-#define FlatEsp FlatSs + 4\r
-#define LowCodeSelector FlatEsp + 4\r
-#define LowDataSelector LowCodeSelector + 4\r
-#define LowStack LowDataSelector + 4\r
-#define RealModeIdtDesc LowStack + 4\r
-#define RealModeGdt RealModeIdtDesc + 6\r
-#define RealModeGdtDesc RealModeGdt + (8 * NUM_REAL_GDT_ENTRIES)\r
-#define RevRealDs RealModeGdtDesc + 6\r
-#define RevRealSs RevRealDs + 2\r
-#define RevRealEsp RevRealSs + 2\r
-#define RevRealIdtDesc RevRealEsp + 4\r
-#define RevFlatDataSelector RevRealIdtDesc + 6\r
-#define RevFlatStack RevFlatDataSelector + 2\r
-#define Stack RevFlatStack + 4\r
-#define RevThunkStack Stack + LOW_STACK_SIZE\r
-\r
-#define EfiToLegacy16InitTable RevThunkStack + LOW_STACK_SIZE\r
-#define InitTableBiosLessThan1MB EfiToLegacy16InitTable\r
-#define InitTableHiPmmMemory InitTableBiosLessThan1MB + 4\r
-#define InitTablePmmMemorySizeInBytes InitTableHiPmmMemory + 4\r
-#define InitTableReverseThunkCallSegment InitTablePmmMemorySizeInBytes + 4\r
-#define InitTableReverseThunkCallOffset InitTableReverseThunkCallSegment + 2\r
-#define InitTableNumberE820Entries InitTableReverseThunkCallOffset + 2\r
-#define InitTableOsMemoryAbove1Mb InitTableNumberE820Entries + 4\r
-#define InitTableThunkStart InitTableOsMemoryAbove1Mb + 4\r
-#define InitTableThunkSizeInBytes InitTableThunkStart + 4\r
-#define InitTable16InitTableEnd InitTableThunkSizeInBytes + 4\r
-\r
-#define EfiToLegacy16BootTable InitTable16InitTableEnd\r
-#define BootTableBiosLessThan1MB EfiToLegacy16BootTable\r
-#define BootTableHiPmmMemory BootTableBiosLessThan1MB + 4\r
-#define BootTablePmmMemorySizeInBytes BootTableHiPmmMemory + 4\r
-#define BootTableReverseThunkCallSegment BootTablePmmMemorySizeInBytes + 4\r
-#define BootTableReverseThunkCallOffset BootTableReverseThunkCallSegment + 2\r
-#define BootTableNumberE820Entries BootTableReverseThunkCallOffset + 2\r
-#define BootTableOsMemoryAbove1Mb BootTableNumberE820Entries + 4\r
-#define BootTableThunkStart BootTableOsMemoryAbove1Mb + 4\r
-#define BootTableThunkSizeInBytes BootTableThunkStart + 4\r
-#define EfiToLegacy16BootTableEnd BootTableThunkSizeInBytes + 4\r
-\r
-#define InterruptRedirectionCode EfiToLegacy16BootTableEnd\r
-#define PciHandler InterruptRedirectionCode + 32\r
-\r
-\r
-//\r
-// Register Sets (16 Bit)\r
-//\r
-\r
-#define AX 0\r
-#define BX 2\r
-#define CX 4\r
-#define DX 6\r
-#define SI 8\r
-#define DI 10\r
-#define Flags 12\r
-#define ES 14\r
-#define CS 16\r
-#define SS 18\r
-#define DS 20\r
-#define BP 22\r
-\r
-\r
-\r
+++ /dev/null
-//// @file\r
-//\r
-// Copyright (c) 1999 - 2008, Intel Corporation. All rights reserved.<BR>\r
-//\r
-// This program and the accompanying materials\r
-// are licensed and made available under the terms and conditions\r
-// of the BSD License which accompanies this distribution. The\r
-// full text of the license may be found at\r
-// http://opensource.org/licenses/bsd-license.php\r
-//\r
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-//\r
-////\r
-\r
-.file "IpfThunk.s"\r
-\r
-#include "IpfMacro.i"\r
-#include "Ipf/IpfThunk.i"\r
-\r
-.align 0x10\r
-//-----------------------------------------------------------------------------\r
-//++\r
-// EfiIaEntryPoint\r
-//\r
-// Register physical address of Esal Data Area\r
-//\r
-// On Entry :\r
-// in1 = ptr to legacy bios reg\r
-// in2 = ptr to Call Stack\r
-// in3 = Call Stack Size\r
-//\r
-// Return Value:\r
-// r8 = SAL_SUCCESS\r
-//\r
-// As per static calling conventions.\r
-//\r
-//--\r
-//---------------------------------------------------------------------------\r
-PROCEDURE_ENTRY(EfiIaEntryPoint)\r
-\r
- alloc loc0 = 8,10,8,0;;\r
-\r
- mov out0 = r0;;\r
- mov out1 = r0;;\r
- mov out2 = r0;;\r
- mov out3 = r0;;\r
- mov out4 = r0;;\r
- mov out5 = r0;;\r
- mov out6 = r0;;\r
- mov out7 = r0;;\r
-\r
- mov loc1 = b0;; // save efi (b0)\r
- mov loc2 = psr;; // save efi (PSR)\r
- mov loc3 = gp;; // save efi (GP)\r
- mov loc4 = pr;; // save efi (PR)\r
- mov loc5 = sp;; // save efi (SP)\r
- mov loc6 = r13;; // save efi (TP)\r
- mov loc7 = ar.lc;; // save efi (LC)\r
- mov loc8 = ar.fpsr;; // save efi (FPSR)\r
-\r
- mov r8 = r0;; // return status\r
- mov r9 = r0;; // return value\r
- mov r10 = r0;; // return value\r
- mov r11 = r0;; // return value\r
-\r
-bios_int_func::\r
- rsm 0x4000;; // i(14)=0, disable interrupt\r
- srlz.d;;\r
- srlz.i;;\r
-\r
-//---------------------//\r
-// save fp registers //\r
-//---------------------//\r
-\r
- dep sp = 0,sp,0,4;; // align 16\r
- add sp = -16,sp;; // post decrement\r
-\r
-int_ip_1x::\r
- mov r2 = ip;;\r
- add r2 = (int_ip_1y - int_ip_1x),r2;;\r
- mov b7 = r2;;\r
- br save_fp_registers;;\r
-\r
-int_ip_1y::\r
- add sp = 16,sp;; // adjust (SP)\r
- mov loc9 = sp;; // save (SP)\r
- adds sp = 0x10,in1;; // in1 + 0x10 = SP\r
- ld4 sp = [sp];; // SP\r
- adds r17 = 0x32,in1;; // in1 + 0x32 = SS\r
- ld2 r17 = [r17];; // SS\r
- movl r2 = 0xffffffff;; // if no SS:SP, then define new SS:SP\r
- cmp.ne p6,p0 = sp,r2;;\r
- movl r2 = 0xffff;;\r
- cmp.ne.or p6,p0 = r17,r2;;\r
- (p6) br.sptk bif_1;;\r
-\r
- mov sp = in3;; // 16-bit stack pointer\r
- mov r2 = psr;;\r
- tbit.z p6,p7 = r2,17;; // psr.dt (Physical OR Virtual)\r
-\r
-bif_ip1x::\r
- mov r2 = in2;; // ia32 callback stack top\r
- mov r3 = in3;; // 16-bit stack pointer\r
- sub r2 = r2,r3;;\r
- shr.u r17 = r2,4;; // 16-bit stack segment\r
-\r
-bif_1::\r
- extr.u sp = sp,0,16;; // SP (16-bit sp for legacy code)\r
- dep sp = 0,sp,0,3;; // align 8\r
- cmp.eq p6,p0 = 0,sp;; // if SP=0000 then wrap to 0x10000\r
- (p6) dep sp = -1,sp,16,1;;\r
- shladd r2 = r17,4,sp;; // ESP = SS<<4+SP\r
- add r2 = -8,r2;; // post decrement 64 bit pointer\r
- add sp = -8,sp;; // post decrement SP\r
-\r
-sale_ip1x::\r
- mov r18 = ip;;\r
- adds r18 = (sale_ip1y - sale_ip1x),r18;;\r
- sub r18 = r18,r2;; // return address - CS base\r
- add r18 = r18,sp;; // adjustment for stack\r
- shl r18 = r18,32;;\r
- movl r19 = 0xb80f66fa;; // CLI, JMPE xxxxxxxx\r
- or r18 = r18,r19;;\r
- st8 [r2] = r18;; // (FA,66,0F,B8,xx,xx,xx,xx)\r
-\r
- cmp.eq p6,p0 = 0,sp;; // if SP=0000 then wrap to 0x10000\r
- (p6) dep sp = -1,sp,16,1;;\r
- shladd r2 = r17,4,sp;; // ESP=SS<<4+SP\r
- add r2 = -2,r2;; // post decrement 64 bit pointer\r
- add sp = -2,sp;; // post decrement SP\r
-\r
- movl r18 = 0x8000000000000100;; // CALL FAR function\r
- cmp.eq p6,p7 = in0,r18;;\r
- (p6) add r19 = 0x28,in1;; // in1 + 0x28 = CS\r
- (p6) ld2 r18 = [r19],-4;; // CS\r
- (p6) st2 [r2] = r18,-2;; // in1 + 0x24 = EIP\r
- (p6) ld2 r18 = [r19];; // EIP\r
- (p6) st2 [r2] = r18,-2;; //\r
- (p6) movl r18 = 0x9a90;; // nop, CALLFAR xxxx:yyyy\r
-\r
- (p7) movl r18 = 0xcd;; // INT xx\r
- (p7) dep r18 = in0,r18,8,8;;\r
- st2 [r2] = r18;; // (CD,xx)\r
-\r
- mov r18 = r2;; // EIP for legacy execution\r
-\r
-//------------------------------//\r
-// flush 32 bytes legacy code //\r
-//------------------------------//\r
-\r
- dep r2 = 0,r2,0,5;; // align to 32\r
- fc r2;;\r
- sync.i;;\r
- srlz.i;;\r
- srlz.d;;\r
-\r
-//------------------------------//\r
-// load legacy registers //\r
-//------------------------------//\r
- mov r2 = in1;; // IA32 BIOS register state\r
- ld4 r8 = [r2],4;; // in1 + 0 = EAX\r
- ld4 r9 = [r2],4;; // in1 + 4 = ECX\r
- ld4 r10 = [r2],4;; // in1 + 8 = EDX\r
- ld4 r11 = [r2],4;; // in1 + 12 = EBX\r
-\r
- add r2 = 4,r2;; // in1 + 16 = ESP (skip)\r
-\r
- ld4 r13 = [r2],4;; // in1 + 20 = EBP\r
- ld4 r14 = [r2],4;; // in1 + 24 = ESI\r
- ld4 r15 = [r2],4;; // in1 + 28 = EDI\r
- ld4 r3 = [r2],4;; // in1 + 32 = EFLAGS\r
- mov ar.eflag = r3;;\r
-\r
- add r2 = 4,r2;; // in1 + 36 = EIP (skip)\r
- add r2 = 2,r2;; // in1 + 40 = CS (skip)\r
-\r
- ld2 r16 = [r2],2;; // in1 + 42 = DS, (r16 = GS,FS,ES,DS)\r
- movl r27 = 0xc93fffff00000000;;\r
- dep r27 = r16,r27,4,16;; // r27 = DSD\r
-\r
- ld2 r19 = [r2],2;; // in1 + 44 = ES\r
- dep r16 = r19,r16,16,16;;\r
- movl r24 = 0xc93fffff00000000;;\r
- dep r24 = r19,r24,4,16;; // r24 = ESD\r
-\r
- ld2 r19 = [r2],2;; // in1 + 46 = FS\r
- dep r16 = r19,r16,32,16;;\r
- movl r28 = 0xc93fffff00000000;;\r
- dep r28 = r19,r28,4,16;; // r28 = FSD\r
-\r
- ld2 r19 = [r2],2;; // in1 + 48 = GS\r
- dep r16 = r19,r16,48,16;;\r
- movl r29 = 0xc93fffff00000000;;\r
- dep r29 = r19,r29,4,16;; // r29 = GSD\r
-\r
- mov r30 = r0;; // r30 = LDTD, clear NaT\r
- mov r31 = r0;; // r31 = GDTD, clear NaT\r
-\r
- dep r17 = r17,r17,16,16;; // CS = SS, (r17 = TSS,LDT,SS,CS)\r
-\r
- movl r3 = 0x0930ffff00000000;;\r
- dep r3 = r17,r3,4,16;;\r
- mov ar.csd = r3;; // ar25 = CSD\r
- mov ar.ssd = r3;; // ar26 = SSD\r
-\r
-//------------------------------//\r
-// give control to INT function //\r
-//------------------------------//\r
-\r
- br.call.sptk b0 = execute_int_function;;\r
-\r
-//------------------------------//\r
-// store legacy registers //\r
-//------------------------------//\r
-\r
- mov r2 = in1;;\r
- st4 [r2] = r8,4;; // EAX\r
- st4 [r2] = r9,4;; // ECX\r
- st4 [r2] = r10,4;; // EDX\r
- st4 [r2] = r11,4;; // EBX\r
-\r
- add r2 = 4,r2;; // ESP (skip)\r
-\r
- st4 [r2] = r13,4;; // EBP\r
- st4 [r2] = r14,4;; // ESI\r
- st4 [r2] = r15,4;; // EDI\r
-\r
- mov r3 = ar.eflag;;\r
- st4 [r2] = r3,4;; // EFLAGS\r
-\r
- add r2 = 4,r2;; // EIP (skip)\r
- add r2 = 2,r2;; // CS (skip)\r
-\r
- st2 [r2] = r16,2;; // DS, (r16 = GS,FS,ES,DS)\r
-\r
- extr.u r3 = r16,16,16;;\r
- st2 [r2] = r3,2;; // ES\r
-\r
- extr.u r3 = r16,32,16;;\r
- st2 [r2] = r3,2;; // FS\r
-\r
- extr.u r3 = r16,48,16;;\r
- st2 [r2] = r3,2;; // GS\r
-\r
-//------------------------------//\r
-// restore fp registers //\r
-//------------------------------//\r
- mov sp = loc9;; // restore (SP)\r
-int_ip_2x::\r
- mov r2 = ip;;\r
- add r2 = (int_ip_2y - int_ip_2x),r2;;\r
- mov b7 = r2;;\r
- br restore_fp_registers;;\r
-\r
-int_ip_2y::\r
- mov r8 = r0;; // return status\r
- mov r9 = r0;; // return value\r
- mov r10 = r0;; // return value\r
- mov r11 = r0;; // return value\r
-\r
- mov ar.fpsr = loc8;; // restore efi (FPSR)\r
- mov ar.lc = loc7;; // restore efi (LC)\r
- mov r13 = loc6;; // restore efi (TP)\r
- mov sp = loc5;; // restore efi (SP)\r
- mov pr = loc4;; // restore efi (PR)\r
- mov gp = loc3;; // restore efi (GP)\r
- mov psr.l = loc2;; // restore efi (PSR)\r
- srlz.d;;\r
- srlz.i;;\r
- mov b0 = loc1;; // restore efi (b0)\r
- mov ar.pfs = loc0;;\r
- br.ret.sptk b0;; // return to efi\r
-\r
-PROCEDURE_EXIT (EfiIaEntryPoint)\r
-\r
-//==============================//\r
-// EXECUTE_INT_FUNCTION //\r
-//==============================//\r
-// switch to virtual address //\r
-//------------------------------//\r
-\r
-execute_int_function::\r
-\r
- alloc r2 = 0,0,0,0;; // cfm.sof=0\r
- flushrs;;\r
-\r
- rsm 0x2000;; // ic(13)=0 for control register programming\r
- srlz.d;;\r
- srlz.i;;\r
-\r
- mov r2 = psr;;\r
- dep r2 = -1,r2,34,1;; // set is(34)\r
- dep r2 = -1,r2,44,1;; // set bn(44)\r
- dep r2 = -1,r2,36,1;; // set it(36)\r
- dep r2 = -1,r2,27,1;; // set rt(27)\r
- dep r2 = -1,r2,17,1;; // set dt(17)\r
- dep r2 = 0,r2,3,1;; // reset ac(3)\r
- dep r2 = -1,r2,13,1;; // set ic(13)\r
-\r
- mov cr.ipsr = r2;;\r
- mov cr.ifs = r0;; // clear interruption function state register\r
- mov cr.iip = r18;;\r
-\r
- rfi;; // go to legacy code execution\r
-\r
-//------------------------------//\r
-// back from legacy code //\r
-//------------------------------//\r
-// switch to physical address //\r
-//------------------------------//\r
-\r
-sale_ip1y::\r
- rsm 0x6000;; // i(14)=0,ic(13)=0 for control reg programming\r
- srlz.d;;\r
- srlz.i;;\r
-\r
- mov r2 = psr;;\r
- dep r2 = -1,r2,44,1;; // set bn(44)\r
- dep r2 = 0,r2,36,1;; // reset it(36)\r
- dep r2 = 0,r2,27,1;; // reset rt(27)\r
- dep r2 = 0,r2,17,1;; // reset dt(17)\r
- dep r2 = -1,r2,13,1;; // set ic(13)\r
- mov cr.ipsr = r2;;\r
-\r
-sale_ip2x::\r
- mov r2 = ip;;\r
- add r2 = (sale_ip2y - sale_ip2x),r2;;\r
- mov cr.ifs = r0;; // clear interruption function state register\r
- mov cr.iip = r2;;\r
- rfi;;\r
-\r
-sale_ip2y::\r
- br.ret.sptk b0;; // return to SAL\r
-\r
-//------------------------------//\r
-// store fp registers //\r
-//------------------------------//\r
-save_fp_registers::\r
- stf.spill [sp]=f2,-16;; stf.spill [sp]=f3,-16;;\r
- stf.spill [sp]=f4,-16;; stf.spill [sp]=f5,-16;; stf.spill [sp]=f6,-16;; stf.spill [sp]=f7,-16;;\r
- stf.spill [sp]=f8,-16;; stf.spill [sp]=f9,-16;; stf.spill [sp]=f10,-16;; stf.spill [sp]=f11,-16;;\r
- stf.spill [sp]=f12,-16;; stf.spill [sp]=f13,-16;; stf.spill [sp]=f14,-16;; stf.spill [sp]=f15,-16;;\r
- stf.spill [sp]=f16,-16;; stf.spill [sp]=f17,-16;; stf.spill [sp]=f18,-16;; stf.spill [sp]=f19,-16;;\r
- stf.spill [sp]=f20,-16;; stf.spill [sp]=f21,-16;; stf.spill [sp]=f22,-16;; stf.spill [sp]=f23,-16;;\r
- stf.spill [sp]=f24,-16;; stf.spill [sp]=f25,-16;; stf.spill [sp]=f26,-16;; stf.spill [sp]=f27,-16;;\r
- stf.spill [sp]=f28,-16;; stf.spill [sp]=f29,-16;; stf.spill [sp]=f30,-16;; stf.spill [sp]=f31,-16;;\r
- stf.spill [sp]=f32,-16;; stf.spill [sp]=f33,-16;; stf.spill [sp]=f34,-16;; stf.spill [sp]=f35,-16;;\r
- stf.spill [sp]=f36,-16;; stf.spill [sp]=f37,-16;; stf.spill [sp]=f38,-16;; stf.spill [sp]=f39,-16;;\r
- stf.spill [sp]=f40,-16;; stf.spill [sp]=f41,-16;; stf.spill [sp]=f42,-16;; stf.spill [sp]=f43,-16;;\r
- stf.spill [sp]=f44,-16;; stf.spill [sp]=f45,-16;; stf.spill [sp]=f46,-16;; stf.spill [sp]=f47,-16;;\r
- stf.spill [sp]=f48,-16;; stf.spill [sp]=f49,-16;; stf.spill [sp]=f50,-16;; stf.spill [sp]=f51,-16;;\r
- stf.spill [sp]=f52,-16;; stf.spill [sp]=f53,-16;; stf.spill [sp]=f54,-16;; stf.spill [sp]=f55,-16;;\r
- stf.spill [sp]=f56,-16;; stf.spill [sp]=f57,-16;; stf.spill [sp]=f58,-16;; stf.spill [sp]=f59,-16;;\r
- stf.spill [sp]=f60,-16;; stf.spill [sp]=f61,-16;; stf.spill [sp]=f62,-16;; stf.spill [sp]=f63,-16;;\r
- stf.spill [sp]=f64,-16;; stf.spill [sp]=f65,-16;; stf.spill [sp]=f66,-16;; stf.spill [sp]=f67,-16;;\r
- stf.spill [sp]=f68,-16;; stf.spill [sp]=f69,-16;; stf.spill [sp]=f70,-16;; stf.spill [sp]=f71,-16;;\r
- stf.spill [sp]=f72,-16;; stf.spill [sp]=f73,-16;; stf.spill [sp]=f74,-16;; stf.spill [sp]=f75,-16;;\r
- stf.spill [sp]=f76,-16;; stf.spill [sp]=f77,-16;; stf.spill [sp]=f78,-16;; stf.spill [sp]=f79,-16;;\r
- stf.spill [sp]=f80,-16;; stf.spill [sp]=f81,-16;; stf.spill [sp]=f82,-16;; stf.spill [sp]=f83,-16;;\r
- stf.spill [sp]=f84,-16;; stf.spill [sp]=f85,-16;; stf.spill [sp]=f86,-16;; stf.spill [sp]=f87,-16;;\r
- stf.spill [sp]=f88,-16;; stf.spill [sp]=f89,-16;; stf.spill [sp]=f90,-16;; stf.spill [sp]=f91,-16;;\r
- stf.spill [sp]=f92,-16;; stf.spill [sp]=f93,-16;; stf.spill [sp]=f94,-16;; stf.spill [sp]=f95,-16;;\r
- stf.spill [sp]=f96,-16;; stf.spill [sp]=f97,-16;; stf.spill [sp]=f98,-16;; stf.spill [sp]=f99,-16;;\r
- stf.spill [sp]=f100,-16;;stf.spill [sp]=f101,-16;;stf.spill [sp]=f102,-16;;stf.spill [sp]=f103,-16;;\r
- stf.spill [sp]=f104,-16;;stf.spill [sp]=f105,-16;;stf.spill [sp]=f106,-16;;stf.spill [sp]=f107,-16;;\r
- stf.spill [sp]=f108,-16;;stf.spill [sp]=f109,-16;;stf.spill [sp]=f110,-16;;stf.spill [sp]=f111,-16;;\r
- stf.spill [sp]=f112,-16;;stf.spill [sp]=f113,-16;;stf.spill [sp]=f114,-16;;stf.spill [sp]=f115,-16;;\r
- stf.spill [sp]=f116,-16;;stf.spill [sp]=f117,-16;;stf.spill [sp]=f118,-16;;stf.spill [sp]=f119,-16;;\r
- stf.spill [sp]=f120,-16;;stf.spill [sp]=f121,-16;;stf.spill [sp]=f122,-16;;stf.spill [sp]=f123,-16;;\r
- stf.spill [sp]=f124,-16;;stf.spill [sp]=f125,-16;;stf.spill [sp]=f126,-16;;stf.spill [sp]=f127,-16;;\r
- invala;;\r
- br b7;;\r
-\r
-//------------------------------//\r
-// restore fp registers //\r
-//------------------------------//\r
-restore_fp_registers::\r
- ldf.fill f127=[sp],16;;ldf.fill f126=[sp],16;;ldf.fill f125=[sp],16;;ldf.fill f124=[sp],16;;\r
- ldf.fill f123=[sp],16;;ldf.fill f122=[sp],16;;ldf.fill f121=[sp],16;;ldf.fill f120=[sp],16;;\r
- ldf.fill f119=[sp],16;;ldf.fill f118=[sp],16;;ldf.fill f117=[sp],16;;ldf.fill f116=[sp],16;;\r
- ldf.fill f115=[sp],16;;ldf.fill f114=[sp],16;;ldf.fill f113=[sp],16;;ldf.fill f112=[sp],16;;\r
- ldf.fill f111=[sp],16;;ldf.fill f110=[sp],16;;ldf.fill f109=[sp],16;;ldf.fill f108=[sp],16;;\r
- ldf.fill f107=[sp],16;;ldf.fill f106=[sp],16;;ldf.fill f105=[sp],16;;ldf.fill f104=[sp],16;;\r
- ldf.fill f103=[sp],16;;ldf.fill f102=[sp],16;;ldf.fill f101=[sp],16;;ldf.fill f100=[sp],16;;\r
- ldf.fill f99=[sp],16;; ldf.fill f98=[sp],16;; ldf.fill f97=[sp],16;; ldf.fill f96=[sp],16;;\r
- ldf.fill f95=[sp],16;; ldf.fill f94=[sp],16;; ldf.fill f93=[sp],16;; ldf.fill f92=[sp],16;;\r
- ldf.fill f91=[sp],16;; ldf.fill f90=[sp],16;; ldf.fill f89=[sp],16;; ldf.fill f88=[sp],16;;\r
- ldf.fill f87=[sp],16;; ldf.fill f86=[sp],16;; ldf.fill f85=[sp],16;; ldf.fill f84=[sp],16;;\r
- ldf.fill f83=[sp],16;; ldf.fill f82=[sp],16;; ldf.fill f81=[sp],16;; ldf.fill f80=[sp],16;;\r
- ldf.fill f79=[sp],16;; ldf.fill f78=[sp],16;; ldf.fill f77=[sp],16;; ldf.fill f76=[sp],16;;\r
- ldf.fill f75=[sp],16;; ldf.fill f74=[sp],16;; ldf.fill f73=[sp],16;; ldf.fill f72=[sp],16;;\r
- ldf.fill f71=[sp],16;; ldf.fill f70=[sp],16;; ldf.fill f69=[sp],16;; ldf.fill f68=[sp],16;;\r
- ldf.fill f67=[sp],16;; ldf.fill f66=[sp],16;; ldf.fill f65=[sp],16;; ldf.fill f64=[sp],16;;\r
- ldf.fill f63=[sp],16;; ldf.fill f62=[sp],16;; ldf.fill f61=[sp],16;; ldf.fill f60=[sp],16;;\r
- ldf.fill f59=[sp],16;; ldf.fill f58=[sp],16;; ldf.fill f57=[sp],16;; ldf.fill f56=[sp],16;;\r
- ldf.fill f55=[sp],16;; ldf.fill f54=[sp],16;; ldf.fill f53=[sp],16;; ldf.fill f52=[sp],16;;\r
- ldf.fill f51=[sp],16;; ldf.fill f50=[sp],16;; ldf.fill f49=[sp],16;; ldf.fill f48=[sp],16;;\r
- ldf.fill f47=[sp],16;; ldf.fill f46=[sp],16;; ldf.fill f45=[sp],16;; ldf.fill f44=[sp],16;;\r
- ldf.fill f43=[sp],16;; ldf.fill f42=[sp],16;; ldf.fill f41=[sp],16;; ldf.fill f40=[sp],16;;\r
- ldf.fill f39=[sp],16;; ldf.fill f38=[sp],16;; ldf.fill f37=[sp],16;; ldf.fill f36=[sp],16;;\r
- ldf.fill f35=[sp],16;; ldf.fill f34=[sp],16;; ldf.fill f33=[sp],16;; ldf.fill f32=[sp],16;;\r
- ldf.fill f31=[sp],16;; ldf.fill f30=[sp],16;; ldf.fill f29=[sp],16;; ldf.fill f28=[sp],16;;\r
- ldf.fill f27=[sp],16;; ldf.fill f26=[sp],16;; ldf.fill f25=[sp],16;; ldf.fill f24=[sp],16;;\r
- ldf.fill f23=[sp],16;; ldf.fill f22=[sp],16;; ldf.fill f21=[sp],16;; ldf.fill f20=[sp],16;;\r
- ldf.fill f19=[sp],16;; ldf.fill f18=[sp],16;; ldf.fill f17=[sp],16;; ldf.fill f16=[sp],16;;\r
- ldf.fill f15=[sp],16;; ldf.fill f14=[sp],16;; ldf.fill f13=[sp],16;; ldf.fill f12=[sp],16;;\r
- ldf.fill f11=[sp],16;; ldf.fill f10=[sp],16;; ldf.fill f9=[sp],16;; ldf.fill f8=[sp],16;;\r
- ldf.fill f7=[sp],16;; ldf.fill f6=[sp],16;; ldf.fill f5=[sp],16;; ldf.fill f4=[sp],16;;\r
- ldf.fill f3=[sp],16;; ldf.fill f2=[sp],16;;\r
- invala;;\r
- br b7;;\r
-\r
-//-----------------------------------------------------------------------------\r
-//++\r
-// EsalSetSalDataArea\r
-//\r
-// Register physical address of Esal Data Area\r
-//\r
-// On Entry :\r
-// in0 = Reverse Thunk Address\r
-// in1 = IntThunk Address\r
-//\r
-// Return Value:\r
-// r8 = SAL_SUCCESS\r
-//\r
-// As per static calling conventions.\r
-//\r
-//--\r
-//---------------------------------------------------------------------------\r
-\r
-PROCEDURE_ENTRY (EsalSetSalDataArea)\r
-\r
- NESTED_SETUP (4,8,0,0)\r
-\r
-EsalCalcStart1_3::\r
- mov r8 = ip;;\r
- add r8 = (ReverseThunkAddress - EsalCalcStart1_3), r8;;\r
- st8 [r8] = in0;;\r
-\r
-EsalCalcStart1_4::\r
- mov r8 = ip;;\r
- add r8 = (IntThunkAddress - EsalCalcStart1_4), r8;;\r
- st8 [r8] = in1;;\r
-\r
- mov r8 = r0;;\r
-\r
- NESTED_RETURN\r
-\r
-PROCEDURE_EXIT (EsalSetSalDataArea)\r
-\r
-//-----------------------------------------------------------------------------\r
-//++\r
-// EsagGetReverseThunkAddress\r
-//\r
-// Register physical address of Esal Data Area\r
-//\r
-// On Entry :\r
-// out0 = CodeStart\r
-// out1 = CodeEnd\r
-// out1 = ReverseThunkCode\r
-//\r
-// Return Value:\r
-// r8 = SAL_SUCCESS\r
-//\r
-// As per static calling conventions.\r
-//\r
-//--\r
-//---------------------------------------------------------------------------\r
-\r
-PROCEDURE_ENTRY (EsalGetReverseThunkAddress)\r
-\r
- NESTED_SETUP (4,8,0,0)\r
-\r
-EsalCalcStart1_31::\r
- mov r8 = ip;;\r
- add r8 = (Ia32CodeStart - EsalCalcStart1_31), r8;;\r
- mov r9 = r8;;\r
-\r
-EsalCalcStart1_41::\r
- mov r8 = ip;;\r
- add r8 = (Ia32CodeEnd - EsalCalcStart1_41), r8;;\r
- mov r10 = r8;;\r
-\r
-EsalCalcStart1_51::\r
- mov r8 = ip;;\r
- add r8 = (ReverseThunkAddress - EsalCalcStart1_51), r8;;\r
- mov r11 = r8;;\r
- mov r8 = r0;;\r
-\r
- NESTED_RETURN\r
-\r
-PROCEDURE_EXIT (EsalGetReverseThunkAddress)\r
-\r
-\r
-.align 16\r
-PROCEDURE_ENTRY (InterruptRedirectionTemplate)\r
- data8 0x90CFCD08\r
- data8 0x90CFCD09\r
- data8 0x90CFCD0A\r
- data8 0x90CFCD0B\r
- data8 0x90CFCD0C\r
- data8 0x90CFCD0D\r
- data8 0x90CFCD0E\r
- data8 0x90CFCD0F\r
-PROCEDURE_EXIT (InterruptRedirectionTemplate)\r
-\r
-//------------------------------//\r
-// Reverse Thunk Code //\r
-//------------------------------//\r
-\r
-Ia32CodeStart::\r
- br.sptk.few Ia32CodeStart;; // IPF CSM integration -Bug (Write This Code)\r
-ReverseThunkCode::\r
- data8 0xb80f66fa // CLI, JMPE xxxx\r
-ReverseThunkAddress::\r
- data8 0 // Return Address\r
-IntThunkAddress::\r
- data8 0 // IntThunk Address\r
-Ia32CodeEnd::\r
-\r
-\r
-\r
-\r
+++ /dev/null
-/** @file\r
- Call into 16-bit BIOS code\r
-\r
- BugBug: Thunker does A20 gate. Can we get rid of this code or\r
- put it into Legacy16 code.\r
-\r
-Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved.<BR>\r
-\r
-This program and the accompanying materials\r
-are licensed and made available under the terms and conditions\r
-of the BSD License which accompanies this distribution. The\r
-full text of the license may be found at\r
-http://opensource.org/licenses/bsd-license.php\r
-\r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-#include "LegacyBiosInterface.h"\r
-#include "IpfThunk.h"\r
-\r
-/**\r
- Gets the current flat GDT and IDT descriptors and store them in\r
- Private->IntThunk. These values are used by the Thunk code.\r
- This method must be called before every thunk in order to assure\r
- that the correct GDT and IDT are restored after the thunk.\r
-\r
- @param Private Private context for Legacy BIOS\r
-\r
- @retval EFI_SUCCESS Should only pass.\r
-\r
-**/\r
-EFI_STATUS\r
-LegacyBiosGetFlatDescs (\r
- IN LEGACY_BIOS_INSTANCE *Private\r
- )\r
-{\r
- return EFI_SUCCESS;\r
-}\r
-\r
-\r
-/**\r
- BIOS interrupt call function.\r
-\r
- @param BiosInt Int number of BIOS call\r
- @param Segment Segment number\r
- @param Offset Offset in segment\r
- @param Regs IA32 Register set.\r
- @param Stack Base address of stack\r
- @param StackSize Size of stack\r
-\r
- @retval EFI_SUCCESS BIOS interrupt call succeeds.\r
-\r
-**/\r
-EFI_STATUS\r
-BiosIntCall (\r
- IN UINT16 BiosInt,\r
- IN UINT16 Segment,\r
- IN UINT16 Offset,\r
- IN EFI_IA32_REGISTER_SET *Regs,\r
- IN VOID *Stack,\r
- IN UINTN StackSize\r
- )\r
-{\r
- IPF_DWORD_REGS DwordRegs;\r
- UINT64 IntTypeVariable;\r
-\r
- IntTypeVariable = 0x8000000000000000;\r
- IntTypeVariable |= (UINT64)BiosInt;\r
-\r
- DwordRegs.Cs = Segment;\r
- DwordRegs.Eip = Offset;\r
-\r
- DwordRegs.Ds = Regs->X.DS;\r
- DwordRegs.Es = Regs->X.ES;\r
- DwordRegs.Fs = Regs->X.ES;\r
- DwordRegs.Gs = Regs->X.ES;\r
- DwordRegs.Ss = 0xFFFF;\r
-\r
- DwordRegs.Eax = Regs->X.AX;\r
- DwordRegs.Ebx = Regs->X.BX;\r
- //\r
- // Sometimes, ECX is used to pass in 32 bit data. For example, INT 1Ah, AX = B10Dh is\r
- // "PCI BIOS v2.0c + Write Configuration DWORD" and ECX has the dword to write.\r
- //\r
- DwordRegs.Ecx = Regs->E.ECX;\r
- DwordRegs.Edx = Regs->X.DX;\r
-\r
- DwordRegs.Ebp = Regs->X.BP;\r
- DwordRegs.Eflag = *((UINT16 *) &Regs->X.Flags);\r
-\r
- DwordRegs.Edi = Regs->X.DI;\r
- DwordRegs.Esi = Regs->X.SI;\r
- DwordRegs.Esp = 0xFFFFFFFF;\r
-\r
- EfiIaEntryPoint (IntTypeVariable, &DwordRegs, ((UINTN) Stack + StackSize), StackSize);\r
-\r
- Regs->X.CS = DwordRegs.Cs;\r
-\r
- Regs->X.DS = (UINT16) DwordRegs.Ds;\r
- Regs->X.SS = (UINT16) DwordRegs.Ss;\r
-\r
- Regs->E.EAX = DwordRegs.Eax;\r
- Regs->E.EBX = DwordRegs.Ebx;\r
- Regs->E.ECX = DwordRegs.Ecx;\r
- Regs->E.EDX = DwordRegs.Edx;\r
-\r
- Regs->E.EBP = DwordRegs.Ebp;\r
- CopyMem (&Regs->X.Flags, &DwordRegs.Eflag, sizeof (EFI_FLAGS_REG));\r
-\r
- Regs->E.EDI = DwordRegs.Edi;\r
- Regs->E.ESI = DwordRegs.Esi;\r
-\r
- return EFI_SUCCESS;\r
-}\r
-\r
-\r
-/**\r
- Template of real mode code.\r
-\r
- @param CodeStart Start address of code.\r
- @param CodeEnd End address of code\r
- @param ReverseThunkStart Start of reverse thunk.\r
- @param IntThunk Low memory thunk.\r
-\r
-**/\r
-VOID\r
-RealModeTemplate (\r
- OUT UINTN *CodeStart,\r
- OUT UINTN *CodeEnd,\r
- OUT UINTN *ReverseThunkStart,\r
- LOW_MEMORY_THUNK *IntThunk\r
- )\r
-{\r
- SAL_RETURN_REGS SalStatus;\r
-\r
- SalStatus = EsalGetReverseThunkAddress ();\r
-\r
- *CodeStart = SalStatus.r9;\r
- *CodeEnd = SalStatus.r10;\r
- *ReverseThunkStart = SalStatus.r11;\r
-\r
-}\r
-\r
-\r
-/**\r
- Allocate memory < 1 MB and copy the thunker code into low memory. Se up\r
- all the descriptors.\r
-\r
- @param Private Private context for Legacy BIOS\r
-\r
- @retval EFI_SUCCESS Should only pass.\r
-\r
-**/\r
-EFI_STATUS\r
-LegacyBiosInitializeThunk (\r
- IN LEGACY_BIOS_INSTANCE *Private\r
- )\r
-{\r
- GDT32 *CodeGdt;\r
- GDT32 *DataGdt;\r
- UINTN CodeStart;\r
- UINTN CodeEnd;\r
- UINTN ReverseThunkStart;\r
- UINT32 Base;\r
- LOW_MEMORY_THUNK *IntThunk;\r
- UINTN TempData;\r
-\r
- ASSERT (Private);\r
-\r
- IntThunk = Private->IntThunk;\r
-\r
- //\r
- // Clear the reserved descriptor\r
- //\r
- ZeroMem (&(IntThunk->RealModeGdt[0]), sizeof (GDT32));\r
-\r
- //\r
- // Setup a descriptor for real-mode code\r
- //\r
- CodeGdt = &(IntThunk->RealModeGdt[1]);\r
-\r
- //\r
- // Fill in the descriptor with our real-mode segment value\r
- //\r
- CodeGdt->Type = 0xA;\r
- //\r
- // code/read\r
- //\r
- CodeGdt->System = 1;\r
- CodeGdt->Dpl = 0;\r
- CodeGdt->Present = 1;\r
- CodeGdt->Software = 0;\r
- CodeGdt->Reserved = 0;\r
- CodeGdt->DefaultSize = 0;\r
- //\r
- // 16 bit operands\r
- //\r
- CodeGdt->Granularity = 0;\r
-\r
- CodeGdt->LimitHi = 0;\r
- CodeGdt->LimitLo = 0xffff;\r
-\r
- Base = (*((UINT32 *) &IntThunk->Code));\r
- CodeGdt->BaseHi = (Base >> 24) & 0xFF;\r
- CodeGdt->BaseMid = (Base >> 16) & 0xFF;\r
- CodeGdt->BaseLo = Base & 0xFFFF;\r
-\r
- //\r
- // Setup a descriptor for read-mode data\r
- //\r
- DataGdt = &(IntThunk->RealModeGdt[2]);\r
- CopyMem (DataGdt, CodeGdt, sizeof (GDT32));\r
-\r
- DataGdt->Type = 0x2;\r
- //\r
- // read/write data\r
- //\r
- DataGdt->BaseHi = 0x0;\r
- //\r
- // Base = 0\r
- //\r
- DataGdt->BaseMid = 0x0;\r
- //\r
- DataGdt->BaseLo = 0x0;\r
- //\r
- DataGdt->LimitHi = 0x0F;\r
- //\r
- // Limit = 4Gb\r
- //\r
- DataGdt->LimitLo = 0xFFFF;\r
- //\r
- DataGdt->Granularity = 0x1;\r
- //\r
- //\r
- // Compute selector value\r
- //\r
- IntThunk->RealModeGdtDesc.Limit = (UINT16) (sizeof (IntThunk->RealModeGdt) - 1);\r
- CopyMem (&IntThunk->RealModeGdtDesc.Base, (UINT32 *) &IntThunk->RealModeGdt, sizeof (UINT32));\r
- //\r
- // IntThunk->RealModeGdtDesc.Base = *((UINT32*) &IntThunk->RealModeGdt);\r
- //\r
- IntThunk->RealModeIdtDesc.Limit = 0xFFFF;\r
- IntThunk->RealModeIdtDesc.Base = 0;\r
- IntThunk->LowCodeSelector = (UINT32) ((UINTN) CodeGdt - IntThunk->RealModeGdtDesc.Base);\r
- IntThunk->LowDataSelector = (UINT32) ((UINTN) DataGdt - IntThunk->RealModeGdtDesc.Base);\r
-\r
- //\r
- // Initialize low real-mode code thunk\r
- //\r
- RealModeTemplate (&CodeStart, &CodeEnd, &ReverseThunkStart, IntThunk);\r
-\r
- TempData = (UINTN) &(IntThunk->Code);\r
- IntThunk->LowReverseThunkStart = ((UINT32) TempData + (UINT32) (ReverseThunkStart - CodeStart));\r
-\r
- EsalSetSalDataArea (TempData, (UINTN) IntThunk);\r
- CopyMem (IntThunk->Code, (VOID *) CodeStart, CodeEnd - CodeStart);\r
-\r
- IntThunk->EfiToLegacy16InitTable.ReverseThunkCallSegment = EFI_SEGMENT (*((UINT32 *) &IntThunk->LowReverseThunkStart));\r
- IntThunk->EfiToLegacy16InitTable.ReverseThunkCallOffset = EFI_OFFSET (*((UINT32 *) &IntThunk->LowReverseThunkStart));\r
-\r
- return EFI_SUCCESS;\r
-}\r
-\r
-\r
-/**\r
- Thunk to 16-bit real mode and execute a software interrupt with a vector\r
- of BiosInt. Regs will contain the 16-bit register context on entry and\r
- exit.\r
-\r
- @param This Protocol instance pointer.\r
- @param BiosInt Processor interrupt vector to invoke\r
- @param Regs Register contexted passed into (and returned) from\r
- thunk to 16-bit mode\r
-\r
- @retval FALSE Thunk completed, and there were no BIOS errors in the\r
- target code. See Regs for status.\r
- @retval TRUE There was a BIOS erro in the target code.\r
-\r
-**/\r
-BOOLEAN\r
-EFIAPI\r
-LegacyBiosInt86 (\r
- IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
- IN UINT8 BiosInt,\r
- IN EFI_IA32_REGISTER_SET *Regs\r
- )\r
-{\r
- EFI_STATUS Status;\r
- LEGACY_BIOS_INSTANCE *Private;\r
- LOW_MEMORY_THUNK *IntThunk;\r
- UINT16 *Stack16;\r
- EFI_TPL OriginalTpl;\r
- UINTN IaSegment;\r
- UINTN IaOffset;\r
- UINTN *Address;\r
- UINTN TempData;\r
-\r
- Private = LEGACY_BIOS_INSTANCE_FROM_THIS (This);\r
- IntThunk = Private->IntThunk;\r
-\r
- //\r
- // Get the current flat GDT, IDT, and SS and store them in Private->IntThunk.\r
- //\r
- Status = LegacyBiosGetFlatDescs (Private);\r
- ASSERT_EFI_ERROR (Status);\r
-\r
- Regs->X.Flags.Reserved1 = 1;\r
- Regs->X.Flags.Reserved2 = 0;\r
- Regs->X.Flags.Reserved3 = 0;\r
- Regs->X.Flags.Reserved4 = 0;\r
- Regs->X.Flags.IOPL = 3;\r
- Regs->X.Flags.NT = 0;\r
- Regs->X.Flags.IF = 1;\r
- Regs->X.Flags.TF = 0;\r
- Regs->X.Flags.CF = 0;\r
- //\r
- // Clear the error flag; thunk code may set it.\r
- //\r
- Stack16 = (UINT16 *) (IntThunk->Stack + LOW_STACK_SIZE);\r
-\r
- //\r
- // Copy regs to low memory stack\r
- //\r
- Stack16 -= sizeof (EFI_IA32_REGISTER_SET) / sizeof (UINT16);\r
- CopyMem (Stack16, Regs, sizeof (EFI_IA32_REGISTER_SET));\r
-\r
- //\r
- // Provide low stack esp\r
- //\r
- TempData = ((UINTN) Stack16) - ((UINTN) IntThunk);\r
- IntThunk->LowStack = *((UINT32 *) &TempData);\r
-\r
- //\r
- // Stack for reverse thunk flat mode.\r
- // It must point to top of stack (end of stack space).\r
- //\r
- TempData = ((UINTN) IntThunk->RevThunkStack) + LOW_STACK_SIZE;\r
- IntThunk->RevFlatStack = *((UINT32 *) &TempData);\r
-\r
- //\r
- // The call to Legacy16 is a critical section to EFI\r
- //\r
- OriginalTpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);\r
-\r
- //\r
- // Set Legacy16 state. 0x08, 0x70 is legacy 8259 vector bases.\r
- //\r
- Status = Private->Legacy8259->SetMode (Private->Legacy8259, Efi8259LegacyMode, NULL, NULL);\r
- ASSERT_EFI_ERROR (Status);\r
-\r
- //\r
- // Call the real mode thunk code\r
- //\r
- TempData = BiosInt * 4;\r
- Address = (UINTN *) TempData;\r
- IaOffset = 0xFFFF & (*Address);\r
- IaSegment = 0xFFFF & ((*Address) >> 16);\r
-\r
- Status = BiosIntCall (\r
- BiosInt,\r
- (UINT16) IaSegment,\r
- (UINT16) IaOffset,\r
- (EFI_IA32_REGISTER_SET *) Stack16,\r
- IntThunk,\r
- IntThunk->LowStack\r
- );\r
-\r
- //\r
- // Check for errors with the thunk\r
- //\r
- switch (Status) {\r
- case THUNK_OK:\r
- break;\r
-\r
- case THUNK_ERR_A20_UNSUP:\r
- case THUNK_ERR_A20_FAILED:\r
- default:\r
- //\r
- // For all errors, set EFLAGS.CF (used by legacy BIOS to indicate error).\r
- //\r
- Regs->X.Flags.CF = 1;\r
- break;\r
- }\r
-\r
- Status = Private->Legacy8259->SetMode (Private->Legacy8259, Efi8259ProtectedMode, NULL, NULL);\r
- ASSERT_EFI_ERROR (Status);\r
-\r
- //\r
- // End critical section\r
- //\r
- gBS->RestoreTPL (OriginalTpl);\r
-\r
- //\r
- // Return the resulting registers\r
- //\r
- CopyMem (Regs, Stack16, sizeof (EFI_IA32_REGISTER_SET));\r
-\r
- return (BOOLEAN) (Regs->X.Flags.CF != 0);\r
-}\r
-\r
-\r
-/**\r
- Thunk to 16-bit real mode and call Segment:Offset. Regs will contain the\r
- 16-bit register context on entry and exit. Arguments can be passed on\r
- the Stack argument\r
-\r
- @param This Protocol instance pointer.\r
- @param Segment Segemnt of 16-bit mode call\r
- @param Offset Offset of 16-bit mdoe call\r
- @param Regs Register contexted passed into (and returned) from\r
- thunk to 16-bit mode\r
- @param Stack Caller allocated stack used to pass arguments\r
- @param StackSize Size of Stack in bytes\r
-\r
- @retval FALSE Thunk completed, and there were no BIOS errors in the\r
- target code. See Regs for status.\r
- @retval TRUE There was a BIOS erro in the target code.\r
-\r
-**/\r
-BOOLEAN\r
-EFIAPI\r
-LegacyBiosFarCall86 (\r
- IN EFI_LEGACY_BIOS_PROTOCOL *This,\r
- IN UINT16 Segment,\r
- IN UINT16 Offset,\r
- IN EFI_IA32_REGISTER_SET *Regs,\r
- IN VOID *Stack,\r
- IN UINTN StackSize\r
- )\r
-{\r
- EFI_STATUS Status;\r
- LEGACY_BIOS_INSTANCE *Private;\r
- LOW_MEMORY_THUNK *IntThunk;\r
- UINT16 *Stack16;\r
- EFI_TPL OriginalTpl;\r
- UINTN IaSegment;\r
- UINTN IaOffset;\r
- UINTN TempData;\r
-\r
- Private = LEGACY_BIOS_INSTANCE_FROM_THIS (This);\r
- IntThunk = Private->IntThunk;\r
- IaSegment = Segment;\r
- IaOffset = Offset;\r
-\r
- //\r
- // Get the current flat GDT and IDT and store them in Private->IntThunk.\r
- //\r
- Status = LegacyBiosGetFlatDescs (Private);\r
- ASSERT_EFI_ERROR (Status);\r
-\r
- Regs->X.Flags.Reserved1 = 1;\r
- Regs->X.Flags.Reserved2 = 0;\r
- Regs->X.Flags.Reserved3 = 0;\r
- Regs->X.Flags.Reserved4 = 0;\r
- Regs->X.Flags.IOPL = 3;\r
- Regs->X.Flags.NT = 0;\r
- Regs->X.Flags.IF = 1;\r
- Regs->X.Flags.TF = 0;\r
- Regs->X.Flags.CF = 0;\r
- //\r
- // Clear the error flag; thunk code may set it.\r
- //\r
- Stack16 = (UINT16 *) (IntThunk->Stack + LOW_STACK_SIZE);\r
- if (Stack != NULL && StackSize != 0) {\r
- //\r
- // Copy Stack to low memory stack\r
- //\r
- Stack16 -= StackSize / sizeof (UINT16);\r
- CopyMem (Stack16, Stack, StackSize);\r
- }\r
- //\r
- // Copy regs to low memory stack\r
- //\r
- Stack16 -= sizeof (EFI_IA32_REGISTER_SET) / sizeof (UINT16);\r
- CopyMem (Stack16, Regs, sizeof (EFI_IA32_REGISTER_SET));\r
-\r
- //\r
- // Provide low stack esp\r
- //\r
- TempData = ((UINTN) Stack16) - ((UINTN) IntThunk);\r
- IntThunk->LowStack = *((UINT32 *) &TempData);\r
-\r
- //\r
- // The call to Legacy16 is a critical section to EFI\r
- //\r
- OriginalTpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);\r
-\r
- //\r
- // Set Legacy16 state. 0x08, 0x70 is legacy 8259 vector bases.\r
- //\r
- Status = Private->Legacy8259->SetMode (Private->Legacy8259, Efi8259LegacyMode, NULL, NULL);\r
- ASSERT_EFI_ERROR (Status);\r
-\r
- //\r
- // Call the real mode thunk code\r
- //\r
- Status = BiosIntCall (\r
- 0x100,\r
- (UINT16) IaSegment,\r
- (UINT16) IaOffset,\r
- (EFI_IA32_REGISTER_SET *) Stack16,\r
- IntThunk,\r
- IntThunk->LowStack\r
- );\r
-\r
- //\r
- // Check for errors with the thunk\r
- //\r
- switch (Status) {\r
- case THUNK_OK:\r
- break;\r
-\r
- case THUNK_ERR_A20_UNSUP:\r
- case THUNK_ERR_A20_FAILED:\r
- default:\r
- //\r
- // For all errors, set EFLAGS.CF (used by legacy BIOS to indicate error).\r
- //\r
- Regs->X.Flags.CF = 1;\r
- break;\r
- }\r
- //\r
- // Restore protected mode interrupt state\r
- //\r
- Status = Private->Legacy8259->SetMode (Private->Legacy8259, Efi8259ProtectedMode, NULL, NULL);\r
- ASSERT_EFI_ERROR (Status);\r
-\r
- //\r
- // End critical section\r
- //\r
- gBS->RestoreTPL (OriginalTpl);\r
-\r
- //\r
- // Return the resulting registers\r
- //\r
- CopyMem (Regs, Stack16, sizeof (EFI_IA32_REGISTER_SET));\r
- Stack16 += sizeof (EFI_IA32_REGISTER_SET) / sizeof (UINT16);\r
-\r
- if (Stack != NULL && StackSize != 0) {\r
- //\r
- // Copy low memory stack to Stack\r
- //\r
- CopyMem (Stack, Stack16, StackSize);\r
- Stack16 += StackSize / sizeof (UINT16);\r
- }\r
-\r
- return (BOOLEAN) (Regs->X.Flags.CF != 0);\r
-}\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF\r
+# VALID_ARCHITECTURES = IA32 X64\r
#\r
\r
[Sources]\r
LegacyBbs.c\r
LegacySio.c\r
\r
-[Sources.IPF]\r
- Ipf/IpfThunk.s\r
- Ipf/Thunk.c\r
- Ipf/IpfThunk.i\r
- Ipf/IpfBootSupport.c\r
- Ipf/IpfThunk.h\r
-\r
[Packages]\r
MdePkg/MdePkg.dec\r
MdeModulePkg/MdeModulePkg.dec\r
UefiRuntimeServicesTableLib\r
BaseLib\r
\r
-[LibraryClasses.IPF]\r
- IoLib\r
- UefiRuntimeServicesTableLib\r
-\r
-\r
[Guids]\r
gEfiDiskInfoIdeInterfaceGuid ## SOMETIMES_CONSUMES ##GUID #Used in LegacyBiosBuildIdeData() to assure device is a disk\r
gEfiSmbiosTableGuid ## SOMETIMES_CONSUMES ##SystemTable\r
#define CONVENTIONAL_MEMORY_TOP 0xA0000 // 640 KB\r
#define INITIAL_VALUE_BELOW_1K 0x0\r
\r
-#elif defined (MDE_CPU_IPF)\r
-\r
-#define NUM_REAL_GDT_ENTRIES 3\r
-#define CONVENTIONAL_MEMORY_TOP 0x80000 // 512 KB\r
-#define INITIAL_VALUE_BELOW_1K 0xff\r
-\r
#endif\r
\r
#pragma pack(1)\r
BBS_TABLE BbsTable[MAX_BBS_ENTRIES];\r
} LOW_MEMORY_THUNK;\r
\r
-#elif defined (MDE_CPU_IPF)\r
-\r
-typedef struct {\r
- //\r
- // Space for the code\r
- // The address of Code is also the beginning of the relocated Thunk code\r
- //\r
- CHAR8 Code[4096]; // ?\r
- //\r
- // The address of the Reverse Thunk code\r
- // Note that this member CONTAINS the address of the relocated reverse thunk\r
- // code unlike the member variable 'Code', which IS the address of the Thunk\r
- // code.\r
- //\r
- UINT32 LowReverseThunkStart;\r
-\r
- //\r
- // Data for the code (cs releative)\r
- //\r
- DESCRIPTOR32 GdtDesc; // Protected mode GDT\r
- DESCRIPTOR32 IdtDesc; // Protected mode IDT\r
- UINT32 FlatSs;\r
- UINT32 FlatEsp;\r
-\r
- UINT32 LowCodeSelector; // Low code selector in GDT\r
- UINT32 LowDataSelector; // Low data selector in GDT\r
- UINT32 LowStack;\r
- DESCRIPTOR32 RealModeIdtDesc;\r
-\r
- //\r
- // real-mode GDT (temporary GDT with two real mode segment descriptors)\r
- //\r
- GDT32 RealModeGdt[NUM_REAL_GDT_ENTRIES];\r
- DESCRIPTOR32 RealModeGdtDesc;\r
-\r
- //\r
- // Members specifically for the reverse thunk\r
- // The RevReal* members are used to store the current state of real mode\r
- // before performing the reverse thunk. The RevFlat* members must be set\r
- // before calling the reverse thunk assembly code.\r
- //\r
- UINT16 RevRealDs;\r
- UINT16 RevRealSs;\r
- UINT32 RevRealEsp;\r
- DESCRIPTOR32 RevRealIdtDesc;\r
- UINT16 RevFlatDataSelector; // Flat data selector in GDT\r
- UINT32 RevFlatStack;\r
-\r
- //\r
- // A low memory stack\r
- //\r
- CHAR8 Stack[LOW_STACK_SIZE];\r
-\r
- //\r
- // Stack for flat mode after reverse thunk\r
- // @bug - This may no longer be necessary if the reverse thunk interface\r
- // is changed to have the flat stack in a different location.\r
- //\r
- CHAR8 RevThunkStack[LOW_STACK_SIZE];\r
-\r
- //\r
- // Legacy16 Init memory map info\r
- //\r
- EFI_TO_COMPATIBILITY16_INIT_TABLE EfiToLegacy16InitTable;\r
-\r
- EFI_TO_COMPATIBILITY16_BOOT_TABLE EfiToLegacy16BootTable;\r
-\r
- CHAR8 InterruptRedirectionCode[32];\r
- EFI_LEGACY_INSTALL_PCI_HANDLER PciHandler;\r
- EFI_DISPATCH_OPROM_TABLE DispatchOpromTable;\r
- BBS_TABLE BbsTable[MAX_BBS_ENTRIES];\r
-} LOW_MEMORY_THUNK;\r
-\r
#endif\r
\r
//\r
PLATFORM_VERSION = 0.96\r
DSC_SPECIFICATION = 0x00010005\r
OUTPUT_DIRECTORY = Build/IntelFrameworkModuleAll\r
- SUPPORTED_ARCHITECTURES = IA32|IPF|X64|EBC|ARM\r
+ SUPPORTED_ARCHITECTURES = IA32|X64|EBC|ARM\r
BUILD_TARGETS = DEBUG|RELEASE|NOOPT\r
SKUID_IDENTIFIER = DEFAULT\r
\r
gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x06\r
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000\r
\r
-[PcdsFixedAtBuild.IPF]\r
- gEfiMdePkgTokenSpaceGuid.PcdIoBlockBaseAddressForIpf|0x0ffffc000000\r
-\r
-###################################################################################################\r
-#\r
-# Components Section - list of the modules and components that will be processed by compilation\r
-# tools and the EDK II tools to generate PE32/PE32+/Coff image files.\r
-#\r
-# Note: The EDK II DSC file is not used to specify how compiled binary images get placed\r
-# into firmware volume images. This section is just a list of modules to compile from\r
-# source into UEFI-compliant binaries.\r
-# It is the FDF file that contains information on combining binary files into firmware\r
-# volume images, whose concept is beyond UEFI and is described in PI specification.\r
-# Binary modules do not need to be listed in this section, as they should be\r
-# specified in the FDF file. For example: Shell binary (Shell_Full.efi), FAT binary (Fat.efi),\r
-# Logo (Logo.bmp), and etc.\r
-# There may also be modules listed in this section that are not required in the FDF file,\r
-# When a module listed here is excluded from FDF file, then UEFI-compliant binary will be\r
-# generated for it, but the binary will not be put into any firmware volume.\r
-#\r
-###################################################################################################\r
-\r
[Components]\r
IntelFrameworkModulePkg/Library/BaseUefiTianoCustomDecompressLib/BaseUefiTianoCustomDecompressLib.inf\r
IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf\r
IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf\r
IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaArchCustomDecompressLib.inf\r
\r
-[Components.IA32,Components.X64,Components.IPF]\r
+[Components.IA32,Components.X64]\r
IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosDxe.inf\r
\r
[Components.IA32]\r
IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf\r
}\r
\r
-[Components.IPF]\r
- IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIoDxe.inf {\r
- <LibraryClasses>\r
- IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf\r
- }\r
-\r
[BuildOptions]\r
*_*_*_CC_FLAGS = -D DISABLE_NEW_DEPRECATED_INTERFACES\r
# This library instance produces UefiDecompressLib and Tiano Custom decompression algorithm.\r
# Tiano custom decompression algorithm shares most of code with Uefi Decompress algorithm.\r
#\r
-# Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
## @file\r
# Capsule library instance for DXE_DRIVER, DXE_RUNTIME_DRIVER.\r
#\r
-# Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
## @file\r
# Framework DXE report status code library to support EFI1.1 and UEFI2.0 system.\r
#\r
-# Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
FILE_GUID = 3ddc3b12-99ea-4364-b315-6310a2050be5\r
MODULE_TYPE = DXE_DRIVER\r
VERSION_STRING = 1.0\r
- LIBRARY_CLASS = ReportStatusCodeLib|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SAL_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER SMM_CORE\r
+ LIBRARY_CLASS = ReportStatusCodeLib|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER SMM_CORE\r
\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
# LZMA SDK 16.04 was placed in the public domain on 2016-10-04.\r
# It was released on the http://www.7-zip.org/sdk.html website.\r
#\r
-# Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
FILE_GUID = bda39d3a-451b-4350-8266-81ab10fa0523\r
MODULE_TYPE = PEIM\r
VERSION_STRING = 1.0\r
- LIBRARY_CLASS = DebugLib|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SAL_DRIVER DXE_SMM_DRIVER SMM_CORE PEIM SEC PEI_CORE UEFI_APPLICATION UEFI_DRIVER\r
+ LIBRARY_CLASS = DebugLib|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER SMM_CORE PEIM SEC PEI_CORE UEFI_APPLICATION UEFI_DRIVER\r
\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
# DRIVER_BINDING = gVgaClassDriverBinding\r
# COMPONENT_NAME = gVgaClassComponentName\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
## @file\r
# This driver takes DEBUG info from Data Hub and writes it to StdErr if it exists.\r
#\r
-# Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
# This driver produces Firmware Volume2 protocol with full services\r
# (read/write, get/set) based on Firmware Volume Block protocol.\r
#\r
-# Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials are\r
# licensed and made available under the terms and conditions of the BSD License\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
## @file\r
# Status code PEIM which produces Status Code PPI.\r
#\r
-# Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
projects / mirror_edk2.git / commitdiff