//\r
//\r
\r
-#include <AsmMacroIoLib.h>\r
#include <Library/ArmLib.h>\r
\r
#include <ArmPlatform.h>\r
ArmPlatformIsPrimaryCore FUNCTION\r
// Extract cpu_id and cluster_id from ARM_SCC_CFGREG48\r
// with cpu_id[0:3] and cluster_id[4:7]\r
- LoadConstantToReg (ARM_CTA15A7_SCC_CFGREG48, r1)\r
+ mov32 r1, ARM_CTA15A7_SCC_CFGREG48\r
ldr r1, [r1]\r
lsr r1, #24\r
\r
orr r1, r1, r2\r
\r
// Keep the Cluster ID and Core ID from the MPID\r
- LoadConstantToReg (ARM_CLUSTER_MASK :OR: ARM_CORE_MASK, r2)\r
+ mov32 r2, ARM_CLUSTER_MASK :OR: ARM_CORE_MASK\r
and r0, r0, r2\r
\r
// Compare mpid and boot cpu from ARM_SCC_CFGREG48\r
ArmPlatformGetPrimaryCoreMpId FUNCTION\r
// Extract cpu_id and cluster_id from ARM_SCC_CFGREG48\r
// with cpu_id[0:3] and cluster_id[4:7]\r
- LoadConstantToReg (ARM_CTA15A7_SCC_CFGREG48, r0)\r
+ mov32 r0, ARM_CTA15A7_SCC_CFGREG48\r
ldr r0, [r0]\r
lsr r0, #24\r
\r
//\r
//\r
\r
-#include <AsmMacroIoLib.h>\r
#include <Library/ArmLib.h>\r
\r
#include <AutoGen.h>\r
EXPORT ArmPlatformGetPrimaryCoreMpId\r
EXPORT ArmPlatformGetCorePosition\r
\r
- IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCore\r
- IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCoreMask\r
-\r
AREA CTA9x4Helper, CODE, READONLY\r
\r
//UINTN\r
// VOID\r
// );\r
ArmPlatformGetPrimaryCoreMpId FUNCTION\r
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)\r
- ldr r0, [r0]\r
+ mov32 r0, FixedPcdGet32(PcdArmPrimaryCore)\r
bx lr\r
ENDFUNC\r
\r
// IN UINTN MpId\r
// );\r
ArmPlatformIsPrimaryCore FUNCTION\r
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)\r
- ldr r1, [r1]\r
+ mov32 r1, FixedPcdGet32(PcdArmPrimaryCoreMask)\r
and r0, r0, r1\r
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1)\r
- ldr r1, [r1]\r
+ mov32 r1, FixedPcdGet32(PcdArmPrimaryCore)\r
cmp r0, r1\r
moveq r0, #1\r
movne r0, #0\r
//\r
//\r
\r
-#include <AsmMacroIoLib.h>\r
#include <Base.h>\r
#include <Library/ArmLib.h>\r
#include <Library/PcdLib.h>\r
EXPORT ArmPlatformGetPrimaryCoreMpId\r
EXPORT ArmPlatformGetCorePosition\r
\r
- IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCore\r
- IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCoreMask\r
-\r
AREA RTSMHelper, CODE, READONLY\r
\r
ArmPlatformPeiBootAction FUNCTION\r
// VOID\r
// );\r
ArmPlatformGetPrimaryCoreMpId FUNCTION\r
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)\r
- ldr r0, [r0]\r
+ mov32 r0, FixedPcdGet32(PcdArmPrimaryCore)\r
bx lr\r
ENDFUNC\r
\r
// IN UINTN MpId\r
// );\r
ArmPlatformIsPrimaryCore FUNCTION\r
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)\r
- ldr r1, [r1]\r
+ mov32 r1, FixedPcdGet32(PcdArmPrimaryCoreMask)\r
and r0, r0, r1\r
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1)\r
+ mov32 r1, FixedPcdGet32(PcdArmPrimaryCore)\r
ldr r1, [r1]\r
cmp r0, r1\r
moveq r0, #1\r
//\r
//\r
\r
-#include <AsmMacroIoLib.h>\r
#include <Base.h>\r
#include <Library/ArmPlatformLib.h>\r
#include <Drivers/PL35xSmc.h>\r
//\r
// Initialize PL354 SMC\r
//\r
- LoadConstantToReg (ARM_VE_SMC_CTRL_BASE, r1)\r
+ mov32 r1, ARM_VE_SMC_CTRL_BASE\r
ldr r2, =VersatileExpressSmcConfiguration\r
ldr r3, =VersatileExpressSmcConfigurationEnd\r
blx PL35xSmcInitialize\r
//\r
// Page mode setup for VRAM\r
//\r
- LoadConstantToReg (VRAM_MOTHERBOARD_BASE, r2)\r
+ mov32 r2, VRAM_MOTHERBOARD_BASE\r
\r
// Read current state\r
ldr r0, [r2, #0]\r
//\r
//\r
\r
-#include <AsmMacroIoLib.h>\r
#include <Library/ArmLib.h>\r
\r
INCLUDE AsmMacroIoLib.inc\r
// VOID\r
// );\r
ArmPlatformGetPrimaryCoreMpId FUNCTION\r
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)\r
- ldr r0, [r0]\r
+ mov32 r0, FixedPcdGet32(PcdArmPrimaryCore)\r
bx lr\r
ENDFUNC\r
\r
// IN UINTN MpId\r
// );\r
ArmPlatformIsPrimaryCore FUNCTION\r
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)\r
- ldr r1, [r1]\r
+ mov32 r1, FixedPcdGet32(PcdArmPrimaryCoreMask)\r
and r0, r0, r1\r
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1)\r
- ldr r1, [r1]\r
+ mov32 r1, FixedPcdGet32(PcdArmPrimaryCore)\r
cmp r0, r1\r
moveq r0, #1\r
movne r0, #0\r
//\r
//\r
\r
-#include <AsmMacroIoLib.h>\r
-#include <Base.h>\r
#include <AutoGen.h>\r
\r
INCLUDE AsmMacroIoLib.inc\r
add r0, r0, r2\r
\r
// Compute SecondaryCoresCount * SecondaryCoreStackSize\r
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdCoreCount, r1)\r
- ldr r1, [r1]\r
+ mov32 r1, FixedPcdGet32 (PcdCoreCount)\r
sub r1, #1\r
mul r3, r3, r1\r
\r
//\r
//\r
\r
-#include <AsmMacroIoLib.h>\r
-#include <Base.h>\r
#include <AutoGen.h>\r
\r
IMPORT PeiCommonExceptionEntry\r
//\r
//\r
\r
-#include <AsmMacroIoLib.h>\r
-#include <Base.h>\r
-#include <Library/PcdLib.h>\r
#include <AutoGen.h>\r
\r
INCLUDE AsmMacroIoLib.inc\r
bl ArmPlatformIsPrimaryCore\r
\r
// Get the top of the primary stacks (and the base of the secondary stacks)\r
- LoadConstantToReg (FixedPcdGet64(PcdCPUCoresStackBase), r1)\r
- LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r
- add r1, r1, r2\r
+ mov32 r1, FixedPcdGet64(PcdCPUCoresStackBase) + FixedPcdGet32(PcdCPUCorePrimaryStackSize)\r
\r
// r0 is equal to 1 if I am the primary core\r
cmp r0, #1\r
add r0, r0, #1\r
\r
// StackOffset = CorePos * StackSize\r
- LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r2)\r
+ mov32 r2, FixedPcdGet32(PcdCPUCoreSecondaryStackSize)\r
mul r0, r0, r2\r
// SP = StackBase + StackOffset\r
add sp, r6, r0\r
\r
_PrepareArguments\r
// The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector\r
- LoadConstantToReg (FixedPcdGet32(PcdFvBaseAddress), r2)\r
- add r2, r2, #4\r
- ldr r1, [r2]\r
+ mov32 r2, FixedPcdGet32(PcdFvBaseAddress)\r
+ ldr r1, [r2, #4]\r
\r
// Move sec startup address into a data register\r
// Ensure we're jumping to FV version of the code (not boot remapped alias)\r
//\r
//\r
\r
-#include <AsmMacroIoLib.h>\r
-#include <Base.h>\r
-#include <Library/PcdLib.h>\r
#include <AutoGen.h>\r
-\r
#include <Chipset/ArmV7.h>\r
\r
INCLUDE AsmMacroIoLib.inc\r
cmp r1, #0\r
bne _SetupStackPosition\r
\r
- LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryBase), r1)\r
- LoadConstantToReg (FixedPcdGet32(PcdSystemMemorySize), r2)\r
+ mov32 r1, FixedPcdGet32(PcdSystemMemoryBase)\r
+ mov32 r2, FixedPcdGet32(PcdSystemMemorySize)\r
sub r2, r2, #1\r
add r1, r1, r2\r
// Update the global variable\r
// r1 = SystemMemoryTop\r
\r
// Calculate Top of the Firmware Device\r
- LoadConstantToReg (FixedPcdGet32(PcdFdBaseAddress), r2)\r
- LoadConstantToReg (FixedPcdGet32(PcdFdSize), r3)\r
+ mov32 r2, FixedPcdGet32(PcdFdBaseAddress)\r
+ mov32 r3, FixedPcdGet32(PcdFdSize)\r
sub r3, r3, #1\r
add r3, r3, r2 // r3 = FdTop = PcdFdBaseAddress + PcdFdSize\r
\r
// UEFI Memory Size (stacks are allocated in this region)\r
- LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r4)\r
+ mov32 r4, FixedPcdGet32(PcdSystemMemoryUefiRegionSize)\r
\r
//\r
// Reserve the memory for the UEFI region (contain stacks on its top)\r
_SetupOverflowStack\r
// Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE\r
// aligned (4KB)\r
- LoadConstantToReg (EFI_PAGE_MASK, r9)\r
+ mov32 r9, EFI_PAGE_MASK\r
and r9, r9, r1\r
sub r1, r1, r9\r
\r
_GetStackBase\r
// r1 = The top of the Mpcore Stacks\r
// Stack for the primary core = PrimaryCoreStack\r
- LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r
+ mov32 r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize)\r
sub r10, r1, r2\r
\r
// Stack for the secondary core = Number of Cores - 1\r
- LoadConstantToReg (FixedPcdGet32(PcdCoreCount), r0)\r
- sub r0, r0, #1\r
- LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1)\r
- mul r1, r1, r0\r
+ mov32 r1, (FixedPcdGet32(PcdCoreCount) - 1) * FixedPcdGet32(PcdCPUCoreSecondaryStackSize)\r
sub r10, r10, r1\r
\r
// r10 = The base of the MpCore Stacks (primary stack & secondary stacks)\r
mov r0, r10\r
mov r1, r8\r
//ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)\r
- LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r
- LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r3)\r
+ mov32 r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize)\r
+ mov32 r3, FixedPcdGet32(PcdCPUCoreSecondaryStackSize)\r
bl ArmPlatformStackSet\r
\r
// Is it the Primary Core ?\r