/// Defines which functions the BIOS supports. PCI, PCMCIA, Flash, etc. \r
///\r
typedef struct {\r
- UINT32 Reserved :2; //Bits 0-1\r
+ UINT32 Reserved :2; ///< Bits 0-1\r
UINT32 Unknown :1; \r
UINT32 BiosCharacteristicsNotSupported :1; \r
UINT32 IsaIsSupported :1; \r
UINT32 PrinterIsSupported :1;\r
UINT32 CgaMonoIsSupported :1;\r
UINT32 NecPc98 :1;\r
- UINT32 ReservedForVendor :32; // Bits 32-63. Bits 32-47 reserved for BIOS vendor \r
- // and bits 48-63 reserved for System Vendor. \r
+ UINT32 ReservedForVendor :32; ///< Bits 32-63. Bits 32-47 reserved for BIOS vendor \r
+ ///< and bits 48-63 reserved for System Vendor. \r
} MISC_BIOS_CHARACTERISTICS;\r
\r
///\r
UINT8 BiosBootSpecIsSupported :1;\r
UINT8 FunctionKeyNetworkBootIsSupported :1; \r
UINT8 TargetContentDistributionEnabled :1; \r
- UINT8 ExtensionByte2Reserved :1; //Bits 3-7\r
+ UINT8 ExtensionByte2Reserved :1;\r
} MBCE_SYSTEM_RESERVED;\r
\r
///\r
ProcessorFamilyIntelCeleronD = 0xBA,\r
ProcessorFamilyIntelPentiumD = 0xBB,\r
ProcessorFamilyIntelPentiumEx = 0xBC,\r
- ProcessorFamilyIntelCoreSolo = 0xBD, // SMBIOS spec 2.6 correct this value\r
+ ProcessorFamilyIntelCoreSolo = 0xBD, ///< SMBIOS spec 2.6 correct this value\r
ProcessorFamilyReserved = 0xBE,\r
ProcessorFamilyIntelCore2 = 0xBF,\r
ProcessorFamilyIBM390 = 0xC8,\r
/// Processor Information - Voltage \r
///\r
typedef struct {\r
- UINT8 ProcessorVoltageCapability5V :1; // Bit 0\r
- UINT8 ProcessorVoltageCapability3_3V :1; // Bit 1\r
- UINT8 ProcessorVoltageCapability2_9V :1; // Bit 2\r
- UINT8 ProcessorVoltageCapabilityReserved :1; // Bit 3 ,must be zero.\r
- UINT8 ProcessorVoltageReserved :3; // Bits 4-6, must be zero.\r
- UINT8 ProcessorVoltageIndicateLegacy :1; // Bit 7.\r
+ UINT8 ProcessorVoltageCapability5V :1; \r
+ UINT8 ProcessorVoltageCapability3_3V :1; \r
+ UINT8 ProcessorVoltageCapability2_9V :1; \r
+ UINT8 ProcessorVoltageCapabilityReserved :1; ///< Bit 3, must be zero.\r
+ UINT8 ProcessorVoltageReserved :3; ///< Bits 4-6, must be zero.\r
+ UINT8 ProcessorVoltageIndicateLegacy :1;\r
} PROCESSOR_VOLTAGE;\r
\r
///\r
ProcessorUpgradeUnknown = 0x02,\r
ProcessorUpgradeDaughterBoard = 0x03,\r
ProcessorUpgradeZIFSocket = 0x04,\r
- ProcessorUpgradePiggyBack = 0x05, // Replaceable\r
+ ProcessorUpgradePiggyBack = 0x05, ///< Replaceable\r
ProcessorUpgradeNone = 0x06,\r
ProcessorUpgradeLIFSocket = 0x07,\r
ProcessorUpgradeSlot1 = 0x08,\r
ProcessorUpgradeSlotA = 0x0B,\r
ProcessorUpgradeSlotM = 0x0C,\r
ProcessorUpgradeSocket423 = 0x0D,\r
- ProcessorUpgradeSocketA = 0x0E, // Socket 462\r
+ ProcessorUpgradeSocketA = 0x0E, ///< Socket 462\r
ProcessorUpgradeSocket478 = 0x0F,\r
ProcessorUpgradeSocket754 = 0x10,\r
ProcessorUpgradeSocket940 = 0x11,\r
PROCESSOR_MISC_INFO MiscInfo;\r
UINT32 Reserved;\r
PROCESSOR_FEATURE_FLAGS FeatureFlags;\r
-} PROCESSOR_ID_DATA; // 4*4 bytes \r
+} PROCESSOR_ID_DATA;\r
\r
///\r
/// Processor Information (Type 4)\r
/// Memory Module Information - Memory Size\r
///\r
typedef struct {\r
- UINT8 InstalledOrEnabledSize :7;// Size (n), where 2**n is the size in MB.\r
+ UINT8 InstalledOrEnabledSize :7; ///< Size (n), where 2**n is the size in MB.\r
UINT8 SingleOrDoubleBank :1;\r
} MEMORY_INSTALLED_ENABLED_SIZE;\r
\r
CacheErrorUnknown = 0x02,\r
CacheErrorNone = 0x03,\r
CacheErrorParity = 0x04,\r
- CacheErrorSingleBit = 0x05, // ECC\r
- CacheErrorMultiBit = 0x06 // ECC\r
+ CacheErrorSingleBit = 0x05, ///< ECC\r
+ CacheErrorMultiBit = 0x06 ///< ECC\r
} CACHE_ERROR_TYPE_DATA;\r
\r
///\r
SlotDataBusWidth32Bit = 0x05,\r
SlotDataBusWidth64Bit = 0x06,\r
SlotDataBusWidth128Bit = 0x07,\r
- SlotDataBusWidth1X = 0x08, // Or X1\r
- SlotDataBusWidth2X = 0x09, // Or X2\r
- SlotDataBusWidth4X = 0x0A, // Or X4\r
- SlotDataBusWidth8X = 0x0B, // Or X8\r
- SlotDataBusWidth12X = 0x0C, // Or X12\r
- SlotDataBusWidth16X = 0x0D, // Or X16\r
- SlotDataBusWidth32X = 0x0E // Or X32\r
+ SlotDataBusWidth1X = 0x08, ///< Or X1\r
+ SlotDataBusWidth2X = 0x09, ///< Or X2\r
+ SlotDataBusWidth4X = 0x0A, ///< Or X4\r
+ SlotDataBusWidth8X = 0x0B, ///< Or X8\r
+ SlotDataBusWidth12X = 0x0C, ///< Or X12\r
+ SlotDataBusWidth16X = 0x0D, ///< Or X16\r
+ SlotDataBusWidth32X = 0x0E ///< Or X32\r
} MISC_SLOT_DATA_BUS_WIDTH;\r
\r
///\r
UINT8 PmeSignalSupported :1;\r
UINT8 HotPlugDevicesSupported :1;\r
UINT8 SmbusSignalSupported :1;\r
- UINT8 Reserved :5; //Set to 0.\r
+ UINT8 Reserved :5; ///< Set to 0.\r
} MISC_SLOT_CHARACTERISTICS2;\r
\r
///\r
EventLogTypeUncorrectCPUErr = 0x15,\r
EventLogTypeAreaResetAndClr = 0x16,\r
EventLogTypeSystemBoot = 0x17,\r
- EventLogTypeUnused = 0x18, // 0x18 - 0x7F\r
- EventLogTypeAvailForSys = 0x80, // 0x80 - 0xFE\r
+ EventLogTypeUnused = 0x18, ///< 0x18 - 0x7F\r
+ EventLogTypeAvailForSys = 0x80, ///< 0x80 - 0xFE\r
EventLogTypeEndOfLog = 0xFF\r
} EVENT_LOG_TYPE_DATA;\r
\r
/// \r
typedef struct {\r
SMBIOS_STRUCTURE Hdr;\r
- MEMORY_ERROR_TYPE ErrorType; // Same as Type 18\r
- MEMORY_ERROR_GRANULARITY ErrorGranularity; // Same as Type 18\r
- MEMORY_ERROR_OPERATION ErrorOperation; // Same as Type 18\r
+ MEMORY_ERROR_TYPE ErrorType; ///< Same as Type 18\r
+ MEMORY_ERROR_GRANULARITY ErrorGranularity; ///< Same as Type 18\r
+ MEMORY_ERROR_OPERATION ErrorOperation; ///< Same as Type 18\r
UINT32 VendorSyndrome;\r
UINT64 MemoryArrayErrorAddress;\r
UINT64 DeviceErrorAddress;\r
///\r
typedef enum {\r
IPMIDeviceInfoInterfaceTypeUnknown = 0x00,\r
- IPMIDeviceInfoInterfaceTypeKCS = 0x01, // Keyboard Controller Style\r
- IPMIDeviceInfoInterfaceTypeSMIC = 0x02, // Server Management Interface Chip\r
- IPMIDeviceInfoInterfaceTypeBT = 0x03, // Block Transfer\r
+ IPMIDeviceInfoInterfaceTypeKCS = 0x01, ///< Keyboard Controller Style\r
+ IPMIDeviceInfoInterfaceTypeSMIC = 0x02, ///< Server Management Interface Chip\r
+ IPMIDeviceInfoInterfaceTypeBT = 0x03, ///< Block Transfer\r
IPMIDeviceInfoInterfaceTypeReserved = 0x04\r
} BMC_INTERFACE_TYPE;\r
\r