OvmfPkg/SmmAccess: support extended TSEG size

In SmmAccessPeiEntryPoint(), map TSEG megabyte counts different from 1, 2
and 8 to the MCH_ESMRAMC_TSEG_EXT bit pattern (introduced in the previous
patch), for the ESMRAMC.TSEG_SZ bit-field register. (Suggested by Jordan.)

In SmramAccessGetCapabilities() -- backing both
PEI_SMM_ACCESS_PPI.GetCapabilities() and
EFI_SMM_ACCESS2_PROTOCOL.GetCapabilities() --, map the
MCH_ESMRAMC_TSEG_EXT bit pattern found in the ESMRAMC.TSEG_SZ bit-field
register to a byte count of (mQ35TsegMbytes * SIZE_1MB).

(MCH_ESMRAMC_TSEG_EXT is the only possible pattern if none of
MCH_ESMRAMC_TSEG_1MB, MCH_ESMRAMC_TSEG_2MB, and MCH_ESMRAMC_TSEG_8MB
match.)

The new code paths are not exercised just yet; for that, PlatformPei is
going to have to set PcdQ35TsegMbytes (and consequently, SmramInternal's
"mQ35TsegMbytes") to a value different from 1, 2, and 8.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

diff --git a/OvmfPkg/SmmAccess/SmmAccessPei.c b/OvmfPkg/SmmAccess/SmmAccessPei.c
index a3631a1b9d508d81dbdd7f0d3c3a8babd2ea8e6e..21119f80eefae3f44f033837d0fd347d0a9b8229 100644 (file)
--- a/OvmfPkg/SmmAccess/SmmAccessPei.c
+++ b/OvmfPkg/SmmAccess/SmmAccessPei.c
@@ -330,7 +330,8 @@ SmmAccessPeiEntryPoint (
   EsmramcVal &= ~(UINT32)MCH_ESMRAMC_TSEG_MASK;\r
   EsmramcVal |= mQ35TsegMbytes == 8 ? MCH_ESMRAMC_TSEG_8MB :\r
                 mQ35TsegMbytes == 2 ? MCH_ESMRAMC_TSEG_2MB :\r
   EsmramcVal &= ~(UINT32)MCH_ESMRAMC_TSEG_MASK;\r
   EsmramcVal |= mQ35TsegMbytes == 8 ? MCH_ESMRAMC_TSEG_8MB :\r
                 mQ35TsegMbytes == 2 ? MCH_ESMRAMC_TSEG_2MB :\r

-                MCH_ESMRAMC_TSEG_1MB;\r
+                mQ35TsegMbytes == 1 ? MCH_ESMRAMC_TSEG_1MB :\r
+                MCH_ESMRAMC_TSEG_EXT;\r

   EsmramcVal |= MCH_ESMRAMC_T_EN;\r
   PciWrite8 (DRAMC_REGISTER_Q35 (MCH_ESMRAMC), EsmramcVal);\r
 \r
   EsmramcVal |= MCH_ESMRAMC_T_EN;\r
   PciWrite8 (DRAMC_REGISTER_Q35 (MCH_ESMRAMC), EsmramcVal);\r
 \r

diff --git a/OvmfPkg/SmmAccess/SmramInternal.c b/OvmfPkg/SmmAccess/SmramInternal.c
index 9918a451482e4c1772ff8b40601b0210076103ab..18c42d29042d415841fe43dc55b36f07238ca8aa 100644 (file)
--- a/OvmfPkg/SmmAccess/SmramInternal.c
+++ b/OvmfPkg/SmmAccess/SmramInternal.c
@@ -198,7 +198,9 @@ SmramAccessGetCapabilities (
   SmramMap[DescIdxMain].PhysicalSize =\r
     (TsegSizeBits == MCH_ESMRAMC_TSEG_8MB ? SIZE_8MB :\r
      TsegSizeBits == MCH_ESMRAMC_TSEG_2MB ? SIZE_2MB :\r
   SmramMap[DescIdxMain].PhysicalSize =\r
     (TsegSizeBits == MCH_ESMRAMC_TSEG_8MB ? SIZE_8MB :\r
      TsegSizeBits == MCH_ESMRAMC_TSEG_2MB ? SIZE_2MB :\r

-     SIZE_1MB) - SmramMap[DescIdxSmmS3ResumeState].PhysicalSize;\r
+     TsegSizeBits == MCH_ESMRAMC_TSEG_1MB ? SIZE_1MB :\r
+     mQ35TsegMbytes * SIZE_1MB) -\r
+    SmramMap[DescIdxSmmS3ResumeState].PhysicalSize;\r

   SmramMap[DescIdxMain].RegionState = CommonRegionState;\r
 \r
   return EFI_SUCCESS;\r
   SmramMap[DescIdxMain].RegionState = CommonRegionState;\r
 \r
   return EFI_SUCCESS;\r