UefiCpuPkg/PiSmmCpuDxeSmm: Allocate buffer for MSRs semaphores

Allocate MSRs semaphores in allocated aligned semaphores buffer.
And add it into semaphores structure.

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
index bbff6e18b437ea78acb9a2dece02165b894a5018..22c133202ca069df5ea1a3f716b248ca117f7917 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
@@ -1,7 +1,7 @@
 /** @file\r
 Code for Processor S3 restoration\r
 \r
 /** @file\r
 Code for Processor S3 restoration\r
 \r

-Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r

 This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r
 which accompanies this distribution.  The full text of the license may be found at\r
 This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r
 which accompanies this distribution.  The full text of the license may be found at\r


@@ -48,7 +48,6 @@ AsmGetAddressMap (
 \r
 #define LEGACY_REGION_SIZE    (2 * 0x1000)\r
 #define LEGACY_REGION_BASE    (0xA0000 - LEGACY_REGION_SIZE)\r
 \r
 #define LEGACY_REGION_SIZE    (2 * 0x1000)\r
 #define LEGACY_REGION_BASE    (0xA0000 - LEGACY_REGION_SIZE)\r

-#define MSR_SPIN_LOCK_INIT_NUM 15\r

 \r
 ACPI_CPU_DATA                mAcpiCpuData;\r
 UINT32                       mNumberToFinish;\r
 \r
 ACPI_CPU_DATA                mAcpiCpuData;\r
 UINT32                       mNumberToFinish;\r

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
index 399315bad8f59997292b338e5c227735ffc9e110..add770ff3cbfe0f29c2bee0017fedf093e760d17 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
@@ -1210,6 +1210,7 @@ InitializeSmmCpuSemaphores (
   UINTN                      TotalSize;\r
   UINTN                      GlobalSemaphoresSize;\r
   UINTN                      CpuSemaphoresSize;\r
   UINTN                      TotalSize;\r
   UINTN                      GlobalSemaphoresSize;\r
   UINTN                      CpuSemaphoresSize;\r

+  UINTN                      MsrSemahporeSize;\r

   UINTN                      SemaphoreSize;\r
   UINTN                      Pages;\r
   UINTN                      *SemaphoreBlock;\r
   UINTN                      SemaphoreSize;\r
   UINTN                      Pages;\r
   UINTN                      *SemaphoreBlock;\r


@@ -1219,7 +1220,8 @@ InitializeSmmCpuSemaphores (
   ProcessorCount = gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus;\r
   GlobalSemaphoresSize = (sizeof (SMM_CPU_SEMAPHORE_GLOBAL) / sizeof (VOID *)) * SemaphoreSize;\r
   CpuSemaphoresSize    = (sizeof (SMM_CPU_SEMAPHORE_CPU) / sizeof (VOID *)) * ProcessorCount * SemaphoreSize;\r
   ProcessorCount = gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus;\r
   GlobalSemaphoresSize = (sizeof (SMM_CPU_SEMAPHORE_GLOBAL) / sizeof (VOID *)) * SemaphoreSize;\r
   CpuSemaphoresSize    = (sizeof (SMM_CPU_SEMAPHORE_CPU) / sizeof (VOID *)) * ProcessorCount * SemaphoreSize;\r

-  TotalSize = GlobalSemaphoresSize + CpuSemaphoresSize;\r
+  MsrSemahporeSize     = MSR_SPIN_LOCK_INIT_NUM * SemaphoreSize;\r
+  TotalSize = GlobalSemaphoresSize + CpuSemaphoresSize + MsrSemahporeSize;\r

   DEBUG((EFI_D_INFO, "One Semaphore Size    = 0x%x\n", SemaphoreSize));\r
   DEBUG((EFI_D_INFO, "Total Semaphores Size = 0x%x\n", TotalSize));\r
   Pages = EFI_SIZE_TO_PAGES (TotalSize);\r
   DEBUG((EFI_D_INFO, "One Semaphore Size    = 0x%x\n", SemaphoreSize));\r
   DEBUG((EFI_D_INFO, "Total Semaphores Size = 0x%x\n", TotalSize));\r
   Pages = EFI_SIZE_TO_PAGES (TotalSize);\r


@@ -1246,6 +1248,12 @@ InitializeSmmCpuSemaphores (
   SemaphoreAddr += ProcessorCount * SemaphoreSize;\r
   mSmmCpuSemaphores.SemaphoreCpu.Present = (BOOLEAN *)SemaphoreAddr;\r
 \r
   SemaphoreAddr += ProcessorCount * SemaphoreSize;\r
   mSmmCpuSemaphores.SemaphoreCpu.Present = (BOOLEAN *)SemaphoreAddr;\r
 \r

+  SemaphoreAddr = (UINTN)SemaphoreBlock + GlobalSemaphoresSize + CpuSemaphoresSize;\r
+  mSmmCpuSemaphores.SemaphoreMsr.Msr              = (SPIN_LOCK *)SemaphoreAddr;\r
+  mSmmCpuSemaphores.SemaphoreMsr.AvailableCounter =\r
+        ((UINTN)SemaphoreBlock + Pages * SIZE_4KB - SemaphoreAddr) / SemaphoreSize;\r
+  ASSERT (mSmmCpuSemaphores.SemaphoreMsr.AvailableCounter >= MSR_SPIN_LOCK_INIT_NUM);\r
+\r

   mSmmMpSyncData->Counter       = mSmmCpuSemaphores.SemaphoreGlobal.Counter;\r
   mSmmMpSyncData->InsideSmm     = mSmmCpuSemaphores.SemaphoreGlobal.InsideSmm;\r
   mSmmMpSyncData->AllCpusInSync = mSmmCpuSemaphores.SemaphoreGlobal.AllCpusInSync;\r
   mSmmMpSyncData->Counter       = mSmmCpuSemaphores.SemaphoreGlobal.Counter;\r
   mSmmMpSyncData->InsideSmm     = mSmmCpuSemaphores.SemaphoreGlobal.InsideSmm;\r
   mSmmMpSyncData->AllCpusInSync = mSmmCpuSemaphores.SemaphoreGlobal.AllCpusInSync;\r

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
index df5980cd420f3520e795fc699327f055fa8a9126..ad2109fde8277851ed509ea3de87570be9711c78 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
@@ -323,6 +323,8 @@ typedef struct {
   volatile BOOLEAN              *CandidateBsp;\r
 } SMM_DISPATCHER_MP_SYNC_DATA;\r
 \r
   volatile BOOLEAN              *CandidateBsp;\r
 } SMM_DISPATCHER_MP_SYNC_DATA;\r
 \r

+#define MSR_SPIN_LOCK_INIT_NUM 15\r
+\r

 typedef struct {\r
   SPIN_LOCK    SpinLock;\r
   UINT32       MsrIndex;\r
 typedef struct {\r
   SPIN_LOCK    SpinLock;\r
   UINT32       MsrIndex;\r


@@ -375,6 +377,13 @@ typedef struct {
   volatile BOOLEAN                  *Present;\r
 } SMM_CPU_SEMAPHORE_CPU;\r
 \r
   volatile BOOLEAN                  *Present;\r
 } SMM_CPU_SEMAPHORE_CPU;\r
 \r

+///\r
+/// All MSRs semaphores' pointer and counter\r
+///\r
+typedef struct {\r
+  SPIN_LOCK            *Msr;\r
+  UINTN                AvailableCounter;\r
+} SMM_CPU_SEMAPHORE_MSR;\r

 \r
 ///\r
 /// All semaphores' information\r
 \r
 ///\r
 /// All semaphores' information\r


@@ -382,6 +391,7 @@ typedef struct {
 typedef struct {\r
   SMM_CPU_SEMAPHORE_GLOBAL          SemaphoreGlobal;\r
   SMM_CPU_SEMAPHORE_CPU             SemaphoreCpu;\r
 typedef struct {\r
   SMM_CPU_SEMAPHORE_GLOBAL          SemaphoreGlobal;\r
   SMM_CPU_SEMAPHORE_CPU             SemaphoreCpu;\r

+  SMM_CPU_SEMAPHORE_MSR             SemaphoreMsr;\r

 } SMM_CPU_SEMAPHORES;\r
 \r
 extern IA32_DESCRIPTOR                     gcSmiGdtr;\r
 } SMM_CPU_SEMAPHORES;\r
 \r
 extern IA32_DESCRIPTOR                     gcSmiGdtr;\r