This issue is introduced by a patch at
f32bfe6d061420a15bac6083063d227c567e6388
The above patch miss the case of 64-bit PEI, which will link
X64/MpFuncs.nasm instead of Ia32/MpFuncs.nasm. For X64/MpFuncs.nasm,
ExchangeInfo->ModeHighMemory should be always initialized no matter
if separate wakeup buffer is allocated or not. Ia32/MpFuncs.nasm will
not need ModeHighMemory during AP init. So the changes made in this
patch should not affect the functionality of it.
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
);\r
\r
ExchangeInfo->ModeTransitionMemory = (UINT32)CpuMpData->WakeupBufferHigh;\r
- ExchangeInfo->ModeHighMemory = (UINT32)CpuMpData->WakeupBufferHigh +\r
- (UINT32)ExchangeInfo->ModeOffset -\r
- (UINT32)CpuMpData->AddressMap.ModeTransitionOffset;\r
- ExchangeInfo->ModeHighSegment = (UINT16)ExchangeInfo->CodeSegment;\r
} else {\r
ExchangeInfo->ModeTransitionMemory = (UINT32)\r
(ExchangeInfo->BufferStart + CpuMpData->AddressMap.ModeTransitionOffset);\r
}\r
+\r
+ ExchangeInfo->ModeHighMemory = ExchangeInfo->ModeTransitionMemory +\r
+ (UINT32)ExchangeInfo->ModeOffset -\r
+ (UINT32)CpuMpData->AddressMap.ModeTransitionOffset;\r
+ ExchangeInfo->ModeHighSegment = (UINT16)ExchangeInfo->CodeSegment;\r
}\r
\r
/**\r