--- /dev/null
+/** @file\r
+\r
+ Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>\r
+\r
+ SPDX-License-Identifier: BSD-2-Clause-Patent\r
+\r
+**/\r
+\r
+#ifndef TDX_MAILBOX_LIB_H_\r
+#define TDX_MAILBOX_LIB_H_\r
+\r
+#include <Library/BaseLib.h>\r
+#include <Uefi/UefiBaseType.h>\r
+#include <Uefi/UefiSpec.h>\r
+#include <Pi/PiPeiCis.h>\r
+#include <Library/DebugLib.h>\r
+#include <Protocol/DebugSupport.h>\r
+\r
+/**\r
+ This function will be called by BSP to get the CPU number.\r
+\r
+ @retval CPU number\r
+**/\r
+UINT32\r
+EFIAPI\r
+GetCpusNum (\r
+ VOID\r
+ );\r
+\r
+/**\r
+ Get the address of Td mailbox.\r
+**/\r
+volatile VOID *\r
+EFIAPI\r
+GetTdxMailBox (\r
+ VOID\r
+ );\r
+\r
+/**\r
+ This function will be called by BSP to wakeup APs the are spinning on mailbox\r
+ in protected mode\r
+\r
+ @param[in] Command Command to send APs\r
+ @param[in] WakeupVector If used, address for APs to start executing\r
+ @param[in] WakeArgsX Args to pass to APs for excuting commands\r
+**/\r
+VOID\r
+EFIAPI\r
+MpSendWakeupCommand (\r
+ IN UINT16 Command,\r
+ IN UINT64 WakeupVector,\r
+ IN UINT64 WakeupArgs1,\r
+ IN UINT64 WakeupArgs2,\r
+ IN UINT64 WakeupArgs3,\r
+ IN UINT64 WakeupArgs4\r
+ );\r
+\r
+/**\r
+ BSP wait until all the APs arriving. It means the task triggered by BSP is started.\r
+**/\r
+VOID\r
+EFIAPI\r
+MpSerializeStart (\r
+ VOID\r
+ );\r
+\r
+/**\r
+ BSP wait until all the APs arriving. It means the task triggered by BSP is ended.\r
+**/\r
+VOID\r
+EFIAPI\r
+MpSerializeEnd (\r
+ VOID\r
+ );\r
+\r
+#endif\r
--- /dev/null
+/** @file\r
+\r
+ Copyright (c) 2008, Intel Corporation. All rights reserved.<BR>\r
+ (C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>\r
+\r
+ SPDX-License-Identifier: BSD-2-Clause-Patent\r
+\r
+**/\r
+\r
+#include <Library/DebugLib.h>\r
+#include <Library/BaseMemoryLib.h>\r
+#include <Library/PcdLib.h>\r
+#include <Library/UefiCpuLib.h>\r
+#include <Library/SynchronizationLib.h>\r
+#include <Uefi/UefiBaseType.h>\r
+#include <Library/TdxLib.h>\r
+#include <IndustryStandard/IntelTdx.h>\r
+#include <IndustryStandard/Tdx.h>\r
+#include <Library/TdxMailboxLib.h>\r
+\r
+volatile VOID *mMailBox = NULL;\r
+UINT32 mNumOfCpus = 0;\r
+\r
+/**\r
+ This function will be called by BSP to get the CPU number.\r
+\r
+ @retval CPU number\r
+**/\r
+UINT32\r
+EFIAPI\r
+GetCpusNum (\r
+ VOID\r
+ )\r
+{\r
+ if (mNumOfCpus == 0) {\r
+ mNumOfCpus = TdVCpuNum ();\r
+ }\r
+\r
+ return mNumOfCpus;\r
+}\r
+\r
+/**\r
+ Get the address of Td mailbox.\r
+**/\r
+volatile VOID *\r
+EFIAPI\r
+GetTdxMailBox (\r
+ VOID\r
+ )\r
+{\r
+ if (mMailBox == NULL) {\r
+ mMailBox = (VOID *)(UINTN)PcdGet32 (PcdOvmfSecGhcbBackupBase);\r
+ }\r
+\r
+ return mMailBox;\r
+}\r
+\r
+/**\r
+ This function will be called by BSP to wakeup APs the are spinning on mailbox\r
+ in protected mode\r
+\r
+ @param[in] Command Command to send APs\r
+ @param[in] WakeupVector If used, address for APs to start executing\r
+ @param[in] WakeArgsX Args to pass to APs for excuting commands\r
+**/\r
+VOID\r
+EFIAPI\r
+MpSendWakeupCommand (\r
+ IN UINT16 Command,\r
+ IN UINT64 WakeupVector,\r
+ IN UINT64 WakeupArgs1,\r
+ IN UINT64 WakeupArgs2,\r
+ IN UINT64 WakeupArgs3,\r
+ IN UINT64 WakeupArgs4\r
+ )\r
+{\r
+ volatile MP_WAKEUP_MAILBOX *MailBox;\r
+\r
+ MailBox = (volatile MP_WAKEUP_MAILBOX *)GetTdxMailBox ();\r
+ MailBox->ApicId = MP_CPU_PROTECTED_MODE_MAILBOX_APICID_INVALID;\r
+ MailBox->WakeUpVector = 0;\r
+ MailBox->Command = MpProtectedModeWakeupCommandNoop;\r
+ MailBox->ApicId = MP_CPU_PROTECTED_MODE_MAILBOX_APICID_BROADCAST;\r
+ MailBox->WakeUpVector = WakeupVector;\r
+ MailBox->WakeUpArgs1 = WakeupArgs1;\r
+ MailBox->WakeUpArgs2 = WakeupArgs2;\r
+ MailBox->WakeUpArgs3 = WakeupArgs3;\r
+ MailBox->WakeUpArgs4 = WakeupArgs4;\r
+ AsmCpuid (0x01, NULL, NULL, NULL, NULL);\r
+ MailBox->Command = Command;\r
+ AsmCpuid (0x01, NULL, NULL, NULL, NULL);\r
+ return;\r
+}\r
+\r
+/**\r
+ BSP wait until all the APs arriving. It means the task triggered by BSP is started.\r
+**/\r
+VOID\r
+EFIAPI\r
+MpSerializeStart (\r
+ VOID\r
+ )\r
+{\r
+ volatile MP_WAKEUP_MAILBOX *MailBox;\r
+ UINT32 NumOfCpus;\r
+\r
+ NumOfCpus = GetCpusNum ();\r
+ MailBox = (volatile MP_WAKEUP_MAILBOX *)GetTdxMailBox ();\r
+\r
+ DEBUG ((DEBUG_VERBOSE, "Waiting for APs to arriving. NumOfCpus=%d, MailBox=%p\n", NumOfCpus, MailBox));\r
+ while (MailBox->NumCpusArriving != (NumOfCpus -1)) {\r
+ CpuPause ();\r
+ }\r
+\r
+ DEBUG ((DEBUG_VERBOSE, "Releasing APs\n"));\r
+ MailBox->NumCpusExiting = NumOfCpus;\r
+ InterlockedIncrement ((UINT32 *)&MailBox->NumCpusArriving);\r
+}\r
+\r
+/**\r
+ BSP wait until all the APs arriving. It means the task triggered by BSP is ended.\r
+**/\r
+VOID\r
+EFIAPI\r
+MpSerializeEnd (\r
+ VOID\r
+ )\r
+{\r
+ volatile MP_WAKEUP_MAILBOX *MailBox;\r
+\r
+ MailBox = (volatile MP_WAKEUP_MAILBOX *)GetTdxMailBox ();\r
+ DEBUG ((DEBUG_VERBOSE, "Waiting for APs to finish\n"));\r
+ while (MailBox->NumCpusExiting != 1 ) {\r
+ CpuPause ();\r
+ }\r
+\r
+ DEBUG ((DEBUG_VERBOSE, "Restarting APs\n"));\r
+ MailBox->Command = MpProtectedModeWakeupCommandNoop;\r
+ MailBox->NumCpusArriving = 0;\r
+ InterlockedDecrement ((UINT32 *)&MailBox->NumCpusExiting);\r
+}\r
--- /dev/null
+#/** @file\r
+#\r
+# TBD\r
+#\r
+# Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2008, Apple Inc. All rights reserved.<BR>\r
+#\r
+# SPDX-License-Identifier: BSD-2-Clause-Patent\r
+#\r
+#\r
+#**/\r
+\r
+[Defines]\r
+ INF_VERSION = 0x00010005\r
+ BASE_NAME = TdxMailboxLib\r
+ FILE_GUID = 2F81A9BA-748E-4519-BB11-A63A039D561E\r
+ MODULE_TYPE = BASE\r
+ VERSION_STRING = 1.0\r
+ LIBRARY_CLASS = TdxMailboxLib\r
+\r
+#\r
+# VALID_ARCHITECTURES = X64 IA32\r
+#\r
+\r
+[Sources.IA32]\r
+ TdxMailboxNull.c\r
+\r
+[Sources.X64]\r
+ TdxMailbox.c\r
+\r
+[Packages]\r
+ MdePkg/MdePkg.dec\r
+ MdeModulePkg/MdeModulePkg.dec\r
+ UefiCpuPkg/UefiCpuPkg.dec\r
+ OvmfPkg/OvmfPkg.dec\r
+\r
+[LibraryClasses]\r
+ BaseLib\r
+ DebugLib\r
+ BaseMemoryLib\r
+ PcdLib\r
+ UefiCpuLib\r
+ DebugAgentLib\r
+ IoLib\r
+ SynchronizationLib\r
+ MemoryAllocationLib\r
+\r
+[Guids]\r
+\r
+[Pcd]\r
+ gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBackupBase\r
+ gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBackupSize\r
--- /dev/null
+/** @file\r
+\r
+ Copyright (c) 2008, Intel Corporation. All rights reserved.<BR>\r
+ (C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>\r
+\r
+ SPDX-License-Identifier: BSD-2-Clause-Patent\r
+\r
+**/\r
+\r
+#include <Library/DebugLib.h>\r
+#include <Library/TdxMailboxLib.h>\r
+\r
+/**\r
+ This function will be called by BSP to get the CPU number.\r
+\r
+ @retval CPU number\r
+**/\r
+UINT32\r
+EFIAPI\r
+GetCpusNum (\r
+ VOID\r
+ )\r
+{\r
+ ASSERT (FALSE);\r
+ return 0;\r
+}\r
+\r
+/**\r
+ Get the address of Td mailbox.\r
+**/\r
+volatile VOID *\r
+EFIAPI\r
+GetTdxMailBox (\r
+ VOID\r
+ )\r
+{\r
+ ASSERT (FALSE);\r
+ return (volatile VOID *)NULL;\r
+}\r
+\r
+/**\r
+ This function will be called by BSP to wakeup APs the are spinning on mailbox\r
+ in protected mode\r
+\r
+ @param[in] Command Command to send APs\r
+ @param[in] WakeupVector If used, address for APs to start executing\r
+ @param[in] WakeArgsX Args to pass to APs for excuting commands\r
+**/\r
+VOID\r
+EFIAPI\r
+MpSendWakeupCommand (\r
+ IN UINT16 Command,\r
+ IN UINT64 WakeupVector,\r
+ IN UINT64 WakeupArgs1,\r
+ IN UINT64 WakeupArgs2,\r
+ IN UINT64 WakeupArgs3,\r
+ IN UINT64 WakeupArgs4\r
+ )\r
+{\r
+ ASSERT (FALSE);\r
+}\r
+\r
+/**\r
+ BSP wait until all the APs arriving. It means the task triggered by BSP is started.\r
+**/\r
+VOID\r
+EFIAPI\r
+MpSerializeStart (\r
+ VOID\r
+ )\r
+{\r
+ ASSERT (FALSE);\r
+}\r
+\r
+/**\r
+ BSP wait until all the APs arriving. It means the task triggered by BSP is ended.\r
+**/\r
+VOID\r
+EFIAPI\r
+MpSerializeEnd (\r
+ VOID\r
+ )\r
+{\r
+ ASSERT (FALSE);\r
+}\r
#\r
XenPlatformLib|Include/Library/XenPlatformLib.h\r
\r
+ ## @libraryclass TdxMailboxLib\r
+ #\r
+ TdxMailboxLib|Include/Library/TdxMailboxLib.h\r
+\r
[Guids]\r
gUefiOvmfPkgTokenSpaceGuid = {0x93bb96af, 0xb9f2, 0x4eb8, {0x94, 0x62, 0xe0, 0xba, 0x74, 0x56, 0x42, 0x36}}\r
gEfiXenInfoGuid = {0xd3b46f3b, 0xd441, 0x1244, {0x9a, 0x12, 0x0, 0x12, 0x27, 0x3f, 0xc1, 0x4d}}\r