Layer AllocateBuffer and FreeBuffer on the PciRootBridgeIo too.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@5307 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/EdkCompatibilityPkg/Compatibility/DeviceIoToPciRootBridgeIoThunk/DeviceIoToPciRootBridgeIoThunk.c b/EdkCompatibilityPkg/Compatibility/DeviceIoToPciRootBridgeIoThunk/DeviceIoToPciRootBridgeIoThunk.c
index 889c047c05128c8b818338d18866843462b0affe..3c8c2a58f6f122777c21eb05dbec4be372187eaf 100644 (file)
--- a/EdkCompatibilityPkg/Compatibility/DeviceIoToPciRootBridgeIoThunk/DeviceIoToPciRootBridgeIoThunk.c
+++ b/EdkCompatibilityPkg/Compatibility/DeviceIoToPciRootBridgeIoThunk/DeviceIoToPciRootBridgeIoThunk.c
@@ -1,5 +1,8 @@
 /** @file\r
-Module Layer Device I/O on top of PCI Root Bridge I/O (Segment 0)\r
+Module produces Device I/O on top of PCI Root Bridge I/O for Segment 0 only.\r
+This is a valid assumption because many of the EFI 1.02/EFI 1.10 systems that may have provided \r
+Device I/O were single segment platforms.  The goal of the ECP is to provide compatibility with the \r
+drivers/apps that may have used Device I/O.\r
 \r
 Device I/O is on list of deprecated protocols for UEFI 2.0 and later.\r
 This module module layers Device I/O on top of PCI Root Bridge I/O (Segment 0)\r
@@ -451,7 +454,8 @@ PciRootBridgeIoNotificationEvent (
     ASSERT_EFI_ERROR (Status);\r
 \r
     //\r
-    // We only install Device IO for PCI bus in Segment 0\r
+    // We only install Device IO for PCI bus in Segment 0.\r
+    // See the file description at @file for details.\r
     //\r
     if (PciRootBridgeIo->SegmentNumber != 0) {\r
       continue;\r
@@ -1107,8 +1111,12 @@ DeviceIoAllocateBuffer (
   IN OUT EFI_PHYSICAL_ADDRESS      *PhysicalAddress\r
   )\r
 {\r
-  EFI_STATUS            Status;\r
-  EFI_PHYSICAL_ADDRESS  HostAddress;\r
+  EFI_STATUS              Status;\r
+  EFI_PHYSICAL_ADDRESS    HostAddress;\r
+  DEVICE_IO_PRIVATE_DATA  *Private;\r
+  VOID                    *HostAddress2;\r
+\r
+  Private = DEVICE_IO_PRIVATE_DATA_FROM_THIS (This);\r
 \r
   HostAddress = *PhysicalAddress;\r
 \r
@@ -1129,18 +1137,23 @@ DeviceIoAllocateBuffer (
     HostAddress = MAX_COMMON_BUFFER;\r
   }\r
 \r
-  Status = gBS->AllocatePages (\r
-                  Type,\r
-                  MemoryType,\r
-                  Pages,\r
-                  &HostAddress\r
-                  );\r
+  HostAddress2 = (VOID *) (UINTN) (HostAddress);\r
+  Status = Private->PciRootBridgeIo->AllocateBuffer (\r
+                                       Private->PciRootBridgeIo,\r
+                                       Type,\r
+                                       MemoryType,\r
+                                       Pages,\r
+                                       &HostAddress2,\r
+                                       EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE |\r
+                                       EFI_PCI_ATTRIBUTE_MEMORY_CACHED\r
+                                       );\r
+                                                    \r
   if (EFI_ERROR (Status)) {\r
     return Status;\r
   }\r
 \r
 \r
-  *PhysicalAddress = HostAddress;\r
+  *PhysicalAddress = (EFI_PHYSICAL_ADDRESS) (UINTN) HostAddress2;\r
 \r
   return EFI_SUCCESS;\r
 }\r
@@ -1195,10 +1208,19 @@ DeviceIoFreeBuffer (
   IN EFI_PHYSICAL_ADDRESS     HostAddress\r
   )\r
 {\r
+  DEVICE_IO_PRIVATE_DATA  *Private;\r
+\r
+  Private = DEVICE_IO_PRIVATE_DATA_FROM_THIS (This);\r
+\r
   if (((HostAddress & EFI_PAGE_MASK) != 0) || (Pages <= 0)) {\r
     return EFI_INVALID_PARAMETER;\r
   }\r
 \r
-  return gBS->FreePages (HostAddress, Pages);\r
+  return  Private->PciRootBridgeIo->FreeBuffer (\r
+            Private->PciRootBridgeIo,\r
+            Pages,\r
+            (VOID *) (UINTN) HostAddress\r
+            );\r
+\r
 }\r
 \r