Add Tiger Lake ModelId support in the SMM CPU feature lib.
Signed-off-by: Guo Dong <guo.dong@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
if (FamilyId == 0x06) {\r
if (ModelId == 0x3C || ModelId == 0x45 || ModelId == 0x46 ||\r
ModelId == 0x3D || ModelId == 0x47 || ModelId == 0x4E || ModelId == 0x4F ||\r
- ModelId == 0x3F || ModelId == 0x56 || ModelId == 0x57 || ModelId == 0x5C) {\r
+ ModelId == 0x3F || ModelId == 0x56 || ModelId == 0x57 || ModelId == 0x5C ||\r
+ ModelId == 0x8C) {\r
//\r
// Check to see if the CPU supports the SMM Code Access Check feature\r
// Do not access this MSR unless the CPU supports the SmmRegFeatureControl\r